JPH0198394A - Signal processor - Google Patents

Signal processor

Info

Publication number
JPH0198394A
JPH0198394A JP62256538A JP25653887A JPH0198394A JP H0198394 A JPH0198394 A JP H0198394A JP 62256538 A JP62256538 A JP 62256538A JP 25653887 A JP25653887 A JP 25653887A JP H0198394 A JPH0198394 A JP H0198394A
Authority
JP
Japan
Prior art keywords
signal
output
delay means
phase
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62256538A
Other languages
Japanese (ja)
Inventor
Takeshi Hamazaki
岳史 浜崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62256538A priority Critical patent/JPH0198394A/en
Publication of JPH0198394A publication Critical patent/JPH0198394A/en
Pending legal-status Critical Current

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  • Processing Of Color Television Signals (AREA)

Abstract

PURPOSE:To attain quick phase correction by adopting the constitution such that either a signal from an input terminal or a signal being the result of prescribed phase shift of the output of a delay means is given to the input of the delay means so as to improve the tracking performance of the entire system. CONSTITUTION:A switch 1 is changed over by a controller 2. In throwing the switch 1 to the position (a), the signal from an input terminal 3 is given to a subtractor 4 and a delay means 5. The output of the delay means 5 is given to the subtractor 4 and the signal being the result of subtracting the output signal of the delay means 5 from the signal from the input terminal 3 becomes an output of the subtractor 4 and outputted from an output terminal 6. In throwing the switch 1 to the position (b), the output of the delay means 5 is shifted by a prescribed quantity at a phase shifter 7 and inputted to the delay means 5 and a signal phase-shifted by prescribed quantity each is outputted from the delay means 5 at each prescribed delay time.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、映像機器などに用いられる信号処理装置に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a signal processing device used in video equipment and the like.

従来の技術 従来の信号処理装置の一例を第3図に示す、第3図はV
TRの再生色信号復調器のブロック図である。端子31
からの低減変換色信号と電圧制御発振器32の出力が共
に周波数変換器33に入力され、搬送色信号出力が得ら
れる0周波数変換器33の出力はIH遅延素子(H:水
平方向走査期間)34および減算器35で構成されるく
し型フィルタ36に入力され、クロストーク成分が除去
された信号が端子37に出力される。<シ型フィルタ3
6の出力信号のバースト信号部分と水晶発振器38の出
力信号は位相比較器39において位相比較され、誤差検
出電圧が電圧制御発振器32に入力されるという構成に
なっており、周波数変換器33、くし型フィルタ36、
位相比較器39、電圧制御発振器32はP L L (
Phase  LockedLoop)を構成している
。その結果、出力端子37には水晶発振器38の出力信
号に位相同期した出力が得られる。
2. Description of the Related Art An example of a conventional signal processing device is shown in FIG.
FIG. 3 is a block diagram of a reproduced color signal demodulator of TR. terminal 31
The reduced converted color signal from the oscillator 32 and the output of the voltage controlled oscillator 32 are both input to the frequency converter 33, and the output of the zero frequency converter 33 from which the carrier color signal output is obtained is transferred to the IH delay element (H: horizontal scanning period) 34. The signal is input to a comb filter 36 composed of a subtracter 35 and a subtracter 35, and a signal from which crosstalk components have been removed is output to a terminal 37. <C type filter 3
The burst signal portion of the output signal of 6 and the output signal of the crystal oscillator 38 are phase-compared in a phase comparator 39, and the error detection voltage is input to the voltage controlled oscillator 32. type filter 36,
The phase comparator 39 and the voltage controlled oscillator 32 are connected to P L L (
Phase Locked Loop). As a result, an output whose phase is synchronized with the output signal of the crystal oscillator 38 is obtained at the output terminal 37.

しかし、上記のような構成では、たとえば4ヘツドVT
Rのノイズレス高速サーチ時などにおいては、低域変換
色信号入力が不連続になって端子37からの出力信号が
水晶発振器38からの出力信号と非同期になるような場
合、再び同期がとれるまでには2〜8Hの時間を要する
。このときのくし型フィルタ36の入力、IH遅延素子
34の出力、および減算器35の出力の相対的な位相関
係をIHごとに模式的に示したものが第4図である。
However, in the above configuration, for example, a 4-head VT
During a noiseless high-speed search for R, etc., if the input of the low-frequency conversion color signal becomes discontinuous and the output signal from the terminal 37 becomes asynchronous with the output signal from the crystal oscillator 38, it will take some time before synchronization is achieved again. takes 2 to 8 hours. FIG. 4 schematically shows the relative phase relationship among the input of the comb filter 36, the output of the IH delay element 34, and the output of the subtracter 35 for each IH at this time.

第4図において矢印の向きは各走査線上で同じ位相を持
つ信号(たとえば、バースト信号)の位相を示す。実際
には色信号はIHごとに反転しているのであるが、ここ
では図を見やすくするために位相反転は考えないことと
する。矢印は真右を向いている時が位相が同期している
ものとし、tは時間軸とする。いま、1=10において
へソドアンプの切り換えが行われ、入力信号が不連続に
なるとする。実際には色信号はIHごとに反転している
ので、減算器35の出力はくし型フィルタ36の入力と
IH遅延素子34の出力をベクトル的に加算したものと
なる。くし型フィルタ36の入力すなわち周波数変換器
33の出力と減算器35の出力を比較すればわかるよう
に、入力信号の位相が不連続となった後は減算器35の
出力信号の位相はなかなか真右を向かない。これは、位
相比較器39および電圧制御発振器32が位相誤差を小
さくしても、IH前の位相とベクトル的に加算されるた
めである。別の見方をすればくし型フィルタを除いたシ
ステムの位相に対する追従をくし型フィルタが抑制して
いるともいえる。
In FIG. 4, the direction of the arrow indicates the phase of a signal (for example, a burst signal) having the same phase on each scanning line. In reality, the color signal is inverted for each IH, but in order to make the diagram easier to read, phase inversion is not considered here. It is assumed that the phases of the arrows are synchronized when they point directly to the right, and t is the time axis. Assume now that the hesodon amplifier is switched at 1=10, and the input signal becomes discontinuous. Actually, since the color signal is inverted for each IH, the output of the subtracter 35 is the vectorial sum of the input of the comb filter 36 and the output of the IH delay element 34. As can be seen by comparing the input of the comb filter 36, that is, the output of the frequency converter 33, and the output of the subtracter 35, after the phase of the input signal becomes discontinuous, the phase of the output signal of the subtractor 35 is not very accurate. Don't turn to the right. This is because even if the phase comparator 39 and the voltage controlled oscillator 32 reduce the phase error, it is vectorially added to the phase before IH. From another perspective, it can be said that the comb filter suppresses tracking of the phase of the system excluding the comb filter.

発明が解決しようとする問題点 このような従来の信号処理装置では、入力信号が不連続
になった場合、切り換え直後のIHをのぞき、くし型フ
ィルタの入力位相よりも出力位相の方が位相誤差が大き
くなることになり、システム全体の位相に対する追従性
能はあまり良くない。
Problems to be Solved by the Invention In such a conventional signal processing device, when the input signal becomes discontinuous, the output phase of the comb filter has a larger phase error than the input phase, except for the IH immediately after switching. becomes large, and the phase tracking performance of the entire system is not very good.

本発明はかかる点に鑑み、システム全体の追従性能が良
く、すみやかに位相補正が行われるような位相同期装置
を提供することを目的としている。
In view of these points, it is an object of the present invention to provide a phase synchronization device that has good follow-up performance of the entire system and allows prompt phase correction.

問題点を解決するための手段 本発明は上記問題点を解決するため、第1図のように切
り換えスイッチを用いて遅延手段の人力を、入力端子か
らの信号または遅延手段の出力を所定量移相した信号の
いずれかとするという構成を備えたものである。
Means for Solving the Problems In order to solve the above-mentioned problems, the present invention uses a changeover switch as shown in FIG. It has a configuration in which one of the matching signals is used.

作用 本発明は上記した構成により、システムへの入力信号が
不連続になった直後の所定の期間は不連続になる直前の
信号またはそれを所定量移相した信号を減算器の人力と
するため、減算器においても位相補正が行われることに
なり、追従性能の良い位相間!tlI装置の構成が可能
になる。
According to the above-described configuration, the present invention uses the signal immediately before the discontinuity or the signal obtained by shifting the phase thereof by a predetermined amount for a predetermined period immediately after the input signal to the system becomes discontinuous as the manual input of the subtracter. , phase correction is also performed in the subtractor, resulting in better tracking performance between phases! tlI device configuration is possible.

実施例 以下本発明の一実施例の再生色信号復調器について図面
を参照しながら説明する。第1図は本発明の原理を示す
ブロック図である。スイッチ1は制御器2によって切り
換えられる。スイッチ1がa側に接続された場合、入力
端子3からの信号は減算器4および遅延手段5に入力さ
れる。追従手段5の出力は減算器4に入力され、入力端
子3からの信号から遅延手段5の出力信号を減算した信
号が減算器4の出力となり、出力端子6より出力される
。スイッチlがb側に接続された場合、遅延手段5の出
力は移相器7で所定量移相され、遅延手段5に入力され
るため、遅延手段5からは所定の遅延時間ごとに所定量
ずつ移相した信号が出力されることになる。
Embodiment Hereinafter, a reproduced color signal demodulator according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the principle of the present invention. Switch 1 is switched by controller 2. When the switch 1 is connected to the a side, the signal from the input terminal 3 is input to the subtracter 4 and the delay means 5. The output of the following means 5 is input to the subtracter 4, and the signal obtained by subtracting the output signal of the delay means 5 from the signal from the input terminal 3 becomes the output of the subtracter 4, and is output from the output terminal 6. When the switch l is connected to the b side, the output of the delay means 5 is phase-shifted by a predetermined amount by the phase shifter 7 and inputted to the delay means 5, so that the output of the delay means 5 is output by a predetermined amount at every predetermined delay time. A signal whose phase is shifted by 1.0 is output.

次に第2図に本発明の一実施例を示す。第2図は本発明
の信号処理装置1)を従来のくし型フィルタの代りに用
いた色信号復調器である。通常スイッチ12はa側に接
続されており、13号処理装置1)は(し型フィルタと
同じ働きをする。2Hカウンタ13は高速サーチ時に端
子14からのへソドアンプ切り換えパルスの立ち上りお
よび立ち下がりエツジを検出してスイッチ12を2Hの
期間す側に切り換える。IH遅延素子15の出力は減算
器16と180@移相器17に入力されるので、減算器
16にスイッチ12がb側に切り換えられる直前のIH
の信号をIHごとに反転した信号が入力される。先程と
同様に、このときの信号処理装置f12の入力、IH遅
延素子15の出力および減算器16の出力の関係を第5
図に示す。
Next, FIG. 2 shows an embodiment of the present invention. FIG. 2 shows a color signal demodulator using the signal processing device 1) of the present invention in place of a conventional comb filter. Normally, the switch 12 is connected to the a side, and the processing device 13 (1) has the same function as a rectangular filter.The 2H counter 13 detects the rising and falling edges of the negative amplifier switching pulse from the terminal 14 during high-speed search. is detected and the switch 12 is switched to the b side for a period of 2H.The output of the IH delay element 15 is input to the subtracter 16 and 180@phase shifter 17, so the subtracter 16 switches the switch 12 to the b side. IH just before
A signal inverted for each IH is input. As before, the relationship between the input of the signal processing device f12, the output of the IH delay element 15, and the output of the subtracter 16 at this time is expressed as
As shown in the figure.

1=1.でヘッドアンプ切り換えパルスのエツジを検出
し、1−1)までの2Hの期間スイッチ12はb側に接
続されるものとする。信号処理装置1)の入力と減算器
16の出力を比べれば、減算器で位相補正が行われてい
ることがわかる。また、第4図と比較すればスイッチ1
2をb側に接続した後のシステムの追従性能は従来のシ
ステムのそれを上回っていることがわかる。ここで、ス
イッチ12をb側に切り換える時間を2Hとしたのは次
の理由による。もしb側に切り換える時間をもっと長く
すると、それだけ位相に対する追従性能は良くなるが、
クロストークが増長されるラインがIHごとに現れるこ
とになるため、かえって画質が悪くなる。ゆえに切り換
えの期間は2Hとした。
1=1. It is assumed that the edge of the head amplifier switching pulse is detected at and the switch 12 is connected to the b side during the 2H period up to 1-1). By comparing the input of the signal processing device 1) and the output of the subtracter 16, it can be seen that phase correction is performed in the subtracter. Also, if you compare it with Figure 4, switch 1
It can be seen that the tracking performance of the system after connecting No. 2 to the b side exceeds that of the conventional system. Here, the reason why the time for switching the switch 12 to the b side is set to 2H is as follows. If the time to switch to the b side is made longer, the phase tracking performance will improve accordingly, but
Since a line with increased crosstalk appears for each IH, the image quality deteriorates on the contrary. Therefore, the switching period was set to 2H.

以上のように本実施例によれば、制御器を用いて遅延素
子の入力を切り換えることにより、入力信号が不連続に
なった場合の出力信号の位相の乱れを比較的速く補正で
き、追従性能の良い位相同期装置を実現できる。
As described above, according to this embodiment, by switching the input of the delay element using the controller, it is possible to relatively quickly correct the phase disturbance of the output signal when the input signal becomes discontinuous, and the tracking performance is improved. It is possible to realize a phase synchronization device with good performance.

発明の効果 以上述べてきたように、本発明によれば、入力信号が不
連続になった直後の位相同期装置の追従性能を向上させ
ることが可能になる。本発明を応用すれば引き込み時間
が比較的短い同期復調装置が実現できるようになり極め
て有用である。
Effects of the Invention As described above, according to the present invention, it is possible to improve the tracking performance of the phase synchronization device immediately after the input signal becomes discontinuous. Application of the present invention makes it possible to realize a synchronous demodulator with a relatively short pull-in time, which is extremely useful.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の信号処理装置の原理を示すブロック図
、第2図は本発明の一実施例である再生色信号復調器の
ブロック図、第3図は従来の再生色信号復調器のブロッ
ク図、第4図は高速サーチ時における従来の再生色信号
復調器の(し型フィルタの入出力の位相関係を表す模式
図、第5図は高速サーチ時における本発明の信号処理装
置の入出力の位相関係を表す模式図である。 1・・・・・・切り換えスイッチ、2・・・・・・制御
器、3・・・・・・入力端子、4・・・・・・減算器、
5・・・・・・遅延手段、6・・・・・・出力端子、7
・・・・・・移相器、1)・・・・・・信号処理装置、
12・・・・・・切り換えスイッチ、13・・・・・・
2Hカウンタ、14・・・・・・ヘッドアンプ切り換え
パルス入力端子、15・・・・・・IH遅延素子、16
・・・・・・減算器、17・・・・・・180°移相器
、18・・・・・・周波数変換器、19・・・・・・電
圧制御発振器、20・・・・・・位相比較器、21・・
・・・・水晶発振器、22・・・・・・低域変換色信号
入力端子、23・・・・・・水平同期信号入力端子、2
4・・・・・・出力端子、31・・・・・・入力端子、
32・・・・・・電圧制御発振器、33・・・・・・周
波数変換器、34・・・・・・IH遅延素子、35・・
・・・・減算器、36・・・・・・くし型フィルタ、3
7・・・・・・出力端子、38・・・・・・水晶発振器
、39・・・・・・位相比較器。
FIG. 1 is a block diagram showing the principle of the signal processing device of the present invention, FIG. 2 is a block diagram of a reproduced chrominance signal demodulator which is an embodiment of the present invention, and FIG. 3 is a block diagram of a conventional reproduced chrominance signal demodulator. 4 is a schematic diagram showing the phase relationship between the input and output of a rectangular filter of a conventional reproduced color signal demodulator at the time of high-speed search, and FIG. It is a schematic diagram showing the phase relationship of the output. 1... Changeover switch, 2... Controller, 3... Input terminal, 4... Subtractor. ,
5... Delay means, 6... Output terminal, 7
... Phase shifter, 1) ... Signal processing device,
12...... changeover switch, 13......
2H counter, 14...Head amplifier switching pulse input terminal, 15...IH delay element, 16
...Subtractor, 17...180° phase shifter, 18...Frequency converter, 19...Voltage controlled oscillator, 20...・Phase comparator, 21...
...Crystal oscillator, 22...Low frequency conversion color signal input terminal, 23...Horizontal synchronization signal input terminal, 2
4...Output terminal, 31...Input terminal,
32... Voltage controlled oscillator, 33... Frequency converter, 34... IH delay element, 35...
...Subtractor, 36...Comb filter, 3
7... Output terminal, 38... Crystal oscillator, 39... Phase comparator.

Claims (7)

【特許請求の範囲】[Claims] (1)信号を所定の時間遅延する遅延手段と、入力信号
から上記遅延手段出力信号を減算する減算器と、上記遅
延手段出力信号を所定量移相する移相器と、上記遅延手
段の入力を選択するスイッチと、上記スイッチを切り換
える制御器とで構成された信号処理装置。
(1) a delay means for delaying a signal by a predetermined time; a subtracter for subtracting the output signal of the delay means from the input signal; a phase shifter for shifting the phase of the output signal of the delay means by a predetermined amount; and an input of the delay means. A signal processing device comprising a switch for selecting the switch, and a controller for switching the switch.
(2)入力信号は映像信号とする特許請求の範囲第(1
)項記載の信号処理装置。
(2) The input signal is a video signal.
) The signal processing device described in item 2.
(3)入力信号は搬送色信号とする特許請求の範囲第(
1)項記載の信号処理装置。
(3) The input signal is a carrier color signal.
1) The signal processing device described in section 1).
(4)所定の時間は1水平方向走査期間とする特許請求
の範囲第(1)項記載の信号処理装置。
(4) The signal processing device according to claim (1), wherein the predetermined time is one horizontal scanning period.
(5)所定量は180°とする特許請求の範囲第(1)
項記載の信号処理装置。
(5) Claim No. (1) that the predetermined amount is 180°
The signal processing device described in Section 1.
(6)制御器は上記スイッチを2水平方向走査期間切り
換えるものとする特許請求の範囲第(1)項記載の信号
処理装置。
(6) The signal processing device according to claim (1), wherein the controller switches the switch for two horizontal scanning periods.
(7)入力信号は特殊再生時の搬送色信号とする特許請
求の範囲第(1)項記載の信号処理装置。
(7) The signal processing device according to claim (1), wherein the input signal is a carrier color signal during special reproduction.
JP62256538A 1987-10-12 1987-10-12 Signal processor Pending JPH0198394A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62256538A JPH0198394A (en) 1987-10-12 1987-10-12 Signal processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62256538A JPH0198394A (en) 1987-10-12 1987-10-12 Signal processor

Publications (1)

Publication Number Publication Date
JPH0198394A true JPH0198394A (en) 1989-04-17

Family

ID=17294018

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62256538A Pending JPH0198394A (en) 1987-10-12 1987-10-12 Signal processor

Country Status (1)

Country Link
JP (1) JPH0198394A (en)

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