JP3114912B2 - Delay device and video signal processing device using the delay device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a delay device generally used in a VTR reproducing circuit, and a video signal processing device such as a comb filter, a dropout compensator, a line noise canceller, and a noise reduction device using the delay device. It is about.

[0002]

2. Description of the Related Art FIG. 15 is a block circuit diagram showing an example of a conventional delay device. In the figure, 1 is an input terminal, 2 is a Charge Cou
A delay element for delaying an input video signal using a pld device (CCD) by one horizontal synchronization period (hereinafter also referred to as “1H”) (hereinafter referred to as “CCD 1H delay element”), 3 is an output terminal, and 4 is a color sub-device. Twice the frequency of the carrier 2 × 3.58
It is a fixed frequency oscillator that generates a control signal of MHz (hereinafter referred to as “2fsc”).

Next, the operation will be described. Input terminal 1
A reproduction luminance signal FM-demodulated from a video signal reproduced from a video tape shown in FIG. 16 by a video head (not shown) is input and supplied to the CCD 1H delay element 2. The fixed frequency oscillator 4 supplies a control signal of the frequency [2fsc] to the CCD 1H delay element 2, controls the delay time of the CCD 1H delay element 2, delays the input luminance signal by 1H, and outputs the luminance signal to the output terminal 3.

FIG. 16 is a diagram showing a tape pattern recorded on a video tape. In the figure, a video track has information of one field period, a luminance signal of 262.5H is recorded, and a track step of 1.5H in the standard mode and 0.5H in the triple mode is provided between adjacent tracks. is there.

At the time of normal reproduction, a video head (not shown) traces video tracks one by one as shown by a trace locus A in FIG. 16 and extracts video information recorded on a video tape. In this state, the original cycle period is naturally held in one horizontal synchronization period and one field period. As a result, the above relationship is also held in the reproduced luminance signal.

Next, at the time of a 3 × speed reverse search which is an example of a low speed search (hereinafter referred to as “speed search”) which is one of the special reproduction modes, a video head not shown in FIG. As shown by a trace locus B, the trace is made across five video tracks B. In this state, as described above, since there is a track step of 1.5H in the standard mode, 262.5H − (− 3-1) × 1.5H = 268.5 in one field period.
H information, and one horizontal synchronization period at this time is 16.67.
msec / (262.5 + 6) = 62.09 μsec, which is 16.67 m, which is one horizontal synchronization period during normal reproduction.
sec / 262.5 = 63.50 μsec.
A shift of 41 μsec occurs. However, as described above, since the CCD 1H delay element 2 is controlled by the control signal of the fixed frequency [2fsc] and the delay time is fixed,
It is not possible to perform a time delay corrected for a shift of 1.41 μsec as described above.

Therefore, in the conventional apparatus, the video track tracing speed of the video head (hereinafter referred to as the "video head tracing speed") is changed so that one horizontal synchronization period at the time of the 3x reverse search is reduced to one time at the time of the normal reproduction. By adjusting to the horizontal synchronization period, the above problem is avoided. In this case, the one-field period is shifted as compared with the one-field period during the normal reproduction. However, in the standard mode, when the search is performed from the 3 × reverse search to the 5 × fast forward (hereinafter, referred to as “−3 to 5 ×”). That is, at the time of a speed search having a track step of about 4 × 1.5H = about 6H, a stable reproduced image can be obtained without disturbing the vertical synchronization of the reproduced image.

Next, at the time of an 8 × speed reverse search, which is an example of a high speed search (hereinafter referred to as “high speed search”), which is one of the modes for special reproduction, a video head (not shown) As shown by trace locus C in FIG. 16, trace is performed over ten video tracks C. In this state, as described above, 262.5H − (− 8−1) × 1.5H in one field period.
= 276H, and one horizontal synchronization period at this time is 1
6.67 msec / (262.5 + 13.5) = 60.
This is 40 μsec, which is 3.1 μsec shifted from one horizontal synchronization period in normal reproduction. However, as in the case of the 3 × speed reverse search, by changing the trace speed of the video head, the same as in the speed search. In this way, problems can be avoided.

However, the track step is 9 × 1.5H = 1.
8x speed or more in the standard mode of about 3.5H (10x or more in fast forward search, 8x or more in reverse search)
If the speed is 26 times or more in the double mode (28 times or more in the fast forward search and 26 times or more in the reverse search), the vertical synchronization of the reproduced image is disturbed, and an inconvenient reproduced image such as vertical turning is generated.

Conventional example 2. FIG. 17 is a block circuit diagram showing an example of a conventional comb filter. In the figure, the same reference numerals as those in FIG. 15 indicate the same or corresponding parts, respectively, and reference numeral 5 denotes a subtractor.

Next, the operation will be described. At the time of normal reproduction, the video data is reproduced from the video tape shown in FIG.
A reproduced color signal frequency-converted to 58 MHz is input,
It is supplied to the CCD 1H delay element 2 and the subtractor 5. The fixed frequency oscillator 4 outputs a control signal having a frequency of 2 fsc to a CCD.
The reproduction color signal is supplied to the 1H delay element 2, the delay time is controlled, and the input reproduction color signal is delayed by 1H and supplied to the subtracter 5. The subtracter 5 subtracts the reproduced color signal delayed by 1H from the input reproduced color signal and outputs the reproduced color signal to the output terminal 3. Since the color signals have a correlation relationship around 1H, that is, a line correlation relationship, and a phase inversion relationship around 1H, the reproduced color signal has less noise than the input reproduced color signal. Becomes

The reproduced chrominance signal input to the input terminal 1 is 1.5H in standard mode between adjacent tracks in the standard mode, as described with reference to FIG.
There is a track step of 0.5H in the double mode, and the above relationship is maintained in the reproduced color signal during normal reproduction.

Next, at the time of the 3 × speed reverse search, a shift of 1.41 μsec occurs as compared with one horizontal synchronization period at the time of normal reproduction, as described in the conventional example 1. However, as described above, since the delay time of the CCD 1H delay element 2 is controlled by the control signal of the fixed frequency 2fsc and the delay time is fixed, it is possible to perform the time delay in which the above-described shift of 1.41 μsec is corrected. Therefore, the above-described line correlation cannot be used.

Therefore, in the conventional apparatus, as described in the conventional example 1, the tracing speed of the video head is changed,
The above-mentioned problem is avoided by matching one horizontal synchronization period in the triple speed reverse search with one horizontal synchronization period in the normal reproduction. Also in this case, as described in the conventional example 1,
At the time of speed search having a track step of about 6H or less in the standard mode, a stable reproduced image is obtained without disturbing the vertical synchronization of the reproduced image.

Next, even at the time of the 8 * speed reverse search, as described in the conventional example 1, the trace speed of the video head is changed to match the one horizontal synchronization period during normal reproduction, thereby performing the 3 * speed reverse search. As in the case described above, the problem can be avoided, but when the track step is about 13.5H, the vertical synchronization of the reproduced image is disturbed, and as a result, an inconvenient reproduced image such as vertical turning is generated.

Conventional Example 3. FIG. 18 is a block circuit diagram showing an example of a conventional dropout compensator, and the same reference numerals as those in FIG. 15 indicate the same or corresponding parts. In the figure, reference numeral 6 denotes a dropout detector for detecting a dropout of a reproduced luminance signal, and reference numeral 7 denotes a switch circuit controlled by a detection signal of the dropout detector 6.

Next, the operation will be described. Input terminal 1
, The reproduced luminance signal described in the conventional example 1 is input, and C
It is supplied to the CD1H delay element 2 and the B terminal of the switch circuit 7. The fixed frequency oscillator 4 supplies a control signal having a frequency of 2 fsc to the CCD 1H delay element 2, controls the delay time, delays the input reproduced luminance signal by one horizontal synchronization period, and supplies it to the A terminal of the switch circuit 7. On the other hand, the dropout detector 6 supplies a dropout signal to the switch circuit 7 when detecting a signal missing portion of the input reproduced luminance signal. The switch circuit 7 switches to the A terminal side only during the period in which the dropout signal is
The output signal of the 1H delay element 2 is selected and output to the output terminal 3. As a result, the output luminance signal is output from the output terminal 3 in which the signal of the signal missing period is replaced with the signal of the previous line, utilizing the generally well-known line correlation.

Next, at the time of the triple speed reverse search, a shift of 1.41 μsec occurs as compared with one horizontal synchronizing period at the time of normal reproduction, as described in the conventional example 1. The dropout compensator compensates with the reproduced luminance signal of the previous line using the line correlation as described above. But C
Since the delay time of the CD1H delay element 2 is controlled by the control signal of the fixed frequency 2fsc and the delay time is fixed, the time delay in which the above-described shift of 1.41 μsec is corrected cannot be performed. Collapse and the original compensation effect cannot be achieved.

Therefore, as described in the conventional example 1, by changing the tracing speed of the video head, one horizontal synchronization period in the triple speed reverse search is matched with one horizontal synchronization period in the normal reproduction, and the line correlation is changed. The relationship is maintained so that the dropout compensation function is maintained. Also in this case, as described in the conventional example 1, during the speed search having a track step of about 6H or less in the standard mode, the vertical synchronization of the reproduced image is not disturbed, and the reproduced image in which the stable dropout is compensated is obtained. Can be

Next, at the time of the 8x speed reverse search,
As described in the first conventional example, the drop-out compensation function can be maintained as in the case of the triple speed reverse search by changing the trace speed of the video head to match the one horizontal synchronization period during normal reproduction. But the track step is 1
At about 3.5H, the vertical synchronization of the reproduced image is disturbed, and as a result, an inconvenient reproduced image such as vertical turning is generated.

If the video head trace speed is not changed in order to avoid such vertical turning, as described in the first conventional example, one horizontal synchronization period at the time of the 8 × reverse search is performed. However, a shift of 3.10 μsec occurs with respect to one horizontal synchronization period at the time of normal reproduction, and the line correlation relationship is broken, so that the original compensation effect of the dropout compensator cannot be exhibited.

Conventional Example 4. FIG. 19 is a block circuit diagram showing an example of a conventional line noise canceller. The same reference numerals as those in the above-mentioned conventional example denote the same or corresponding parts. In the figure, 8 is a subtractor, and 9 is a limiter for limiting the amplitude.

Next, the operation will be described. The input terminal 1 receives the reproduced luminance signal described in the first conventional example,
The signal is supplied to the D1H delay element 2, the subtractor 5, and the subtractor 8. The fixed frequency oscillator 4 supplies a control signal having a frequency of 2 fsc to the CCD 1H delay element 2, controls the delay time, delays the input reproduction luminance signal by 1H, and supplies the same to the subtracter 8. The subtracter 8 subtracts a luminance signal delayed by 1H from the input reproduced luminance signal. If the luminance signal delayed by 1H has a line correlation with the input reproduced luminance signal 1H before, a noise signal having no correlation is obtained at the output of the subtracter 8, but this noise signal includes ,Normal,
A luminance difference component having no correlation is also included.

The limiter 9 limits the amplitude of the noise signal to remove a luminance difference component having a large amplitude and no correlation, and supplies a small signal that can be regarded as a noise component to the subtractor 5. The subtracter 5 subtracts a minute noise signal from the input reproduced luminance signal, and outputs a luminance signal having less noise than the input reproduced luminance signal to the output terminal 3.

Next, at the time of the triple speed reverse search, a shift of 1.41 μsec occurs as compared with one horizontal synchronizing period at the time of normal reproduction, as described in the conventional example 1. The line noise canceller extracts a noise signal using the line correlation as described above, but the CCD 1H delay element 2
Is controlled by a control signal having a fixed frequency of 2 fsc and the delay time is fixed.
Since the time delay corrected for the deviation of c cannot be performed, the relationship of the line correlation is broken and the original compensation effect cannot be obtained.

Therefore, as described in the conventional example 1, by changing the tracing speed of the video head, one horizontal synchronization period at the time of the 3 × speed reverse search is made to coincide with one horizontal synchronization period at the time of the normal reproduction, and the line correlation is changed. The noise canceller function is maintained so that the relationship is not broken. Also in this case, as described in the conventional example 1, during speed search having a track step of about 6H or less in the standard mode, the vertical synchronization of the reproduced image is not disturbed, and a stable special reproduced image can be obtained.

Next, at the time of the 8 × speed reverse search, as described in the conventional example 1, the trace speed of the video head is changed to match one horizontal synchronizing period at the time of normal reproduction. As described above, the noise canceller function can be maintained, but when the track step is about 13.5H, the vertical synchronization of the reproduced image is disturbed, and as a result, an inconvenient reproduced image such as vertical turning is generated.

If the video head tracing speed is not changed in order to avoid such vertical turning over, as described in the first conventional example, one horizontal synchronization period during the 8 × speed reverse search is performed. In this case, a shift of 3.10 μsec occurs in comparison with one horizontal synchronization period during normal reproduction, and the line correlation relationship is broken, so that the original noise improvement effect of the line noise canceller cannot be achieved.

Conventional Example 5 FIG. 20 is a block circuit diagram showing an example of a conventional luminance signal noise reduction device. The same reference numerals as those in the above-mentioned conventional example indicate the same or corresponding parts. In the figure, reference numeral 10 denotes an adder.

Next, the operation will be described. Input terminal 1
, The reproduced luminance signal described in the conventional example 1 is input, and C
The CD1H delay element 2, the adder 10, the subtractor 8, and the subtractor 5 are supplied. The fixed frequency oscillator 4 has a frequency 2f
The control signal of sc is supplied to the CCD 1H delay element 2, the delay time is controlled, and the input reproduced luminance signal is delayed by 1H and supplied to the adder 10 and the subtractor 8. The CCD 1H delay element 2 and the adder 10 form a loop, and as a result, the output signal of the adder 10 and the CCD 1H delay element 2
Is an averaged signal.

Next, the output signal of the CCD 1H delay element 2 is input to a subtractor 8 and is subtracted from the reproduced luminance signal to become a noise signal having no correlation, which is supplied to a limiter 9. The limiter 9 limits the amplitude of the input noise signal and supplies a small noise signal that can be regarded as a noise component to the subtractor 5. The subtracter 5 subtracts a minute noise signal from the input reproduced luminance signal, and outputs a luminance signal having less noise than the input reproduced luminance signal to the output terminal 3.

Next, at the time of the triple speed reverse search, as described in the conventional example 1, a shift of 1.41 μsec occurs compared to one horizontal synchronization period at the time of normal reproduction. The luminance signal noise reduction device extracts a noise signal using the line correlation as described above, but the CCD 1H delay element 2
Is controlled by a control signal having a fixed frequency of 2 fsc and the delay time is fixed.
Since the time delay corrected for the deviation of c cannot be performed, the relationship of the line correlation is broken and the original compensation effect cannot be obtained.

Therefore, as described in the conventional example 1, by changing the tracing speed of the video head, one horizontal synchronization period at the time of the 3 × speed reverse search is matched with one horizontal synchronization period at the time of normal reproduction, and the line correlation is changed. Is maintained so that the noise reduction function is maintained. Also in this case, Conventional Example 1
As described above, during the speed search having a track step of about 6H or less in the standard mode, the vertical synchronization of the reproduced image is not disturbed, and a stable special reproduced image can be obtained.

Next, at the time of the 8 * speed reverse search, as described in the conventional example 1, the trace speed of the video head is changed to match the one horizontal synchronizing period at the time of the normal reproduction, thereby performing the 3 * speed reverse search. As described above, the noise reduction function can be maintained, but when the track step is about 13.5H, the vertical synchronization of the reproduced image is disturbed, and as a result, an inconvenient reproduced image such as vertical turning is generated.

If the video head tracing speed is not changed in order to avoid such vertical turning over, as described in the first conventional example, one horizontal synchronization period during the 8 × speed reverse search is performed. In this case, a shift of 3.10 μsec occurs in comparison with one horizontal synchronization period during normal reproduction, and the line correlation relationship is broken, so that the original noise improvement effect of the luminance signal noise reduction device cannot be achieved.

Conventional example 6 FIG. 21 is a block circuit diagram showing an example of a conventional color signal noise reduction device. The same reference numerals as those in the above-mentioned conventional example indicate the same or corresponding parts. In the figure, 11 is a subtractor, 12 is a first adder, and 13 is a second adder.

Next, the operation will be described. Input terminal 1
, The reproduced color signal described in the conventional example 2 is input,
The D1H delay element 2, the subtractor 11, the adder 12, and the adder 13 are supplied. The fixed frequency oscillator 4 has a frequency 2
The control signal of fsc is supplied to the CCD 1H delay element 2, the delay time is controlled, and the input reproduced color signal is delayed by 1H and supplied to the subtractor 11 and the adder 12. The CCD 1H delay element 2 and the subtractor 11 form a loop, and the phase of the color signal is inverted every horizontal synchronization period. As a result, the output signal of the subtractor 11 and the CCD 1H
The output signal of the delay element 2 becomes an averaged color signal.

Next, the output signal of the CCD 1H delay element 2 is input to the adder 12, where it is added to the reproduced color signal to form a noise signal having no correlation, and is supplied to the limiter 9. The limiter 9 supplies a small noise signal which can be regarded as a noise component by limiting the amplitude of the noise signal to the adder 12.
The adder 12 adds the input reproduced color signal and the minute noise signal. Since the input reproduced color signal and the minute noise component have a phase inversion relationship, the output signal of the adder 13 is a color signal having less noise than the input reproduced color signal.

Next, at the time of the 3 × speed reverse search, as described in the conventional example 1, a shift of 1.41 μsec occurs compared to one horizontal synchronization period at the time of normal reproduction. Although the color signal noise reduction device extracts the noise signal using the line correlation as described above, the CCD 1H delay element 2
Is controlled by a control signal having a fixed frequency of 2 fsc and the delay time is fixed.
Since the time delay corrected for the shift of c cannot be performed, the relationship of the line correlation is broken and the original noise improvement effect cannot be achieved.

Therefore, as described in the conventional example 1, by changing the tracing speed of the video head, one horizontal synchronization period at the time of the 3 × reverse search is matched with one horizontal synchronization period at the time of normal reproduction, and the line correlation is changed. Is maintained so that the noise reduction function is maintained. Also in this case, Conventional Example 1
As described above, during the speed search having a track step of about 6H or less in the standard mode, the vertical synchronization of the reproduced image is not disturbed, and a stable special reproduced image can be obtained.

Next, even at the time of the 8 × speed reverse search, as described in the conventional example 1, the trace speed of the video head is changed to match one horizontal synchronization period at the time of the normal reproduction, and the 3 × speed reverse search is performed. The noise reduction function can be maintained as in the case of the above, but when the track step is about 13.5H, the vertical synchronization of the reproduced image is disturbed, and as a result, an inconvenient reproduced image such as vertical turning is generated.

If the video head tracing speed is not changed in order to avoid such vertical turning over, as described in the first conventional example, one horizontal synchronization period during the 8 × speed reverse search is performed. In this case, a shift of 3.10 μsec occurs in comparison with one horizontal synchronization period at the time of normal reproduction, and the line correlation relationship is broken. Therefore, the original noise improvement effect of the color signal noise reduction device cannot be exhibited.

[0043]

As described above, the conventional delay device using the CCD 1H delay element has the following features.
At the time of high speed search with a track step of about 5H,
In other words, 8x speed or more in the standard mode (1
At 0 times or more, at least 8 times at the time of reverse search, at 26 times or more at the 3x mode (at 28 times or more at the time of fast forward search, at least 26 times at the time of reverse search), change the trace speed of the video head. One horizontal synchronization period is set to 1 during normal playback.
Even if the period is set to be the same as the horizontal synchronization period, the vertical synchronization is disturbed. However, since the control signal of the CCD 1H delay element is fixed at 2 fsc, there is a problem that the signal cannot be delayed according to one horizontal synchronization period during normal reproduction.

Similarly, the comb filter, the dropout compensator, the line noise canceller, and the noise reduction device using the above-mentioned conventional delay device similarly perform the trace speed of the video head at the time of the high speed search in which the track step is about 13.5H. If one horizontal synchronization period is changed to one horizontal synchronization period during normal playback, the vertical synchronization is disturbed,
Further, if the tracing speed of the video head is changed so that the vertical synchronization is not disturbed, there is a problem that the line correlation relationship is broken and the original function of the apparatus cannot be achieved.

The present invention has been made in order to solve the above-described problems. The delay time of a reproduced luminance signal or reproduced color signal is set to be one horizontal synchronization period regardless of the trace speed of a video head. An object of the present invention is to provide a delay device that can be delayed by the same time, and a comb filter, a dropout compensator, a line noise canceller, and a noise reduction device using the delay device.

[0046]

SUMMARY OF THE INVENTION The delay apparatus according to the present invention, the reproduction luminance signal which is FM demodulated from a video signal reproduced by the VTR is inputted, the delay element delay time is determined by the frequency of the control signal When one of the even bets not a Ki said reproduced luminance signal to the field frequency [fV] of the video signal
A variable frequency oscillator is provided which generates a control signal having a frequency delayed by an amount corresponding to the horizontal synchronization period and inputs the control signal to the delay element.

The delay device according to the present invention selects a fixed frequency oscillator that generates a control signal having a frequency [2fsc] twice as high as the color subcarrier, and an output signal of the fixed frequency oscillator during normal reproduction of a VTR. At the time of special reproduction, a switch circuit for selecting an output signal of the variable frequency oscillator and inputting it to the delay element as a control signal is provided.

The delay device according to the present invention comprises a fixed frequency oscillator for generating a control signal having a frequency [2fsc] twice as high as the color subcarrier, and a fixed frequency oscillator for performing a speed search during normal reproduction and special reproduction of a VTR. And a switch circuit for selecting the output signal of the variable frequency oscillator and inputting it to the delay element as a control signal at the time of high speed search during special reproduction.

In the delay device according to the present invention, the variable frequency oscillator divides the phase of the signal obtained by dividing the field frequency [fV] of the video signal by 2 and the output signal frequency [2fsc '] of the voltage controlled oscillator by 455. And then $ 525-2m
(N-1)｝ frequency division (where n is the ratio of the running speed of the video tape during special playback to that during normal playback, and m is the level difference of the video track in the recording mode of the video tape.
The value of the horizontal synchronization period).
An arithmetic unit for transmitting a voltage signal having a value corresponding to the phase difference between the two signals, and controlled by the voltage signal of this arithmetic unit, the following equation 2fsc '= [{262.5-m (n-1)} / 262.5] ( L
/ 455) A voltage controlled oscillator that generates a control signal of a variable frequency [2fsc '] determined by 2fsc, and the delay element is an L-bit CC
D.

[0050] A comb filter for a luminance signal according to the present invention is characterized in that the delay device according to any one of the first to fourth aspects and the reproduced luminance signal input to the delay element of the delay device have the same characteristics. An adder for adding the output signals of the delay elements is provided.

A dropout compensating apparatus according to the present invention comprises a delay device according to any one of claims 1 to 4 , a dropout detector for detecting a dropout of a video signal, and a dropout detector for detecting the dropout. A switch circuit which is controlled by a signal and selects a reproduction luminance signal input to the delay element of the delay device when dropout is not detected, and selects and outputs an output signal of the delay element when dropout is detected. It is provided with.

A line noise canceller according to the present invention comprises a delay device according to any one of claims 1 to 4 , and an output of the delay device which is obtained from a reproduced luminance signal input to the delay device of the delay device. A first subtractor for subtracting the signal, a limiter circuit for limiting the amplitude of the output signal of the first subtractor, and a second subtractor for subtracting the output signal of the limiter circuit from the reproduced luminance signal It is a thing.

A luminance signal noise reduction device according to the present invention comprises: a delay device according to any one of claims 1 to 4 ; and an output signal of a delay element of the delay device being input to a reproduced luminance signal. An adder for adding the delay signal to the delay element; a first subtractor for subtracting the output signal of the delay element from the reproduced luminance signal; and a limiter circuit for limiting the amplitude of the output signal of the first subtractor And a second subtractor for subtracting the output signal of the limiter circuit from the reproduced luminance signal.

[0054]

The delay device according to the present invention uses a delay element based on a control signal of a frequency [2fsc '] based on a field frequency [fV] of a video signal input from a variable frequency oscillator in both normal reproduction and special reproduction. the reproduced luminance signal which is input to and delayed by the time corresponding to one horizontal synchronization period of the reproduced luminance signal.

In the delay device according to the present invention, during normal reproduction, the delay time of the delay element is controlled by an output signal of a fixed frequency oscillator that generates a control signal having a frequency [2fsc] twice as high as the color subcarrier. During reproduction, the delay time of the delay element is controlled by the output signal of the variable frequency oscillator.

The delay device according to the present invention controls the delay time of the delay element by the control signal of the frequency [2 fsc] of the fixed frequency oscillator at the time of the speed search at the time of the normal reproduction and the special reproduction. At the time of search, the delay time of the delay element is controlled by a control signal of the frequency [2fsc '] of the variable frequency oscillator.

The arithmetic unit constituting the variable frequency oscillator of the delay device according to the present invention calculates the phase of the signal obtained by dividing the field frequency [fV] of the video signal by two and the output signal frequency [2fsc '] of the voltage controlled oscillator. 455 frequency division, and further {525-2m (n-1)} frequency division (where n is the running speed ratio of the video tape at the time of special reproduction to the time of normal reproduction,
m is a value representing the level difference of the video track in the recording mode of the video tape in one horizontal synchronization period), and a voltage signal having a value corresponding to the phase difference between the two signals is transmitted. Further, the voltage controlled oscillator is controlled by the voltage signal of this arithmetic unit, and the following equation 2fsc '= [{262.5-m (n-1)} / 262.5] (L
/ 455) Generates a control signal having a variable frequency [2fsc '] determined by 2fsc.

[0058] Delay unit of comb filter luminance signal according to the present invention, both the normal playback and special playback, the reproduced luminance signal which is input to the delay element, corresponding to one horizontal synchronization period of the reproduced luminance signal Therefore, the line correlation is always maintained.

The delay device of the dropout compensator according to the present invention converts the reproduced luminance signal input to the delay element into one of the reproduced luminance signals at the time of normal reproduction and special reproduction.
Since the delay is the time corresponding to the horizontal synchronization period, the relationship of the line correlation is always maintained.

The delay device of the line noise canceller according to the present invention is capable of converting the reproduced luminance signal or reproduced color signal input to the delay element into one horizontal synchronization period of the reproduced luminance signal or reproduced color signal at the time of normal reproduction and special reproduction. , The line correlation is always maintained.

The delay device of the luminance signal noise reduction device according to the present invention converts the reproduced luminance signal input to the delay element to one of the reproduced luminance signals during normal reproduction and special reproduction.
Since the delay is the time corresponding to the horizontal synchronization period, the relationship of the line correlation is always maintained.

[0062]

[Embodiment 1] An embodiment of the present invention will be described below with reference to the drawings. FIG.
1 is a block circuit diagram showing a delay device according to a first embodiment of the present invention, in which the same reference numerals as those in the conventional example 1 indicate the same or corresponding parts, respectively, and reference numeral 14 denotes one field frequency [fV ] Signal (hereinafter,
An input terminal to which a “video field signal” is input, 15 is an arithmetic unit, 16 is a voltage controlled oscillator (hereinafter, “V
CO "), the arithmetic unit 15 and the VCO 16 constitute a variable frequency oscillator 17 for outputting a variable frequency control signal whose oscillation frequency changes in accordance with the frequency [fV] of the video field signal.

Next, the configuration of the arithmetic unit 15 will be described. 18
Denotes a first interface circuit which is constituted by a counter or the like, and receives a video field signal from an input terminal 1. 19 is a 1/2 frequency divider for dividing the input signal by 2;
Denotes a second interface circuit, which is constituted by a counter or the like, and to which an output signal of the VCO 16 is input. 21 is a 1/455 frequency divider for dividing the frequency of the input signal by 455, 2
Reference numeral 2 denotes a variable frequency divider which applies an input signal to a video tape according to the running state of the video tape during the special reproduction of the VTR and the recording mode of the video tape (hereinafter referred to as "tape running state").
Divide the frequency by 2m (n-1)｝. Here, m is a value representing the level difference of the video track in the recording mode of the video tape in units of one horizontal synchronization period [H].
It is 0.5 in the 5 and 3 times modes. Further, n is a running speed ratio of the video tape at the time of trick play to the time of normal play,
During normal reproduction, the value is +2 at the time of double speed fast forward, and is -2 at the time of double speed reverse return. 23 is a phase comparator for comparing phases,
Reference numeral 24 denotes a voltage converter for converting the phase difference signal input from the phase comparator 23 into a voltage signal.
If it is a WM signal, it is composed of an LPF that outputs a voltage signal according to the pulse width. The output voltage signal of the voltage converter 24 is input to the VCO 16 as a control voltage.

Next, the operation of the first embodiment will be described.
In the first embodiment, the 1H delay time of the CCD 1H delay element 2 is changed by changing the frequency of the control signal without changing the trace speed of the video head at the time of normal reproduction and special reproduction. This is to match one horizontal synchronization period.

First, the following equation (1) is established between the frequency [2fsc] of the output signal of the conventional fixed frequency oscillator 4 and the one horizontal synchronizing frequency [fH] during normal reproduction. It is widely known that there is. 2fsc = 455 fH (1) For the sake of simplicity, if the tracing speed of the video head is not changed, the frequency [fV] of the video field signal and the running state of the tape during special reproduction are determined. One horizontal synchronizing frequency of the changing reproduction luminance signal (hereinafter, referred to as
“Fake horizontal sync frequency”) [fH ']
As explained in the conventional example, the following equation (2) holds. (1 / fV) = {262.5-m (n-1)} (1 / fH ') (2) Furthermore, during normal reproduction, the above-mentioned [fH] and [fH'] have the same relationship. Therefore, the relationship of the following expression (3) holds from the expression (2). (1 / fV) = 262.5 (1 / fH) (3) From the equations (2) and (3), the following equation (4) holds. (262.5 / fH) = {262.5−m (n−1)} (1 / fH ′) (4) From the equations (1) and (4), [2fsc] and [fH
'], The following relationship (5) holds. (455 / 2fsc) × 262.5 = {262.5−m (n−1)} (1 / fH ′) (5)

Here, for example, if the CCD 1H delay element 2 is 4
Assuming that there are 55 bits, this delay time is [1
/ FH '] and [1 / fH'] and [1 / 2fs
c ′] with the following equation (6). (1 / fH ') = 455 (1 / 2fsc') (6) From the equations (5) and (6), [2fsc] and [2fs
c ′] and the following equation (7) must be satisfied. (2fsc ′ / 2fsc) = {262.5−m (n−1)} / 262.5 (7) Therefore, the delay time of the CCD 1H delay element 2 is set to the delay time [1 / fH ′] corresponding to the pseudo horizontal synchronization frequency. In order to obtain the frequency [2fs
c '] may be supplied to the CCD 1H delay element 2.

When the CCD 1H delay element 2 is constituted by an L-bit CCD, the above equation (7) is expressed by the following equation (8). (2fsc ′ / 2fsc) = [{262.5−m (n−1)} / 262.5] (L / 455) (8)

Next, the operation of the first embodiment during normal reproduction will be described. A video field signal of a frequency [fV] is input from an input terminal 14, and is input to a 1/2 frequency divider 19 via a first interface circuit 18 of a computing unit 15, and becomes a signal of a frequency [fV / 2]. Phase comparator 23
Is input to On the other hand, the frequency [2fs
c ′] is input to the 1/455 frequency divider 21 via the second interface circuit 20, and the frequency [2fs
c ′ / 455] and is input to the variable frequency divider 22, and the frequency [2fsc ′ / 455 × ｛525−2m (n−
1) The signal of｝] is input to the phase comparator 23.

The frequency division ratio of the variable frequency divider 22 [1 / $ 525-
2m (n-1)}] varies according to the tape running state and the like, but the frequency of the output signal of the variable frequency divider 22 is substantially [fv / 2] and supplied to the phase comparator 23. You.
The phase comparator 23 compares the phases of the two signals described above, and outputs a phase difference signal obtained by converting the detected phase difference into a pulse width to the voltage converter 24. The voltage converter 24 converts a voltage signal having a value corresponding to the pulse width of the input phase difference signal into a VC signal.
O16 is supplied as a control voltage, and the VCO 16 outputs a control signal having a frequency corresponding to the control voltage.

The arithmetic unit 15 described above can be realized by a digital circuit or a microcomputer.

At the time of normal reproduction, the frequency of the control signal output from the VCO 16 is locked at [2 fsc].
In addition to the interface circuit 20 of the arithmetic unit 15, a CCD
It is also supplied to the 1H delay element 2. On the other hand, the reproduced luminance signal input to the input terminal 1 is supplied to the CCD 1H delay element 2 and its delay time is controlled by a control signal of the frequency [2 fsc], and is delayed by 1 H by the CCD 1H delay element 2 as in the conventional example. Output to the output terminal 3.

Next, at the time of special reproduction, the frequency division ratio of the variable frequency divider 22 changes depending on the tape running state and the like, and the control signal output from the VCO 16 accordingly has a frequency satisfying the relationship of the equation (7). [2fsc ']. This allows CC
The delay time of the D1H delay element 2 is substantially equal to the pseudo-horizontal synchronization frequency [f
H ′] is maintained at the delay time [1 / fH ′].
Therefore, even at the time of high speed search in which the track step is about 13.5H, the pseudo horizontal synchronization frequency [f
H ′], a delay device that can be delayed by a delay time [1 / fH ′] corresponding to H ′ ′ is obtained.

Embodiment 2 FIG. FIG. 2 is a block circuit diagram showing a delay device according to a second embodiment of the present invention. The same reference numerals as those in the first embodiment and the conventional example 1 indicate the same parts. In the figure, reference numeral 25 denotes a switch circuit for switching the output signal of the fixed frequency oscillator 4 and the output signal of the VCO 16, which selects a control signal of a fixed frequency [2fsc] output from the fixed frequency oscillator 4 during normal reproduction, and outputs from the VCO 16 during special reproduction. Frequency [2fs
c ′] and supplies it to the CCD 1H delay element 2.

In the second embodiment, the tracing speed of the video head is set to be the same as the tracing speed in the normal reproduction in both the normal reproduction and the special reproduction. In the normal reproduction, the control signal of the CCD 1H delay element 2 is added to the fixed frequency oscillator. The control signal of the fixed frequency [2 fsc] output from the VCO 4 and the control signal of the frequency [2 fsc '] output from the VCO 16 are used to input the 1H delay time of the CCD 1H delay element 2 during the special reproduction. This is adapted to match the delay time corresponding to the pseudo horizontal synchronization frequency of the reproduced luminance signal.

According to the second embodiment, in addition to the same effects as those of the first embodiment, there can be obtained an effect that the corresponding range of the VCO can be widened.

Embodiment 3 FIG. A block circuit diagram illustrating a delay device according to a third embodiment of the present invention is the same as that of FIG. 2 except for the operation of the switch circuit 25. That is, the switch circuit 25 selects the control signal of the fixed frequency [2 fsc] output from the fixed frequency oscillator 4 at the time of the speed search at the time of the normal reproduction and the special reproduction, and the VCO 16 only performs the high speed search at the time of the special reproduction. The control signal of the output frequency [2fsc '] is selected and supplied to the CCD 1H delay element 2.

In the third embodiment, the fixed frequency [2fsc] output from the fixed frequency oscillator 4 is added to the control signal of the CCD 1H delay element 2 during normal reproduction and speed search.
During the speed search, the trace speed of the video head is changed to match the 1H delay time of the CCD 1H delay element 2 with one horizontal synchronization period of the input reproduction luminance signal. The tracing speed is set to be the same as the tracing speed at the time of normal reproduction, and the 1H delay time of the CCD 1H delay element 2 is simulated using the control signal of the frequency [2fsc '] output from the VCO 16 to simulate the input reproduction luminance signal. The delay time is set to a delay time corresponding to the horizontal synchronization frequency.

According to the third embodiment, in addition to the same effects as those of the first embodiment, an effect that the corresponding range of the VCO can be further increased can be obtained.

Embodiment 4 FIG. FIG. 3 is a block circuit diagram showing a color signal comb filter according to Embodiment 4 of the present invention. The same reference numerals as those in Embodiment 1 and Conventional Example 2 indicate the same or corresponding parts.

Next, the operation of the fourth embodiment will be described. A video field signal having a frequency [fV] is input from the input terminal 14, and the arithmetic unit 15 operates in the same manner as described in the first embodiment, outputs a control voltage to the VCO 16, and outputs the control voltage to the VCO 16.
Outputs a control signal of frequency [2fsc '] and outputs
And the CCD 1H delay element 2. The CCD 1H delay element 2 converts the reproduced color signal input from the input terminal 1 into the frequency [2fs
c ′] is supplied to the subtractor 5 after being delayed by 1H, and the subtractor 5 subtracts the 1H-delayed reproduced color signal from the input reproduced color signal to output a reproduced color signal with less noise.

As described in the first embodiment, the arithmetic unit 15 outputs a control voltage for locking the control signal output from the VCO 16 to the frequency [fsc] during normal reproduction, and outputs the control voltage from the VCO 16 during special reproduction. The control signal frequency [2fsc '] is the tape mode, (standard mode, 3
Double mode) and tape running mode (normal playback,
1H delay time [1 / fH ′] corresponding to the pseudo-horizontal synchronization frequency [fH ′]. Is output. For this reason, the line correlation relationship is always maintained from the time of normal reproduction to the time of high-speed search in which the track step is about 13.5H, so that the comb for color signals that normally operates even in high-speed search is particularly provided. A filter is obtained.

Embodiment 5 FIG. FIG. 4 is a block circuit diagram showing a color signal comb filter according to Embodiment 5 of the present invention. The same reference numerals as those in Embodiment 2 and Conventional Example 2 indicate the same or corresponding parts.

In the fifth embodiment, as described in the second embodiment, the tracing speed of the video head is set to be the same as the tracing speed in the normal reproduction at the time of the normal reproduction and the special reproduction. The fixed frequency [2fs] output from the fixed frequency oscillator 4 is added to the control signal of the CCD 1H delay element 2.
c], and at the time of special reproduction, using the control signal of the frequency [2fsc '] output from the VCO 16,
The 1H delay time of the CCD 1H delay element 2 is adjusted to the delay time corresponding to the pseudo horizontal synchronization frequency of the input reproduced luminance signal.

According to the fifth embodiment, in addition to the same effects as those of the fourth embodiment, there can be obtained an effect that the corresponding range of the VCO can be enlarged.

Embodiment 6 FIG. A block circuit diagram showing a color signal comb filter according to Embodiment 6 of the present invention is the same as that of FIG. That is, the switch circuit 25 selects the control signal of the fixed frequency [2 fsc] output from the fixed frequency oscillator 4 at the time of the speed search at the time of the normal reproduction and the special reproduction.
The control signal of the frequency [2fsc '] output from the CO 16 is selected and supplied to the CCD 1H delay element 2.

In the sixth embodiment, the fixed frequency [2fsc] output from the fixed frequency oscillator 4 is added to the control signal of the CCD 1H delay element 2 during normal reproduction and speed search.
During the speed search, the trace speed of the video head is changed to match the 1H delay time of the CCD 1H delay element 2 with one horizontal synchronization period of the input reproduction luminance signal. The tracing speed is made the same as the tracing speed at the time of the normal reproduction, and the 1H delay time of the CCD 1H delay element 2 is set to the pseudo horizontal level of the input reproduction luminance signal by using the control signal of the frequency [2fsc '] output from the VCO 16. This is set to match the delay time corresponding to the synchronization frequency.

According to the sixth embodiment, in addition to the same effect as that of the fourth embodiment, an effect that the corresponding range of the VCO can be further enlarged can be obtained.

Embodiment 7 FIG. FIG. 5 is a block circuit diagram showing a luminance signal comb filter according to Embodiment 7 of the present invention. The same reference numerals as those in Embodiment 1 and Conventional Example 2 indicate the same or corresponding parts, respectively.
Reference numeral 26 denotes an adder to which a reproduction luminance signal is input.

Next, the operation of the seventh embodiment will be described. In the seventh embodiment, as described in the fourth embodiment, the frequency [2] output from the fixed frequency oscillator 4 by the switch circuit 25 at the time of the speed search during the normal reproduction and the special reproduction.
fsc], and the frequency [2f] output from the VCO 16 only at the time of high speed search during special reproduction.
sc ′] is input to the CCD 1H delay element 2, and the 1H delay time of the CCD 1H delay element 2 is set to 1H delay time [1 / fH ′] corresponding to the pseudo horizontal synchronization frequency [fH ′]. Become.

According to the seventh embodiment, the line correlation is always maintained from the time of normal reproduction to the time of high speed search in which the track step is about 13.5H. A comb filter for the operating luminance signal is obtained.

Embodiment 8 FIG. FIG. 6 is a block circuit diagram showing a comb filter for a luminance signal according to an eighth embodiment of the present invention. The same reference numerals as those in the second embodiment and the conventional example 2 indicate the same or corresponding parts.

In the eighth embodiment, as described in the second embodiment, the tracing speed of the video head is set to be the same as the tracing speed of the normal reproduction at the time of the normal reproduction and the special reproduction. The fixed frequency [2fs] output from the fixed frequency oscillator 4 is added to the control signal of the CCD 1H delay element 2.
c], and at the time of special reproduction, using the control signal of the frequency [2fsc '] output from the VCO 16,
The 1H delay time of the CCD 1H delay element 2 is adjusted to the delay time corresponding to the pseudo horizontal synchronization frequency of the input reproduced luminance signal.

According to the eighth embodiment, in addition to the same effects as those of the seventh embodiment, the effect that the corresponding range of the VCO can be enlarged can be obtained.

Embodiment 9 FIG.

A block circuit diagram showing a comb filter for a luminance signal according to the ninth embodiment of the present invention is the same as that of FIG. That is, the switch circuit 25
Is the fixed frequency [2f output from the fixed frequency oscillator 4 during speed search during normal reproduction and special reproduction.
sc] and a frequency [2fs] output from the VCO 16 only during a high speed search during special reproduction.
c ′] and supplies it to the CCD 1H delay element 2.

In the ninth embodiment, the fixed frequency [2fsc] output from the fixed frequency oscillator 4 is used as the control signal for the CCD 1H delay element 2 during normal reproduction and speed search.
During the speed search, the trace speed of the video head is changed to match the 1H delay time of the CCD 1H delay element 2 with one horizontal synchronization period of the input reproduction luminance signal. The tracing speed is set to be the same as the tracing speed at the time of normal reproduction, and the 1H delay time of the CCD 1H delay element 2 is simulated using the control signal of the frequency [2fsc '] output from the VCO 16 to simulate the input reproduction luminance signal. The delay time is set to a delay time corresponding to the horizontal synchronization frequency.

According to the ninth embodiment, in addition to the same effects as those of the seventh embodiment, the effect that the corresponding range of the VCO can be further enlarged can be obtained.

Embodiment 10 FIG. FIG. 7 is a block circuit diagram showing a dropout compensator according to a tenth embodiment of the present invention. The same reference numerals as those in the first embodiment and the third conventional example denote the same or corresponding parts.

Next, the operation of the tenth embodiment will be described. A video field signal having a frequency [fV] is input from the input terminal 14, and the operation unit 15 operates in the same manner as described in the first embodiment, outputs a control voltage to the VCO 16,
Outputs a control signal of frequency [2fsc '] and outputs
And the CCD 1H delay element 2. The CCD 1H delay element 2 converts the reproduced luminance signal input from the input terminal 1 into a control signal frequency [2f
sc ′] and supplies it to the B terminal of the switch circuit 7 with a delay of 1H. On the other hand, the dropout detector 6 supplies a dropout signal to the switch circuit 7 when detecting a signal missing portion of the input reproduced luminance signal. The switch circuit 7 operates only for a period during which the dropout signal is input.
Switching to the terminal side, the output signal of the CCD 1H delay element 2 is selected and output to the output terminal 3.

As a result, the relationship of the line correlation is always maintained from the time of normal reproduction to the time of a high-speed search in which the track step is about 13.5H. A device is obtained.

Embodiment 11 FIG. FIG. 8 is a block circuit diagram showing a dropout compensator according to an eleventh embodiment of the present invention. The same reference numerals as those in the second embodiment and the conventional example 3 indicate the same or corresponding parts.

In the eleventh embodiment, in the same manner as described in the second embodiment, the tracing speed of the video head is set to be the same as the tracing speed in the normal reproduction in both the normal reproduction and the special reproduction. The fixed frequency [2f] output from the fixed frequency oscillator 4 is added to the control signal of the CCD 1H delay element 2.
sc], and at the time of special reproduction, using the control signal of the frequency [2 fsc ′] output from the VCO 16,
The 1H delay time of the CCD 1H delay element 2 is adjusted to the delay time corresponding to the pseudo horizontal synchronization frequency of the input reproduced luminance signal.

According to the eleventh embodiment, in addition to the same effects as those of the tenth embodiment, the effect that the corresponding range of the VCO can be enlarged can be obtained.

Embodiment 12 FIG. A block circuit diagram illustrating a dropout compensating apparatus according to a twelfth embodiment of the present invention is the same as that of FIG. That is, the switch circuit 25 selects the control signal of the fixed frequency [2 fsc] output from the fixed frequency oscillator 4 at the time of the speed search at the time of the normal reproduction and the special reproduction, and only at the time of the high speed search at the time of the special reproduction.
The control signal of the frequency [2fsc '] output from the VCO 16 is selected and supplied to the CCD 1H delay element 2.

In the twelfth embodiment, at the time of normal reproduction and at the time of speed search, the control signal of the CCD 1H delay element 2 is used as the fixed frequency [2fs
c), and at the time of speed search, the CCD 1H
The 1H delay time of the delay element 2 is adjusted to one horizontal synchronization period of the input reproduced luminance signal, and at the time of high speed search,
The tracing speed of the video head is set to be the same as the tracing speed at the time of normal reproduction, and the 1H delay time of the CCD 1H delay element 2 is changed by the control signal of the frequency [2fsc '] output from the VCO 16 to the input reproduction luminance. The delay time corresponds to the pseudo horizontal synchronization frequency of the signal.

According to the twelfth embodiment, in addition to the same effects as those of the tenth embodiment, the effect that the corresponding range of the VCO can be further enlarged can be obtained.

Embodiment 13 FIG. FIG. 9 is a block circuit diagram showing a line noise canceller according to a thirteenth embodiment of the present invention. The same reference numerals as those in the first embodiment and the conventional example 4 denote the same or corresponding parts.

Next, the operation of the thirteenth embodiment will be described. A video field signal having a frequency [fV] is input from the input terminal 14, and the operation unit 15 operates in the same manner as described in the first embodiment, outputs a control voltage to the VCO 16,
Outputs a control signal of frequency [2fsc '] and outputs
And the CCD 1H delay element 2. The CCD 1H delay element 2 converts the reproduced luminance signal input from the input terminal 1 into a control signal frequency [2f
sc ′] and supplies it to the subtractor 8 with a delay of 1H. The subtracter 8 subtracts a luminance signal delayed by 1H from the input reproduced luminance signal. The luminance signal delayed by 1H is 1
If there is a line correlation with the input reproduced luminance signal before H, a noise signal having no correlation is obtained at the output of the subtracter 8, and this noise signal usually has a luminance having no correlation. A difference component is also included.

The limiter 9 limits the amplitude of the noise signal, removes a luminance difference component having a large amplitude and no correlation, and supplies a small signal that can be regarded as a noise component to the subtractor 5. The subtracter 5 subtracts a minute noise signal from the input reproduced luminance signal, and outputs a luminance signal having less noise than the input reproduced luminance signal to the output terminal 3.

As a result, the line correlation relationship is always maintained from the time of normal reproduction to the time of high-speed search in which the track step is about 13.5H, so that a line noise canceller that normally operates even during high-speed search is provided. can get.

Embodiment 14 FIG. FIG. 10 is a block circuit diagram showing a line noise canceller according to Embodiment 11 of the present invention.
The same reference numerals denote the same or corresponding parts.

In the fourteenth embodiment, in the same manner as described in the second embodiment, the trace speed of the video head is set to be the same as the trace speed in the normal reproduction in both the normal reproduction and the special reproduction. The fixed frequency [2f] output from the fixed frequency oscillator 4 is added to the control signal of the CCD 1H delay element 2.
sc], and at the time of special reproduction, using the control signal of the frequency [2 fsc ′] output from the VCO 16,
The 1H delay time of the CCD 1H delay element 2 is adjusted to the delay time corresponding to the pseudo horizontal synchronization frequency of the input reproduced luminance signal.

According to the fourteenth embodiment, in addition to the same effects as in the thirteenth embodiment, the effect that the corresponding range of the VCO can be enlarged can be obtained.

Embodiment 15 FIG. A block circuit diagram showing a line noise canceller according to Embodiment 15 of the present invention is the same as that of FIG. That is, the switch circuit 25 selects the control signal of the fixed frequency [2 fsc] output from the fixed frequency oscillator 4 at the time of the speed search at the time of the normal reproduction and the special reproduction, and the VCO 16 only performs the high speed search at the time of the special reproduction. The control signal of the output frequency [2fsc '] is selected and supplied to the CCD 1H delay element 2.

In the fifteenth embodiment, at the time of normal reproduction and speed search, the fixed signal [2fs
c), and at the time of speed search, the CCD 1H
The 1H delay time of the delay element 2 is adjusted to one horizontal synchronization period of the input reproduced luminance signal, and at the time of high speed search,
The tracing speed of the video head is set to be the same as the tracing speed at the time of normal reproduction, and the 1H delay time of the CCD 1H delay element 2 is changed by the control signal of the frequency [2fsc '] output from the VCO 16 to the input reproduction luminance. The delay time corresponds to the pseudo horizontal synchronization frequency of the signal.

According to the fifteenth embodiment, in addition to the same effects as in the thirteenth embodiment, the effect that the corresponding range of the VCO can be further enlarged can be obtained.

Embodiment 16 FIG. FIG. 11 is a block circuit diagram showing a luminance signal noise reduction apparatus according to Embodiment 16 of the present invention. The same reference numerals as those in Embodiment 1 and Conventional Example 5 indicate the same or corresponding parts.

Next, the operation of the sixteenth embodiment will be described. A video field signal having a frequency [fV] is input from the input terminal 14, and the operation unit 15 operates in the same manner as described in the first embodiment, outputs a control voltage to the VCO 16,
Outputs a control signal of frequency [2fsc '] and outputs
And the CCD 1H delay element 2. As described in the first embodiment, the CCD 1H delay element 2 converts the reproduced luminance signal input from the input terminal 1 into the frequency [2f
sc ′] and supplies it to the adder 10 and the subtractor 8 with a delay of 1H. The CCD 1H delay element 2 and the adder 10 form a loop, and as a result, the output signal of the adder 10 and the output signal of the CCD 1H delay element 2 are averaged signals.

Next, the output signal of the CCD 1H delay element 2 is input to the subtractor 8 and is subtracted from the reproduced luminance signal to become a noise signal having no correlation, which is supplied to the limiter 9. The limiter 9 limits the amplitude of the input noise signal and supplies a small noise signal that can be regarded as a noise component to the subtractor 5. The subtracter 5 subtracts a minute noise signal from the input reproduced luminance signal, and outputs a luminance signal having less noise than the input reproduced luminance signal to the output terminal 3.

As a result, the relationship of the line correlation is always maintained from the time of the normal reproduction to the time of the high-speed search in which the track step is about 13.5H, so that the luminance signal noise which normally operates even at the time of the high-speed search is particularly good. A reduction device is obtained.

Embodiment 17 FIG. FIG. 12 is a block circuit diagram showing a luminance signal noise reduction device according to a seventeenth embodiment of the present invention.
The same reference numerals denote the same or corresponding parts.

In the seventeenth embodiment, as described in the second embodiment, the tracing speed of the video head is made the same as the tracing speed in the normal reproduction in both the normal reproduction and the special reproduction. The fixed frequency [2f] output from the fixed frequency oscillator 4 is added to the control signal of the CCD 1H delay element 2.
sc], and at the time of special reproduction, using the control signal of the frequency [2 fsc ′] output from the VCO 16,
The 1H delay time of the CCD 1H delay element 2 is adjusted to the delay time corresponding to the pseudo horizontal synchronization frequency of the input reproduced luminance signal.

According to the seventeenth embodiment, in addition to the same effects as those of the sixteenth embodiment, the effect that the corresponding range of the VCO can be enlarged can be obtained.

Embodiment 18 FIG. A block circuit diagram showing a luminance signal noise reduction device according to Embodiment 18 of the present invention is the same as that of FIG. 12, except for the operation of the switch circuit 25. That is, the switch circuit 25 selects the control signal of the fixed frequency [2 fsc] output from the fixed frequency oscillator 4 at the time of the speed search at the time of the normal reproduction and the special reproduction, and only from the VCO 16 at the time of the high speed search at the time of the special reproduction. The control signal of the output frequency [2fsc '] is selected and supplied to the CCD 1H delay element 2.

In the eighteenth embodiment, at the time of normal reproduction and speed search, the fixed frequency [2fs
c), and at the time of speed search, the CCD 1H
The 1H delay time of the delay element 2 is adjusted to one horizontal synchronization period of the input reproduced luminance signal, and at the time of high speed search,
The tracing speed of the video head is made the same as the tracing speed at the time of normal reproduction, and the 1H delay time of the CCD 1H delay element 2 is changed by the control signal of the frequency [2fsc '] output from the VCO 16 to the input reproduction luminance. The delay time corresponds to the pseudo horizontal synchronization frequency of the signal.

According to the eighteenth embodiment, in addition to the same effects as those of the sixteenth embodiment, the effect that the corresponding range of the VCO can be further enlarged can be obtained.

Embodiment 19 FIG. FIG. 13 is a block circuit diagram showing a color signal noise reduction device according to a nineteenth embodiment of the present invention. The same reference numerals as those in the first embodiment and the conventional example 6 indicate the same or corresponding parts.

Next, the operation of the nineteenth embodiment will be described. The head field signal of the frequency [fV] is input from the input terminal 14, and the arithmetic unit 15 operates in the same manner as described in the first embodiment, outputs a control voltage to the VCO 16,
Outputs a control signal of frequency [2fsc '] and outputs
And the CCD 1H delay element 2. As described in the first embodiment, the CCD 1H delay element 2 converts the reproduced color signal input from the input terminal 1 into the frequency [2fs
c ′] and is supplied to the subtractor 11 and the adder 12 with a delay of 1H. The CCD 1H delay element 2 and the subtractor 11 form a loop, and the phase of the color signal is inverted every horizontal synchronization period. As a result, the output signal of the subtractor 11 and the output of the CCD 1H delay element 2 are output. The signal becomes an averaged reproduced color signal.

Next, the output signal of the CCD 1H delay element 2 is input to the adder 12, added to the reproduced color signal to form a noise signal having no correlation, and supplied to the limiter 9. The limiter 9 supplies a small noise signal which can be regarded as a noise component by limiting the amplitude of the noise signal to the adder 12.
The adder 12 adds the input reproduced color signal and the minute noise signal. Since the input reproduced color signal and the minute noise component have a phase inversion relationship, the output signal of the adder 13 is a reproduced color signal having less noise than the input reproduced color signal.

As a result, the line correlation is always maintained from the time of normal reproduction to the time of high-speed search in which the track step is about 13.5H, so that the color signal noise which normally operates even at the time of high-speed search is particularly good. A reduction device is obtained.

Embodiment 20 FIG. FIG. 14 is a block circuit diagram showing a chrominance signal noise reduction apparatus according to Embodiment 20 of the present invention. The same reference numerals as those in Embodiment 2 and Conventional Example 6 indicate the same or corresponding parts.

In the twentieth embodiment, as described in the second embodiment, the tracing speed of the video head is set to be the same as the tracing speed of the normal reproduction during the normal reproduction and the special reproduction. The fixed frequency [2f] output from the fixed frequency oscillator 4 is added to the control signal of the CCD 1H delay element 2.
sc], and at the time of special reproduction, using the control signal of the frequency [2 fsc ′] output from the VCO 16,
The 1H delay time of the CCD 1H delay element 2 is adjusted to the delay time corresponding to the pseudo horizontal synchronization frequency of the input reproduced luminance signal.

According to the twentieth embodiment, in addition to the same effects as those of the nineteenth embodiment, the effect that the corresponding range of the VCO can be enlarged is obtained.

Embodiment 21 FIG. A block circuit diagram showing a color signal noise reduction device according to Embodiment 21 of the present invention is the same as that of FIG. 14, and the operation of the switch circuit 25 is different. That is, the switch circuit 25 selects the control signal of the fixed frequency [2 fsc] output from the fixed frequency oscillator 4 at the time of the speed search at the time of the normal reproduction and the special reproduction, and only at the time of the high speed search at the time of the special reproduction.
The control signal of the frequency [2fsc '] output from the VCO 16 is selected and supplied to the CCD 1H delay element 2.

In the twenty-first embodiment, at the time of normal reproduction and at the time of speed search, the control signal of the CCD 1H delay element 2 has a fixed frequency [2fs
c), and at the time of speed search, the CCD 1H
The 1H delay time of the delay element 2 is adjusted to one horizontal synchronization period of the input reproduced luminance signal, and at the time of high speed search,
The tracing speed of the video head is set to be the same as the tracing speed at the time of normal reproduction, and the 1H delay time of the CCD 1H delay element 2 is changed by the control signal of the frequency [2fsc '] output from the VCO 16 to the input reproduction luminance. The delay time corresponds to the pseudo horizontal synchronization frequency of the signal.

According to the twenty-first embodiment, in addition to the same effects as those of the nineteenth embodiment, the effect that the corresponding range of the VCO can be further enlarged is obtained.

[0137]

Since the present invention is configured as described above, it has the following effects.

The frequency [2] of the control signal for determining the delay time of the delay element output from the variable frequency oscillator to the delay element
The fsc '], in accordance with the normal playback and special playback tape running state. Thus the only frequency delaying time corresponding to one horizontal synchronization period of the input reproduced luminance signal, the normal reproduction and Even during the special reproduction, the delay time of the delay element can be set to a delay time equivalent to one horizontal synchronization frequency of the input signal while keeping the trace speed of the video head at the speed of the normal reproduction.

The frequency of the control signal for determining the delay time of the delay element is [2fsc] output from the fixed frequency oscillator during normal reproduction, and [2fsc '] output from the variable frequency oscillator during special reproduction. So that the video head trace speed is maintained at the normal playback speed during both normal playback and special playback.
The delay time of the CCD 1H delay element can be set to a delay time equivalent to one horizontal synchronization frequency of the input signal, and the range of the VCO can be increased.

Also, the frequency of the control signal for determining the delay time of the delay element is set to [2 fsc] during normal reproduction and speed search, and the video head trace speed is switched during speed search. Is switched to [2fsc '], so that the delay time of the delay element can be set to a delay time equivalent to one horizontal synchronization frequency of the input signal at the time of the normal reproduction and the special reproduction, and the corresponding range of the VCO can be changed. It can be even larger.

The frequency [2fsc '] of the control signal output from the variable frequency oscillator to the delay element is changed to (2fsc'
/2fsc)={262.5 -m (n-1)} / since it is configured to control the frequency with the relationship of 262.5 [2 fsc '], both during normal playback and special playback, the input reproduced luminance signal and can only be delayed by one time corresponding to the horizontal synchronization period, a delay device can no collapse relationship line correlation is obtained.

[0142] In the above-described configuration tooth type filter rather luminance signal using a delay device, dropout compensator, line noise canceller, so to constitute a noise reducing device for the luminance signal, typically in these devices At the time of reproduction and at the time of special reproduction, disturbance of vertical synchronization and the relationship of line correlation are not lost.

Further, the frequency [2fsc ′] of the control signal output from the variable frequency oscillator to the delay element is changed to (2fsc ′).
/2fsc)={262.5-m(n-1)}/262.5, so that the frequency is controlled to be [2fsc '], so that the vertical synchronization is disturbed and the line is disturbed during both the normal reproduction and the special reproduction. collapses it no teeth filter rather luminance signal relationship correlation, dropout compensator, line noise canceller, a luminance signal noise reduction device can be obtained.

[Brief description of the drawings]

FIG. 1 is a block circuit diagram of a delay device according to a first embodiment of the present invention.

FIG. 2 is a block circuit diagram of a delay device according to Embodiments 2 and 3 of the present invention.

FIG. 3 is a block circuit diagram of a color signal comb filter according to Embodiment 4 of the present invention.

FIG. 4 is a block circuit diagram of a color signal comb filter according to Embodiments 5 and 6 of the present invention.

FIG. 5 is a block circuit diagram of a comb filter for luminance signals according to Embodiment 7 of the present invention.

FIG. 6 is a block circuit diagram of a comb filter for luminance signals according to Embodiments 8 and 9 of the present invention.

FIG. 7 is a block circuit diagram of a dropout compensator according to Embodiment 10 of the present invention.

FIG. 8 is a block circuit diagram of a dropout compensator according to Embodiments 11 and 12 of the present invention.

FIG. 9 is a block circuit diagram of a line noise canceller according to Embodiment 13 of the present invention.

FIG. 10 is a block circuit diagram of a line noise canceller according to Embodiments 14 and 15 of the present invention.

FIG. 11 is a block circuit diagram of a luminance signal noise reduction device according to Embodiment 16 of the present invention;

FIG. 12 is a block circuit diagram of a luminance signal noise reduction device according to Embodiments 17 and 18 of the present invention.

FIG. 13 is a block circuit diagram of a color signal noise reduction device according to Embodiment 19 of the present invention.

FIG. 14 is a block circuit diagram of a chrominance signal noise reduction device according to Embodiments 20 and 21 of the present invention.

FIG. 15 is a block circuit diagram of a conventional delay device.

FIG. 16 is a diagram showing a trace locus of a video head.

FIG. 17 is a block circuit diagram of a conventional color signal comb filter.

FIG. 18 is a block circuit diagram of a conventional dropout compensator.

FIG. 19 is a block circuit diagram of a conventional line noise canceller.

FIG. 20 is a block circuit diagram of a conventional luminance signal noise reduction device.

FIG. 21 is a block circuit diagram of a conventional color signal noise reduction device.

[Explanation of symbols]

 2 CCD 1H delay element 4 Fixed frequency oscillator 5 Subtractor 6 Dropout detector 7 Switch circuit 8 Subtractor 9 Limiter 10 Adder 11 Subtractor 12 Adder 13 Adder 15 Operator 16 VCO 17 Variable frequency oscillator 18 Interface circuit 19 1 / 2 frequency divider 20 interface circuit 21 1/455 frequency divider 22 variable frequency divider 23 phase comparator 24 voltage converter 25 switch circuit 26 adder

Claims (8)

(57) [Claims] 1. A delay element for receiving a reproduction luminance signal demodulated from a video signal reproduced by a VTR and having a delay time determined by a frequency of a control signal, and a field frequency [fV] of the video signal. A delay device comprising a variable frequency oscillator that generates a control signal having a frequency delayed by one horizontal synchronization period of a reproduced luminance signal and inputs the control signal to the delay element. 2. A fixed frequency oscillator for generating a control signal having a frequency [2fsc] twice as high as the color subcarrier, and an output signal of the fixed frequency oscillator during normal reproduction of a VTR, and a variable frequency oscillator during special reproduction. 2. The delay device according to claim 1, further comprising: a switch circuit for selecting the output signal of (1) and inputting it as a control signal to the delay element. 3. A fixed frequency oscillator for generating a control signal having a frequency [2fsc] twice as high as that of the color subcarrier, and an output signal of the fixed frequency oscillator is selected at the time of normal reproduction of the VTR and speed search at the time of special reproduction. 2. The delay device according to claim 1, further comprising a switch circuit for selecting an output signal of the variable frequency oscillator and inputting the output signal as a control signal to a delay element during a high-speed search during special reproduction. 4. A variable frequency oscillator sets the phase of a signal obtained by dividing the field frequency [fV] of a video signal by two and the output signal frequency [2fsc '] of the voltage controlled oscillator to 455.
Frequency division, and further, {525-2m (n-1)} frequency division (where n is the running speed ratio of the video tape during special reproduction with respect to normal reproduction, and m is the level difference of the video track in the recording mode of the video tape. , Which is a value represented by one horizontal synchronization period), and outputs a voltage signal having a value corresponding to the phase difference between the two signals. 2fsc '= [{262.5-m (n-1)} / 262.5] (L
/ 455) A voltage controlled oscillator that generates a control signal of a variable frequency [2fsc '] determined by 2fsc, and the delay element is an L-bit CC
The delay device according to any one of claims 1 to 3, wherein the delay device is configured by D. 5. A delay device according to claim 1, further comprising an adder for adding an output signal of the delay device to a reproduction luminance signal input to the delay device of the delay device. Comb filter for the luminance signal. 6. A delay device according to claim 1, a dropout detector for detecting a dropout of a video signal, and a control device which is controlled by the dropout detection signal and detects no dropout. Is a dropout compensator comprising a switch circuit for selecting a reproduced luminance signal input to a delay element of the delay device and selecting and outputting an output signal of the delay element when dropout is detected. 7. The delay device according to claim 1, wherein a first subtracter subtracts an output signal of the delay device from a reproduction luminance signal input to the delay device of the delay device. And a limiter circuit for limiting the amplitude of the output signal of the first subtractor, and a second subtractor for subtracting the output signal of the limiter circuit from the reproduced luminance signal. 8. The delay device according to claim 1, wherein an adder for adding an output signal of a delay element of the delay device to an input reproduced luminance signal and inputting the signal to the delay element. A first subtractor for subtracting the output signal of the delay element from the reproduced luminance signal, a limiter circuit for limiting the amplitude of the output signal of the first subtractor, and an output signal of the limiter circuit from the reproduced luminance signal. The second to subtract
Luminance signal noise reduction apparatus provided with the subtractor of (1).