KR930007292A - Automatic Color Phase Correction Circuit - Google Patents

Automatic Color Phase Correction Circuit Download PDF

Info

Publication number
KR930007292A
KR930007292A KR1019910015532A KR910015532A KR930007292A KR 930007292 A KR930007292 A KR 930007292A KR 1019910015532 A KR1019910015532 A KR 1019910015532A KR 910015532 A KR910015532 A KR 910015532A KR 930007292 A KR930007292 A KR 930007292A
Authority
KR
South Korea
Prior art keywords
color
switching
integrating
color phase
phase error
Prior art date
Application number
KR1019910015532A
Other languages
Korean (ko)
Other versions
KR940001438B1 (en
Inventor
이찬구
Original Assignee
강진구
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 강진구, 삼성전자 주식회사 filed Critical 강진구
Priority to KR1019910015532A priority Critical patent/KR940001438B1/en
Publication of KR930007292A publication Critical patent/KR930007292A/en
Application granted granted Critical
Publication of KR940001438B1 publication Critical patent/KR940001438B1/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/77—Circuits for processing the brightness signal and the chrominance signal relative to each other, e.g. adjusting the phase of the brightness signal relative to the colour signal, correcting differential gain or differential phase

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

본 발며은 비데오신호 처리기에 있어서 증폭기 특성, 기록테이프의 이완 및 열화, 전송라인에서의 왜곡등에 의해 야기되는 컬러비데오신호의 위상오차를 검출하여 보정해 주는 자동칼러의상 보정회로에 관한 것으로, 부호화된 색차신호호 컬러이상에러전압을 검출하고 이 에러전압이 최소가 되도록 오실레이터의 발진주파수 위상을 제어하여 컬러위상 왜곡을 최소화 하였다.The present invention relates to an automatic color image correction circuit that detects and corrects a phase error of a color video signal caused by amplifier characteristics, relaxation and degradation of recording tape, and distortion in a transmission line in a video signal processor. Color phase signal call Color abnormality error voltage is detected and oscillation frequency phase of oscillator is controlled to minimize this error voltage to minimize color phase distortion.

Description

자동컬러위상 보정회로Automatic Color Phase Correction Circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 종래기술에 의한 자동컬러위상 보정회로의 구성도,1 is a configuration diagram of an automatic color phase correction circuit according to the prior art,

제2도는 본 발명에 의한 자동컬러위상 보정회로의일 실시예시도.Figure 2 is an embodiment of an automatic color phase correction circuit according to the present invention.

Claims (2)

복조용 오실레이터를 갖는 비데오신호 처리기에 있어서, 복조된 색차신호들을 합산하여 컬러위상에러전방을 발생하는 컬러위상에러전압 발생수단(100)과, 상기 컬러위상에러전압 발생수단(100)에서 전송되는 컬러위상 에러전압을 적분시켜 직류제어전압으로 변환시키는 적부수단(11)과, 상기 적분수단(110)에서 전송되는 직류제어전압의 극성을 반전시키는 반전수단(120)과, 수평동기신호를 받아 분주하여 그 분주된 신호들이 각각 출력시키는 분주수단(130)과, 상기 분주수단(130)에서 분주된 각각의 신호에 상기 적분수단에서 전송되는 직류제어전압을 스위칭하는 제1, 2스위칭수단(140, 150)과, 상기 제1, 2스위칭수단(140, 150)에서 각각 스위칭된 직류제어전압을 샘플링하여 홀드시키는 제1, 2샘플/홀드수단(160, 170)과, 상기 제1,2샘플/홀드수단(160,170)에서 각각 출력되는 신호들을 비교하여 그 비교값에 따른 레벨신호를 출력하는 비교수단(180)과, 상기 비교수단(180)에서 출력되는 레벨신호에 따라 상기 적분수단(110) 또는 상기 반전수단(120)에서 출력되는 신호를 상기 복조용 오실레이터로 스위칭하는 제3스위칭수단(190)을 포함함을 특징으로 하는 자동컬러위상 보정회로.In a video signal processor having a demodulation oscillator, a color phase error voltage generating means (100) for generating a color phase error ahead by adding demodulated color difference signals and a color transmitted from the color phase error voltage generating means (100). The integrating means 11 for integrating the phase error voltage and converting it into a DC control voltage, the inverting means 120 for inverting the polarity of the DC control voltage transmitted from the integrating means 110, and receiving and dividing a horizontal synchronous signal. Distributing means 130 for outputting the divided signals, and first and second switching means 140 and 150 for switching the DC control voltage transmitted from the integrating means to respective signals divided by the distributing means 130. ), First and second sample / hold means (160 and 170) for sampling and holding the DC control voltages switched by the first and second switching means (140 and 150), respectively, and the first and second sample / hold means. In the means 160,170, respectively Comparing means 180 for comparing the output signals and outputting a level signal according to the comparison value, and integrating means 110 or inverting means 120 according to the level signal output from the comparing means 180. And a third switching means (190) for switching the output signal to the demodulator oscillator. 제1항에 있어서, 상기 분주수단(130)은 분주되어 출력된 각 신호가 서로 극성에 달리하도록 하기 위하여 D플리플롭(FF)으로 구성함을 특징으로 하는 자동컬러위상 보정회로.2. The automatic color phase correction circuit according to claim 1, wherein the division means (130) comprises a D flip-flop (FF) so that the divided and output signals are different in polarity from each other. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910015532A 1991-09-05 1991-09-05 Automatic color phase compensating circuit KR940001438B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910015532A KR940001438B1 (en) 1991-09-05 1991-09-05 Automatic color phase compensating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910015532A KR940001438B1 (en) 1991-09-05 1991-09-05 Automatic color phase compensating circuit

Publications (2)

Publication Number Publication Date
KR930007292A true KR930007292A (en) 1993-04-22
KR940001438B1 KR940001438B1 (en) 1994-02-23

Family

ID=19319643

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910015532A KR940001438B1 (en) 1991-09-05 1991-09-05 Automatic color phase compensating circuit

Country Status (1)

Country Link
KR (1) KR940001438B1 (en)

Also Published As

Publication number Publication date
KR940001438B1 (en) 1994-02-23

Similar Documents

Publication Publication Date Title
US4024571A (en) Synchronizing system employing burst crossover detection
KR880002321A (en) Time constant automatic adjustment circuit of filter circuit
KR870000822A (en) Image pickup and display
KR0138764B1 (en) A sampled data phase locking system
US4354200A (en) Amplitude modulator circuit for modulating a video signal on a carrier signal
US4229759A (en) Signal detector including sample and hold circuit with reduced offset error
KR930007292A (en) Automatic Color Phase Correction Circuit
KR950001703A (en) VTR signal processing circuit
KR900001231A (en) Interpolation filter and receiver
GB2126856A (en) Sampling clock reproducing circuit
KR100430742B1 (en) Apparatus with A/D Converter for Processing Television Signal
JPS6216067B2 (en)
US4608604A (en) Circuit for reducing AFC offset error
JPH07131677A (en) Sag correcting circuit for video signal
KR950002666B1 (en) Apparatus for display character data
FI61779C (en) PAL-DECODERKOPPLING FOR MOTORGROUND AV EN TELEVISIONSSIGNAL
US4511915A (en) Color television encoding circuit
KR910004287B1 (en) Circuit for the synchronization of the reference carrier oscillator in a pal-color television receiver
US5270815A (en) Image compression processing apparatus having means for removing jitter contained at boundary between image and mask portions
JPS6025191Y2 (en) hue correction device
JPH0198394A (en) Signal processor
KR940000979B1 (en) Time axis correcting circuit for video signal
KR900003276Y1 (en) The generating circuit of video head position detecting signal
JP2529238B2 (en) Clock signal reproduction device
KR900001246A (en) Detection circuit

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 19990128

Year of fee payment: 6

LAPS Lapse due to unpaid annual fee