JPH0196567A - Frequency deciding device - Google Patents

Frequency deciding device

Info

Publication number
JPH0196567A
JPH0196567A JP25418287A JP25418287A JPH0196567A JP H0196567 A JPH0196567 A JP H0196567A JP 25418287 A JP25418287 A JP 25418287A JP 25418287 A JP25418287 A JP 25418287A JP H0196567 A JPH0196567 A JP H0196567A
Authority
JP
Japan
Prior art keywords
storage means
data
zero volt
frequency determination
stored
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25418287A
Other languages
Japanese (ja)
Inventor
Yasuhiko Tanaka
靖彦 田中
Junichi Nakakuki
準一 中久木
Kunio Hamada
浜田 邦夫
Shuji Sato
周史 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP25418287A priority Critical patent/JPH0196567A/en
Publication of JPH0196567A publication Critical patent/JPH0196567A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To improve the reliability of a frequency deciding data by executing a control so as to re-store data of many storage means in other storage means. CONSTITUTION:A pulse generated from a zero volt pulse generating means 11 is measured by a measuring means 12, and a frequency deciding data which has been decided is stored in plural storage means 13. A control means 14 writes the frequency deciding data in plural storage means 13, respectively by an output of the measuring means 12, executes a majority decision at every pulse generated from the zero volt pulse generating means 11, and executes a control so as to re-store data of many storage means 13 in other storage means. Also, even if storage data of a small number of storage means among plural storage means are changed due to a disturbance, etc., this device works so as to be recovered as soon as the next zero volt pulse is inputted. In such a way, since the storage data can be brought to self-recovery, the reliability of the frequency deciding data can be improved.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、AC電源により駆動される制御装置の周波数
判定装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a frequency determination device for a control device driven by an AC power source.

従来の技術 従来の周波数判定装置では、第3図のように、ゼロボル
トパルス手段1により発生する電源周波数の6111定
を測定手段?で行なった周数数判定データは、制御手段
3を通じて1つの記憶手段4に記憶されるだけであった
2. Description of the Related Art In a conventional frequency determination device, as shown in FIG. The data for determining the number of cycles performed in step 1 was only stored in one storage means 4 through the control means 3.

発明が解決しようとする問題点 このような従来の周波数判定装置では、周波数判定デー
タは、他の制御関係のタイマ等の基準にするなど重要な
データであるにもかかわらず、内外からのノイズや温度
上昇などの外乱により、記憶手段4に記憶されているデ
ータの信頼性が失われてしまうという問題があった。
Problems to be Solved by the Invention In such conventional frequency determination devices, although frequency determination data is important data such as being used as a reference for other control-related timers, it is subject to noise from inside and outside. There has been a problem in that the reliability of data stored in the storage means 4 is lost due to disturbances such as temperature rise.

本発明はこのような問題点を解決した周波数判定装置を
提供することを目的とするものである。
An object of the present invention is to provide a frequency determination device that solves these problems.

問題点を解決するための手段 上記問題点を解決するために本発明の周波数判定装置は
、ゼロボルトパルス発生手段より発生するパルスを測定
して判定する測定手段と、この測定手段により測定して
判定した周波数判定データを記憶する複数の記憶手段と
、醋記測定手段の出力により周波数判定データを前記複
数の記憶手段のそれぞれに書き込み、前記ゼロボルトパ
ルス発生手段より発生するパルス毎に多数決を行ない、
多数の記憶手段のデータをその他の記憶手段に記憶し直
すように制御する制御手段とを備えたものである。
Means for Solving the Problems In order to solve the above problems, the frequency determining device of the present invention includes a measuring means for measuring and determining the pulses generated by the zero volt pulse generating means, and a frequency determination device for measuring and determining the pulses generated by the zero volt pulse generating means. a plurality of storage means for storing the frequency determination data obtained by the measurement, and writing frequency determination data into each of the plurality of storage means based on the output of the measurement means, and performing a majority vote for each pulse generated by the zero volt pulse generation means;
and control means for controlling data stored in a large number of storage means to be re-stored in other storage means.

作  用 上記構成によれば、ゼロボルトパルス発生手段より発生
するパルスを測定手段により測定し、その測定して判定
した周波数判定データを複数の記憶手段に記憶し、制御
手段により、前記ゼロボルトパルス発生手段より発生す
るパルス毎に多数決を行ない、多数の記憶手段のデータ
をその他の記憶手段に記憶し直すようにしているため、
もし外乱などで複数の記憶手段の中で少数の記憶手段の
記憶データが変わってし゛まっても、次のゼロボルトパ
ルスが入シしだい修復されるように働くものである。
Operation According to the above configuration, the pulse generated by the zero volt pulse generating means is measured by the measuring means, the frequency determination data determined by the measurement is stored in a plurality of storage means, and the control means controls the pulse generated by the zero volt pulse generating means. A majority vote is taken for each pulse generated by the pulse generator, and the data in multiple storage means is re-stored in other storage means.
Even if the stored data in a small number of storage means among the plurality of storage means is changed due to external disturbances, the data is restored as soon as the next zero volt pulse is applied.

実施例 以下、本発明の一実施例を添付図面にもとづいて説明す
る。第1図は本発明の一実施例における周波数判定装置
のブロック図を示したもので、11は電源の゛1区圧が
零電圧の時にパルスを出力するゼロボルトパルス発生手
段、12はゼロボルトパルス発生手段11よ多発生する
パルスを測定する測定手段、13は前記測定手段12に
より測定して判定した周波数判定データを記憶する複数
の記憶手段、14は前記測定手段12の出力により周波
数判定データを前記複数の記憶手段13のそれぞれに書
き込み、前記ゼロボルトパルス発生手段11よ多発生す
るパルス毎に多数決を行ない、多数の記憶手段のデータ
をその他の記憶手段に記憶し直すように制御する制御手
段である。
Embodiment Hereinafter, one embodiment of the present invention will be described based on the accompanying drawings. FIG. 1 shows a block diagram of a frequency determining device according to an embodiment of the present invention, in which reference numeral 11 indicates zero-volt pulse generation means that outputs a pulse when the voltage in section 1 of the power supply is zero voltage, and reference numeral 12 indicates zero-volt pulse generation means. Measuring means for measuring pulses that occur more frequently than means 11; 13 a plurality of storage means for storing frequency determination data measured and determined by the measuring means 12; and 14 storing the frequency determination data by the output of the measuring means 12. This is a control means that writes in each of the plurality of storage means 13, performs a majority vote for each pulse generated by the zero volt pulse generation means 11, and controls the data of the plurality of storage means to be re-stored in other storage means. .

次に本発明の周波数判定装置の動作を説明する。Next, the operation of the frequency determination device of the present invention will be explained.

第2図は本発明の周波数判定装置の動作を示すフローチ
ャートで、ここでは複数の記憶手段は3つの記憶手段と
する。
FIG. 2 is a flowchart showing the operation of the frequency determination device of the present invention, in which the plurality of storage means are assumed to be three storage means.

まず、ステップ21で測定手段12により電源周波数の
測定を行なって周波数を判定し、ステップ22で前記測
定手段12により測定して判定した周波数判定データを
第1の記憶手段から第3の記憶手段まですべてに記憶さ
せる。ステップ23でゼロボルトパルス発生手段11よ
多発生するゼロボルトパルスを入力する。そしてステッ
プ24でゼロボルトパルスの入力の有無を確認し、ゼロ
ボルトパルスの入力がなかったならばステップ23へ戻
る。一方、ゼロボルトパルスの入力があったならばステ
ップ26へ進み、第1の記憶手段の記憶データと第2の
記憶手段の記憶データとを比較する。この場合、同じデ
ータでめったなら、そのデータを第3の記憶手段へ記憶
させ、ステップ23へ戻る。もし違っていたならばステ
ップ27へ進み、第1の記憶手段の記憶データと第3の
記憶手段の記憶データとを比較する。そして同じデータ
であったなら、そのデータを第2の記憶手段へ記憶させ
てステップ23へ戻る。もし違っていたならばステップ
29へ進み、第2の記憶手段の記憶データと第3の記憶
手段の記憶データとを比較する。この場合、同じデータ
であったなら、そのデータを第1の記憶手段へ記憶させ
てステップ23へ戻る。もし違っていたならばステップ
21へ戻シ、周波数測定を再度や9直す。
First, in step 21, the power supply frequency is measured by the measuring means 12 to determine the frequency, and in step 22, the frequency determination data measured and determined by the measuring means 12 is stored from the first storage means to the third storage means. Remember everything. In step 23, the zero volt pulse generating means 11 inputs a frequently generated zero volt pulse. Then, in step 24, it is confirmed whether or not a zero volt pulse has been input, and if no zero volt pulse has been input, the process returns to step 23. On the other hand, if a zero volt pulse is input, the process proceeds to step 26, where the data stored in the first storage means and the data stored in the second storage means are compared. In this case, if the same data rarely occurs, the data is stored in the third storage means and the process returns to step 23. If they are different, the process advances to step 27 and the data stored in the first storage means is compared with the data stored in the third storage means. If the data are the same, the data is stored in the second storage means and the process returns to step 23. If they are different, the process advances to step 29 and the data stored in the second storage means is compared with the data stored in the third storage means. In this case, if the data are the same, the data is stored in the first storage means and the process returns to step 23. If it is different, return to step 21 and repeat the frequency measurement again.

以上のように、通常はステップ23からステップ26の
ループを繰シ返し、記憶手段に異常があった場合には、
ステップ27、またはステップ29、またはステップ2
1へ分岐し、データの自己修復を行なうものである。
As mentioned above, normally the loop from step 23 to step 26 is repeated, and if there is an abnormality in the storage means,
Step 27, or Step 29, or Step 2
1 and performs self-repair of the data.

発明の効果 以上のように本発明によれば、外乱ノイズ等や温度上昇
等の内部異常により複数の記憶手段のうち、少数の記憶
手段に記憶しているデータが変わってしまっても、自己
修復できるため、周波数判定データの信頼性を向上させ
ることができるものである。
Effects of the Invention As described above, according to the present invention, even if data stored in a small number of storage devices out of a plurality of storage devices is changed due to internal abnormality such as disturbance noise or temperature rise, self-repair is possible. Therefore, the reliability of frequency determination data can be improved.

【図面の簡単な説明】 第1図は本発明の一実施例を示す周波数判定装置のブロ
ック図、第2図は同周波数判定装置の動作を示すフロー
チャート、第3図は従来の周波数判定装置のブロック図
である。 11・・・・・・ゼロボルトパルス発生手段、12・・
・・・・測定手段、13・・・・・複数の記憶手段、1
4・・・・・制御手段。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a block diagram of a frequency determination device showing an embodiment of the present invention, FIG. 2 is a flowchart showing the operation of the same frequency determination device, and FIG. 3 is a diagram of a conventional frequency determination device. It is a block diagram. 11... Zero volt pulse generating means, 12...
... Measuring means, 13 ... Plural storage means, 1
4... Control means. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
figure

Claims (1)

【特許請求の範囲】[Claims] 電源の電圧が零電位の時にパルスを出力するゼロボルト
パルス発生手段と、このゼロボルトパルス発生手段より
発生するパルスを測定して判定する測定手段と、この測
定手段により測定して判定した周波数判定データを記憶
する複数の記憶手段と、前記測定手段の出力により周波
数判定データを前記複数の記憶手段のそれぞれに書き込
み、前記ゼロボルトパルス発生手段より発生するパルス
毎に多数決を行ない、多数の記憶手段のデータをその他
の記憶手段に記憶し直すように制御する制御手段とを備
えた周波数判定装置。
A zero volt pulse generating means that outputs a pulse when the voltage of the power supply is zero potential, a measuring means that measures and determines the pulse generated by the zero volt pulse generating means, and a frequency determination data measured and determined by the measuring means. Frequency determination data is written into each of the plurality of storage means based on the output of the measuring means, and a majority vote is performed for each pulse generated by the zero volt pulse generation means, and the data in the plurality of storage means are stored. A frequency determination device comprising: a control means for controlling the memory to be re-stored in another storage means.
JP25418287A 1987-10-08 1987-10-08 Frequency deciding device Pending JPH0196567A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25418287A JPH0196567A (en) 1987-10-08 1987-10-08 Frequency deciding device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25418287A JPH0196567A (en) 1987-10-08 1987-10-08 Frequency deciding device

Publications (1)

Publication Number Publication Date
JPH0196567A true JPH0196567A (en) 1989-04-14

Family

ID=17261370

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25418287A Pending JPH0196567A (en) 1987-10-08 1987-10-08 Frequency deciding device

Country Status (1)

Country Link
JP (1) JPH0196567A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54145443A (en) * 1978-05-06 1979-11-13 Mitsubishi Electric Corp Data memory circuit
JPS58105498A (en) * 1981-12-17 1983-06-23 Fujitsu Ltd Protecting system of memory contents

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54145443A (en) * 1978-05-06 1979-11-13 Mitsubishi Electric Corp Data memory circuit
JPS58105498A (en) * 1981-12-17 1983-06-23 Fujitsu Ltd Protecting system of memory contents

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