JPH0193228A - マルチフレーム同期回路用試験回路 - Google Patents
マルチフレーム同期回路用試験回路Info
- Publication number
- JPH0193228A JPH0193228A JP24986487A JP24986487A JPH0193228A JP H0193228 A JPH0193228 A JP H0193228A JP 24986487 A JP24986487 A JP 24986487A JP 24986487 A JP24986487 A JP 24986487A JP H0193228 A JPH0193228 A JP H0193228A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- pseudo
- tnr2
- test
- tnr1
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 45
- 230000001360 synchronised effect Effects 0.000 title claims description 3
- 230000005540 biological transmission Effects 0.000 claims description 13
- 238000012544 monitoring process Methods 0.000 claims description 7
- 238000011144 upstream manufacturing Methods 0.000 claims description 2
- 238000001514 detection method Methods 0.000 abstract description 21
- 238000010586 diagram Methods 0.000 description 6
- 238000003780 insertion Methods 0.000 description 4
- 230000037431 insertion Effects 0.000 description 4
- 230000002159 abnormal effect Effects 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 101000739577 Homo sapiens Selenocysteine-specific elongation factor Proteins 0.000 description 2
- 102100037498 Selenocysteine-specific elongation factor Human genes 0.000 description 2
- 241000613130 Tima Species 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
Landscapes
- Time-Division Multiplex Systems (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24986487A JPH0193228A (ja) | 1987-10-05 | 1987-10-05 | マルチフレーム同期回路用試験回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24986487A JPH0193228A (ja) | 1987-10-05 | 1987-10-05 | マルチフレーム同期回路用試験回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0193228A true JPH0193228A (ja) | 1989-04-12 |
| JPH0561815B2 JPH0561815B2 (enrdf_load_stackoverflow) | 1993-09-07 |
Family
ID=17199325
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24986487A Granted JPH0193228A (ja) | 1987-10-05 | 1987-10-05 | マルチフレーム同期回路用試験回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0193228A (enrdf_load_stackoverflow) |
-
1987
- 1987-10-05 JP JP24986487A patent/JPH0193228A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0561815B2 (enrdf_load_stackoverflow) | 1993-09-07 |
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