JPH0191550U - - Google Patents
Info
- Publication number
- JPH0191550U JPH0191550U JP1987186754U JP18675487U JPH0191550U JP H0191550 U JPH0191550 U JP H0191550U JP 1987186754 U JP1987186754 U JP 1987186754U JP 18675487 U JP18675487 U JP 18675487U JP H0191550 U JPH0191550 U JP H0191550U
- Authority
- JP
- Japan
- Prior art keywords
- printer head
- head board
- hole
- ceramic substrate
- led printer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009429 electrical wiring Methods 0.000 claims description 9
- 239000000919 ceramic Substances 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 5
- 239000004020 conductor Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Dot-Matrix Printers And Others (AREA)
- Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987186754U JPH0191550U (it) | 1987-12-08 | 1987-12-08 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987186754U JPH0191550U (it) | 1987-12-08 | 1987-12-08 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0191550U true JPH0191550U (it) | 1989-06-15 |
Family
ID=31477964
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1987186754U Pending JPH0191550U (it) | 1987-12-08 | 1987-12-08 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0191550U (it) |
-
1987
- 1987-12-08 JP JP1987186754U patent/JPH0191550U/ja active Pending
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