JPH0191540A - Method and apparatus for time division multiplex transmission - Google Patents

Abstract

PURPOSE:To transmit a channel where a significant signal exists in time division after multiplexing with priority by resetting a block synchronizing timing in a block coding of a channel multiplexed newly and using a significant signal with block coding and multiplexing. CONSTITUTION:A signal 202 is an allocation signal outputted from a multiplexing circuit 180 via a signal line 182, a significant signal is detected by a signal detecting circuit 120 and it outputs a high level signal when a time slot to send the significant signal is ensured. A timing circuit 140 is reset synchronously with the rise of the allocation signal. Then the block synchronizing pulse is outputted via a signal line 141, a block coding circuit 130 applies block coding synchronously with the synchronizing pulse, and a multiplexing circuit 180 multiplexes the coding signal outputted via the signal line 131 together with the coding signal of the other channel and the time slot allocation signal and outputs the result to the transmission line via the signal line 181. Thus, the significant signal is sent while synchronizing the block.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a time division multiplex transmission method and apparatus for highly efficiently encoding a plurality of telephone signals and then efficiently time division multiplexing and transmitting the signals.

[Conventional technology]

Conventionally, digital voice insertion (DS) has been used as a method of multiplexing and transmitting preferentially channels in which significant signals such as voice signals and data modem signals exist among multiple telephone channels.
I) There was a method. This method takes advantage of the fact that in a normal conversation, one person is actually speaking for about 40% of the time, and inserts audio from the other channel into the empty time. This increases transmission efficiency. For example, a line with a transmission speed of ZO 48Mbps has a transmission speed of 64Kbps.
If the DSI method is applied to a line in which pulse code modulated (PCM) telephone signals are multiplexed to 30 channels, it becomes possible to multiplex approximately 60 channels. If 32 Kbps adaptive differential PCM (ADPeM), which encodes highly efficiently at half the encoding speed of 64 K bps PCM, is used as the audio signal encoding method, the number of channels can be further doubled to 120 channels. Recently, with the development of coding technology, even more efficient block coding of 15 Kbps has come into use.

[Problem that the invention seeks to solve]

However, when applying the DSI method by lowering the encoding speed of the audio signal, if a block encoding method is used that encodes each block consisting of multiple audio samples, the frame period of the transmission path will be reduced. In addition, since the block coding cycle becomes long, it is necessary to send one block of audio signals over multiple frames. for example,
The audio signal is block encoded every 10m5ec to 16
When transmitting at K bps, assuming that the frame period of the transmission path is 125 p sec (178 kHz), two bits are multiplexed in each frame, and one block of audio signals is encoded and transmitted in 80 frames. Audio signal analysis parameters, quantization signals, etc. are multiplexed in this l block 9, and decoding is performed block by block on the receiving side as well.

Therefore, it is necessary for the receiving side to know not only the frame synchronization of the transmission path but also the block synchronization. For this reason, in the past, a multiframe with a length that is an integral multiple of the transmission line frame period was constructed, and the multiframe period was made the same length as the block period, or a synchronization signal for block synchronization was included in the signal of one block. Block synchronization was established between the encoder and decoder by including the code. However, in the former case, a new multi-frame synchronization circuit is required, and block encoding systems with different block lengths cannot be used. Furthermore, in the latter case, bits originally used for audio encoding are removed as pits for block synchronization, resulting in deterioration of sound quality.

Therefore, the present invention provides a time division multiplex transmission method and its equipment that can establish block synchronization on the transmitting and receiving sides and apply the DSI method without configuring multi-frames in the transmission line or sending block synchronization signals. The task is to

[Means for solving problems]

The time division multiplex transmission method of the present invention selects a channel in which a significant signal exists among a plurality of input channels.
In a time-division multiplex transmission method in which channels that are not multiplexed are given priority for block encoding and then multiplexed, when a channel that is not multiplexed is newly multiplexed, the timing for block synchronization in block encoding of the channel that is newly multiplexed is reset. After that, the significant signals are block coded and multiplexed.

Further, the time division multiplex transmission device of the present invention includes a delay circuit that delays an input signal by a predetermined time, a significant signal detection circuit that can check whether the input signal is a significant signal, and the delay circuit. a plurality of channel modules each including a block encoding circuit that blocks encodes the delayed input signal; and a timing circuit that generates a timing signal for block synchronization used in the block encoding circuit; Among the channel modules, a reset signal for resetting the timing circuit of this channel module is output to a channel module for which it is determined that a new significant signal has been input based on the detection result of the significant signal detection circuit. and a multiplexing circuit that preferentially multiplexes significant signals that are subsequently block encoded.

[Effect]

In the present invention, after block encoding a channel in which a significant signal such as an audio signal exists among a plurality of input channels, the DS
It is preferentially multiplexed and transmitted using the I method. Therefore, the channel configuration multiplexed within a transmission line frame changes from time to time. Therefore, a time slot assignment signal is transmitted together with the encoded audio signal to notify the receiving side of which transmission path frame pressure channel is being multiplexed. The receiving side knows which channel the received signal belongs to from the sent time slot assignment signal, and distributes all the received signals to the decoding circuit of the corresponding channel. That is, when looking at one input channel, the transmission side detects the occurrence of a significant signal and sends time slot assignment information indicating that a transmission path time slot has been assigned to this channel, and then the encoded signal is After transmission is started and the time slot assignment signal is received on the receiving side, the transmitted encoded signal is decoded and a reproduced signal is output.

Therefore, in the present invention, when this time slot assignment signal is sent, the transmitting side resets the block encoding timing of the channel newly multiplexed by the time slot assignment and starts encoding, and the receiving side Immediately after a signal is received, block decoding timing (1- +) is set, and decoding is started using the encoded signal received thereafter as the first signal of one block, thereby establishing block synchronization on the transmitting and receiving sides and decoding. performs encoding and decoding. As a result, significant signals can be transmitted while maintaining block synchronization on the transmitting and receiving sides, without adding new multi-frame configurations or block synchronization bits in the prior art as described above.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing a time division multiplex transmission apparatus according to an embodiment of the present invention. Here, it is assumed that there are N input channels, and signal lines 100 and 101.

The signals of channels CHI, CH2, CHN are input via 102 to channel modules 150, 160, and 170 corresponding to the respective channels.

Since each channel module has the same configuration, the channel module 150 for channel CH1 will be described. The signal detection circuit 120 checks whether the input signal is a significant signal such as a voice, and the result is sent to the signal line 12.
1' to the multiplexing circuit 180. In the delay circuit 110, the input signal is delayed by the time required to detect a significant signal in the signal detection circuit 120, and then the delayed input signal is outputted to the block encoding circuit 130.

In the multiplexing circuit 180, the signal line 121'! If a significant signal is detected according to the signal detection result input via r,
Block encoding circuit 1 assigns transmission path time slots
The encoded signal outputted from 30 via signal line 131 is multiplexed with other channel and Y channel encoded signals and time slot assignment signals, and is outputted to the transmission path via signal line 181. The timing circuit 140 has a signal 1182'.
An assignment signal indicating whether or not a time slot has been assigned is inputted via the time slot. A pulse for block synchronization of the block encoding circuit 130 is output from the timing circuit 140 via a signal line 141, and the block encoding circuit 130 performs block encoding in synchronization with this synchronization pulse.

Figure 2 shows the signal lines 141, 182 and 1 in Figure 1.
31 is a diagram illustrating an example of a signal at No. 31. In the figure, a signal 201 indicates a block synchronization pulse signal output from the timing circuit 140 via a signal line 141. In synchronization with the rise of this pulse signal, the input signal is divided into blocks and encoded. signal 2
02 is an assignment signal output from the multiplexing circuit 180 via the signal line 182, and the significant signal is output from the signal detection circuit 12.
0 is detected, and when a time slot for transmitting this significant signal can be secured, the signal becomes a high level signal. While the signal is at a low level, there is no significant signal, indicating a section in which no time slot is assigned. Since the timing circuit 140 is reset in synchronization with the rising edge of the allocation signal 202, the block synchronization timing for block encoding is reset every time a new significant signal is generated and a time slot is newly allocated. . In this way, the signal 203 resets the block synchronization timing while the encoded significant signal is transferred to the signal line 13.
1 is used to explain a signal when outputted via 1. The shaded portion is actually a portion at risk of being transmitted, and no significant signal exists in this section.

The multiplexed signal input via the demultiplexing circuit 310 is distributed to each corresponding channel module.

Since the channel modules 360, 370, and 380 have the same configuration for each channel, the channel module 360 of channel CH1 will be described here. An allocation signal is input to the timing circuit 320 via the signal line 301. This assignment signal indicates whether or not a time slot has been assigned to that channel, similar to what was explained in connection with the transmitter. The block decoding circuit 330 performs decoding in response to the block synchronization pulse output from the timing circuit 320 via the signal line 321 and reproduces a significant signal from the encoded signal input via the signal line 302. The block decoded playback signal and the pseudo noise output from the noise generation circuit 340 are input to the selection circuit 350 via signal lines 331 to 341, and the timing circuit 320 outputs the signal 1! One of the signals is selected and output according to the selection signal input through the A322k.

The noise generating circuit 340 generates pseudo noise on the receiving side when no significant signal is generated on the transmitting side to create a silent state in a normal telephone conversation.

FIG. 4 shows signals on the main signal lines in FIG. 3. A signal 401 is a block synchronization pulse inputted to the block decoding circuit 330 via the signal line 321, and block decoding is performed in synchronization with a pulse generated every C1l block length. The signal 402 is the signal line 30
This is an assignment signal inputted via 1, and is at a high level when an encoded signal is sent from the transmitting side, and is at a low level when no coded signal is sent. Timing circuit 320 is reset in synchronization with the rise of assignment signal 402. Pro in this way.

In addition to performing decoding in the same manner as on the transmitting side in synchronization with the allocation signal 4024, encoding and decoding can be realized by establishing block synchronization between the transmitting side and the receiving side. Signal 403 is a selection signal input to selection circuit 350 via signal line 322. Since the decoded signal that undergoes block decoding is generally output with a delay of one block length from the received signal, the selection signal 403 is a signal delayed by the length of l block compared to the allocation signal 402. signal 40
Reference numeral 4 denotes a Soo signal outputted from the selection circuit 350 via the signal m351. Pseudo-noise is inserted into sections where no significant signal exists to maintain the naturalness of normal conversation.

〔Effect of the invention〕

As described above, according to the present invention, without adding a multi-frame synchronization circuit and all block synchronization signals, a channel in which a significant signal exists among a plurality of input channels is block encoded and is preferentially time-divided. It can be multiplexed and transmitted.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a time division multiplex transmitting device according to an embodiment of the present invention, FIG. 2 is a diagram showing signals in FIG. 1, and FIG. 3 is a receiving device corresponding to the transmitting device shown in FIG. 1. FIG. 4 is a diagram showing an example of the configuration, and FIG. 4 is a diagram showing the signals in FIG. 110...Delay circuit, 120...Signal detection circuit, 130...°...Block encoding circuit, 1
40...timing circuit, 150, 160.1
70... Channel module, 180...
...Multiplex circuit. Agent Patent Attorney Susumu Uchihara

Claims (2)

[Claims] (1) In a time division multiplex transmission method in which channels with significant signals among multiple input channels are given priority over channels without significant signals and are block coded and multiplexed, unmultiplexed channels are newly multiplexed. 1. A time division multiplex transmission method characterized in that, when a channel is newly multiplexed, block synchronization timing in block coding of a channel to be newly multiplexed is reset, and then significant signals are block coded and multiplexed. (2) a delay circuit that delays an input signal by a predetermined time; a significant signal detection circuit that can check whether the input signal is a significant signal; and a block code that converts the input signal delayed by the delay circuit into a block code. a plurality of channel modules each including a block encoding circuit for generating a block synchronization signal; and a timing circuit for generating a timing signal for block synchronization used in the block encoding circuit; For a channel module in which it is determined that a new significant signal has been input based on the detection result of the circuit, a reset signal for resetting the timing circuit of this channel module is output, and then the block-coded significant signal is given priority. A time division multiplex transmission device comprising: a multiplexing circuit for multiplexing;