JPH0456432A - Multiplex digital transmission system - Google Patents

Abstract

PURPOSE:To discriminate how many people's voice is included in one frame by giving a delay control signal to a variable delay means so that a digital signal is generated at a time in a succeeding block frame. CONSTITUTION:An A/D converter circuit 2 digitizes an analog voice signal 1. A voice detection circuit 3 detects a voice start time based on an output signal of the circuit 2. Simultaneously, a delay circuit 4 delays an output signal of the circuit 2. When a subscriber sets a code signal to a caller control signal generating circuit 10, the circuit 10 generates a caller control signal 22. A bit location comparison control circuit 11 generates a caller control signal 22 and a variable delay circuit 12 delays a voice start time and further delayed by a delay circuit 13. After the signal 22 is generated, a tentative storage circuit 14 gives the caller control signal to a multiplexer circuit 15. The circuit 13 outputs the voice signal delayed based on the signal 18 to the multiplexer circuit 15. The circuit 15 multiplexes the voice signal and the caller control signal to send the result to a digital transmission line 16.

Description

[Detailed Description of the Invention]: 2. Industrial Fields of Application 2. The present invention is used in a multiplex digital transmission system for audio signals and information control signals. In particular, by simultaneously transmitting a digitized voice signal and the number of the caller who is the originator of the voice signal, multiple callers can talk at the same time and the identity of the caller can be determined. The present invention relates to a transmission method for facilitating recognition of multiple voice speakers in a system, such as a teleconference system.

In particular, it relates to a method of multiplexing audio signals and source control signals.

[Conventional technology]

Conventionally, the multiplexed digital transmission system mainly transmits only audio signals, but a method for transmitting audio signals and information control signals has been proposed in a paper (Shimada, Meiki: "Ground Identification Sound Image for Multi-Dialogue Audio Conferencing Communication System"). There is a method described in "Generation Method" (Journal of the Institute of Electronics, Information and Communication Engineers, vol, J70-B, No. 9, 1987). I will explain the contents of this paper.

A transmission method that transmits information control signals along with voice signals is the Consultative Committee for International Telegraph and Telephone (CCITT) Recommendation H, 221, and a paper (Shimada et al. Precious wood: ``Ground identification sound image generation method for multi-site audio conferencing communication system'' Journal of the Institute of Electronics, Information and Communication Engineers, No. 1. J70-B, No. 9, 1987).In this paper, the multiplexing of Recommendation 8.221 is The proposed method describes sound image localization theory in an indoor space using multiple loudspeakers using the proposed encoding method.

Figure 7 shows CCITT Recommendation H for multiplexed digital transmission system.
, 221 at 64 kbps. The table shows the source control signals of the multiplexed digital transmission system.

(The following is the margin of this page) The basic service of the transmitter control signal l5DN (Digital Service Integrated Network) consists of two information lines (B) for the 64 kbps service and one line (the control line (D) for the ikbps service). There are 2B+D) channels.This control line (D) is a control signal used for protocols such as call origination, call, and call termination up to layer 3 of the seven layer model of the International Committee for Standardization (ISO) communication regulations. Furthermore, there is a method that uses digital 11J sink line 54 kbps at layer 4 and above to divide the speed and simultaneously transmit voice signals and information control signals between each subscriber.
CC? This method uses the 1.221 frame format (recommended by the TT). This method is 54
It is applied to communication systems that can simultaneously transmit not only voice but also digital image signals and data signals using a kbps digital 1-link line. 54kb
The PS channel consists of octets (8 bits are one unit) transmitted at 8 kHz, and the 8th bit of each octet is called the service channel, and the service channel is further divided into three parts as shown in Figure 7. . The frame alignment signal (FAS) is composed of multi-frames in which a basic frame pattern consisting of 8 bits is generated alternately for each frame of a service channel. Bit Allocation Signal (BAS) defines various communication modes. In addition, one frame of the application channel (AC) is 64 bits, which is 6.4k.
It is applicable to digital service communication having a transmission rate of bps or less.

On the other hand, when realizing a remote conference communication system using an audio line, the audio signals of each speaker are added and transmitted, and the added audio signals are distributed to each listener.

For this reason, in the case of a conference communication system where there are multiple speakers at the same time, the presence or absence of audio signals from multiple speakers can be determined by the content of the transmitter control signal. The voice-added signal cannot be separated into voice signals for each speaker. Even if separation is possible, the technology for recognizing the correspondence between the feature parameters of the voice signal and the speaker's voice signal (speaker recognition) has not reached the current practical level.

Therefore, as an example of implementing this method, the above-mentioned paper by Shimada et al. uses an example of a code format as shown in Table j= as a transmitter control signal. In other words, the transmission source control signals corresponding to the transmission parties A, B, C, D, E, and F are 100000.010000°001000.0, respectively.
00100.000010. As can be seen from the table, the address bit position in the frame where the logical value of the transmitter control signal is "1" corresponds to the transmitter control signal, and it is located when a certain party becomes the transmitter. A logical value "1" or a logical value "0" is controlled by level control at a specified address bit position determined by caulking. This is generally called level call control. Therefore, since level control can be performed before creating the source control signal, the original level control signal can operate asynchronously with the click cycle information control signal supplied from the transmission line. In the above paper, it was stated that this code is desirable because the transmitter control signals are encoded sequences that are orthogonal to each other and can be processed by a simple exclusive logic circuit even when there are multiple transmitters. (Unexamined Japanese Patent Publication No. 63-42566)
). Furthermore, a node device that connects a plurality of destinations logically processes the transmission source control signal and transmits the audio signal and the transmission source control signal to the listener side. The receiving side generates the sound in sound image positions divided by direction in advance in response to the transmitting source control signal, and generates a sound image as if conference participants were seated at one table. If there are multiple speakers whose voices cannot be separated as described above, the source control signal will include at least multiple codes with a logical value of "1". The above-mentioned paper proposes applying sound image spread evaporation processing to the sound image.

[Problem to be solved by the invention]

However, such conventional multiplexed digital transmission systems have the following drawbacks when attempting to process signals in which a source control signal and an audio signal are transmitted at the same time.

■ On the transmitting side, the transmitter's control signal is created after the transmitter's voice is generated, so the start of the audio signal and the transmission of the transmitter's control signal may be at the same time, or the voice signal may start at the same time as the transmitter's control signal. It is transmitted before the control signal. For this reason, on the receiving side, the audio signal is received before the sender's control signal, making it difficult to apply to systemization technology that requires sound image localization processing or other signal processing other than the sender's voice. Become.

■ As mentioned above, in remote conference communication, there are multiple callers at the same time, so the content of the sender control signal for at least one frame must be determined before the audio signals of how many people are added to that frame. In addition, it becomes impossible to perform sound image localization control processing according to multiple callers.

The present invention solves the above-mentioned drawbacks, and can be applied to system technology that requires sound image localization processing and other signal processing other than the voice of the speaker, and when there are multiple speakers at the same time. However, it is an object of the present invention to provide a multiplexed digital transmission system that can determine how many people's audio signals are included in one frame and can perform sound image localization control processing corresponding to a plurality of speakers.

[Means to solve the problem]

The present invention provides a multiplexing digital transmission system that includes a multi-electrification circuit that multiplexes a multiframe composed of a plurality of subframes including an input digital signal and an information control signal and sends it to a digital transmission line. creating means for creating one or more block frames in a signal frame; a sending source control signal generating means for generating a sending source control signal indicating a sending source of the digital signal;
a digital signal detection circuit for detecting the digital signal; a variable delay means for delaying the digital signal based on an input delay control signal and applying the delayed signal to the multiplexing circuit; and after detecting the digital signal of the eight digital signal product circuits,
The source control signal generated above is inserted into the block frame created above and applied to the multiplexing circuit, and the delay control signal is inserted into the above-mentioned delay control signal so that the digital signal is generated at a time within the next block frame. A bit position comparison control means for applying the bit position to the variable delay means.

Further, in the present invention, the multi-frame is composed of m positive integer subframes, and each subframe has a digital signal from the 1st bit to (n-1 integer of 2 or more) bits and a control signal for the nth bit. signal, and the nth column m
The control signal channel consisting of bits includes the information control signal of bits in a positive integer less than m, and the minimum bit length of the source control signal is defined as the value obtained by dividing k by the greatest common divisor of m and k. If the bit length of the transmission source control signal is longer than this minimum bit length, the value obtained by equally dividing this greatest common divisor can be used as the bit length.

Further, in the present invention, the address bit position designated by the calling source control signal in the block frame indicates a calling source number, and the logical value of each bit position indicates a level call control signal of the calling source. , the bit position comparison control means includes:
If the detection start time of the digital signal output from the digital signal detection circuit is before the time of the address bit position specified by the transmitter control signal in the block frame, the transmitter control is applied to this block frame. A signal is inserted, the start time of this digital signal is generated in the next block frame, and the detection time of the digital signal output from the digital signal detection circuit is the address specified by the transmitter control signal in the block frame. If it is after the bit position, the transmitter control signal is inserted into the next block frame and the delay control signal is outputted so that the start time of the digital signal is generated in the next block frame. be able to.

[Effect]

The creating means creates one or more block frames within the information control signal frame. The transmission source control signal generating means generates a transmission source control signal indicating the transmission source of the digital signal.

A digital signal detection circuit detects digital signals.

The variable delay circuit delays the digital signal based on the input delay control signal and provides the delayed digital signal to the multiplexing circuit. After the digital signal detection circuit detects the digital signal, the bit position comparison control means inserts the generated transmission source control signal into the created block frame and supplies it to the multiplexing circuit, and outputs the digital signal to the next block frame. The delay control signal is applied to the variable delay means so that the delay control signal is generated at a time within .

In addition, a multi-frame is composed of m positive integer subframes, and each subframe is composed of a digital signal from the 1st bit to (integer n-1 of 2 or more) and a control signal at the nth bit. A control signal channel consisting of m bits in the n-th column contains an information control signal of bits in a positive integer less than m, and the value obtained by dividing k by the greatest common divisor of m and k is the value of the source control signal. If the bit length of the transmission source control signal is longer than this minimum bit length, the bit length is determined by equally dividing this greatest common divisor.

Further, the address bit position specified by the transmission source control signal in the block frame indicates the transmission source number, and the logical value of each bit position indicates the level call control signal of the transmission source,
If the detection start time of the digital signal output from the digital signal detection circuit is before the time of the address bit position specified by the transmission source control signal in the block frame, the bit position comparison control means A transmitter control signal is inserted, the start time of this digital signal is generated in the next block frame, and the detection time of the digital signal output from the digital signal detection circuit is specified as the transmitter control signal in the block frame. If the digital signal is located after the address bit position, the transmitter control signal is inserted into the next block frame, and a delay control signal is output so that the start time of this digital signal is generated in the next block frame.

As described above, it can be applied to system technology that requires sound image localization processing and other signal processing other than the speaker's voice, and even if there are multiple speakers at the same time, it is possible to combine the audio signals of several people in one frame. It is possible to determine whether a speaker is included, and it is also possible to perform sound image localization control processing that corresponds to multiple callers.

:Example] An example of the present invention will be described with reference to the drawings. 1st
The figure is a block diagram of a multiplexed digital transmission system according to an embodiment of the misfiring system. FIG. 2 is a diagram showing the configuration of a multiframe in the multiplexed digital transmission system of the present invention. Figure 3 shows a diagram of the multiplexed digital transmission system of the present invention with the horizontal axis as the time axis.
FIG. 3 is a configuration diagram of a dimensional multi-frame. Figures 1 to 3
In the figure, the multiplex digital transmission system consists of an AD conversion circuit 2 that converts an input analog audio signal into a digital audio signal, and a plurality of subframes containing the converted audio signal and information control signal. A multiplexing circuit that multiplexes multi-frames and sends them to a digital transmission line, a bit clock generation circuit 5 that outputs a bit clock signal 17 synchronized with the signal of the digital transmission line 16, and a subframe clock signal based on the pit clock signal 17. a subframe clock generation circuit 6 that outputs a multiframe clock signal 18; and a multiplexing circuit 15 that generates a multiframe clock signal 21 based on the subframe clock signal 18.
A multi-frame clock generation circuit 9 is provided.

Here, the feature of the present invention is information control (block frame clock generation that outputs a block frame clock signal 20 based on the subframe clock signal 18 as a creation means for creating one or more block frames in the H frame). circuit 8, a transmission source control signal generation circuit 10 as a transmission source control signal generation means for generating a transmission source control signal 22 indicating the transmission source of the audio signal, and an information control signal clock signal based on the subframe clock signal 18. 19
an information control signal clock generation circuit 7 that outputs an audio signal, an audio detection circuit 3 that detects an audio signal, and a delay circuit that delays the audio signal by a time corresponding to the signal detection processing time of the audio detection circuit 3 based on the subframe clock signal 18. 4, and a variable delay which delays the audio signal output from the delay circuit 4 based on the input delay control signal, the subframe clock signal 18, the information control signal clock signal 19, and the block frame clock signal 20 and supplies it to the multiplexing circuit 15. As a means, the transmitting source control signal 22 is inserted into the block frame after the voice detection circuit detects the voice based on the variable delay circuit 12 and the delay circuit 13, the information control signal clock signal 19, the block frame clock signal 20 and the subframe clock signal 18. A bit position comparison control circuit serves as a bit position comparison control means for supplying a delay control signal to the variable delay circuit 12 and the delay circuit 13 so that the audio signal is generated at the time in the next block frame. 1
1 and a temporary storage circuit 14.

Furthermore, a multi-frame is composed of m positive integer subframes, and each subframe is composed of a digital signal from the 1st bit to (integer n-1 of 2 or more) bits and a control signal at the nth bit, The control signal channel consisting of m bits in the n-th column includes the information control signal of bits in a positive integer smaller than m, and the value obtained by dividing k by the greatest common divisor of m and k is used as the source control signal 22. If the bit length of the transmission source control signal 22 is longer than this minimum bit length, the bit length is determined by equally dividing this greatest common divisor.

Further, the address bit position specified by the transmission source control signal 22 in the block frame indicates the transmission source number, the logical value of each bit position indicates the level call control signal of the transmission source, and the picto position comparison control If the detection start time of the audio signal output from the audio detection circuit 3 is before the time of the address bit position specified by the transmission source control signal 22 in the block frame, the circuit 11 transmits a voice to this block frame. The source control signal 22 is inserted, the start time of this voice signal is generated in the next block frame, and the detection time of the voice signal output from the voice detection circuit 3 is specified by the source control signal 22 in the block frame. Means for inserting the transmitting source control signal 22 into the next block frame if it is after the address bit position and outputting the delay control signal so that the start time of this audio signal is generated in the next block frame. including.

The operation of the multiplex digital transmission system having such a configuration will be explained. FIG. 4 is a time chart of each signal waveform of the multiplexed digital transmission system of the present invention. FIG. 5 is a diagram showing the phase relationship between the source control signal and the voice signal after voice detection by the first delay method of the multiplexed digital transmission system of the present invention. FIG. 6 is a diagram showing the phase relationship between the source control signal and the voice signal after voice detection by the second delay method of the multiplexed digital transmission system of the present invention.

First, the basic idea of the present invention and its frame form will be explained.

FIG. 2 is a multiframe configuration diagram, and one subframe is composed of n bits. Usually n is 8, which is also called an octet.

- In boat fishing, a frame is a frame clock signal that exists for each limited time length, and the information is given meaning by configuring n bits as one unit.

Since the 15DN has an 8-bit configuration with a speed of 54 kbps, one subframe is 3 kHz L. As mentioned in the prior art, CCITT Recommendation H, 221
According to the frame format of - Add a detailed explanation.

In other words, the area from the 1st bit to the (n-1)th bit in FIG.
7 kHz listed in fjTT Recommendation G, 722
This is an example where high quality audio coding rules are applied. The n-th bit consists of a control signal, and one subframe (
FIG. 2 shows a set of m pieces of one octet constituting one multiframe. Therefore, as a control signal, a system is adopted in which a signal consisting of m bits is constituted as one frame signal.

Since it is necessary to perform frame synchronization as a multi-frame, the first few bits are required as frame synchronization signal bits. Of the m bits, k bits are an area in which an information control signal that can be used by each subscriber in the control signal can be inserted. The total amount of information in this information control signal area is now assumed to be bits. In the example of CCITT Recommendation Date, 221,
m is 80 and k is 64. In correspondence with the terms described with reference to FIG. 7, the control signal area is equivalent to a service channel, and the information control signal area is equivalent to an application channel.

When installing a transmitter control signal in this control signal area,
Although a large-scale teleconference communication accommodating 64 destinations or 64 talkers is possible as a practical maximum capacity, as a practical matter, such a scale of teleconference communication is rarely performed. In ordinary remote conference communication, there are usually about 6 stations or 6 people.

Furthermore, since m is 80, the period of this multi-frame is 100 Hz, which means that it is repeated every 1Q msec in terms of time. However, since the shortest sound is said to be about 8m5ec, large-scale remote conference communication that can accommodate up to 64 people is not possible, and even if it were possible, it would not be possible to have a conference where discussions were held simultaneously. Instead, we have no choice but to adopt a broadcast-type format. Therefore, due to system scale and audio quality, a method is proposed in which multiple repeated frames are created in the information control signal in this multi-frame, and the correspondence between the source information signal and the audio signal is constantly sent. required.

Therefore, the information control signal area is divided into equal parts, and each unit is configured as a transmission source control signal consisting of C bits. Seventh, with such a configuration, it becomes necessary to control the information control signal area, that is, the correspondence between the audio signal and the transmission source control signal for each block. To do this, first find the greatest common divisor p of m bits and bits, and the value obtained by dividing k by the greatest common divisor p becomes the number of bits of the minimum unit block frame length of the transmission source control signal channel. The number of subframes in the block frame length of the audio signal at this time is the value obtained by dividing m by the greatest common divisor p.

However, since the number of bits of this minimum unit block frame length is the number of transmitters, if the number of speakers r is greater than this number, it becomes necessary to introduce an integer multiple V of the minimum unit block frame length. . That is, the conditions for V are = (p÷v)xvxq, r≦vxq=c.

To explain more simply using an example based on CCITT Recommendation H, 221, m is 80 and k is 64, so the greatest common divisor p is 16, which is the same as the maximum number of block frame repetitions in one multiframe. .

The number of speakers at this time is 4 (64/16), and the block period is 0.525 m5ec. However, if a larger number of speakers is required, the 16 divisions are divided into 8, making it possible to increase the number of speakers from 5 to 8.

In addition, for systems that require the number of speakers, divide the number into four,
It becomes possible to increase the number of speakers from 9 to 16. The block frequency at this time is 0.4kHz (period time:
2.5m5ec), which results in 40 samplings when the audio signal is processed with 16ktlz sampling.

In this way, the maximum number of speakers and the block frame period are determined from the audio signal processing time.

Although the multi-frame structure has been explained two-dimensionally in FIG. 2, FIG. 3 shows FIG. 2 one-dimensionally with the time axis horizontally, and also shows each frame signal. That is, it is the time relationship between the audio signal and the transmission source control signal. When multiplexing, it is necessary to match the clock signal of each subframe, so it is sufficient to delay the source control signal by the bit length of the multiframe bit and other control signals and then multiplex it. becomes clear.

Examples of the present invention will be described below.

In FIG. 1, an AD conversion circuit 2 converts an analog audio signal 1 generated from a speaker into a digital signal.

The audio detection circuit 3 detects and outputs the audio start time based on the output signal of the AD conversion circuit 2. At the same time, the delay circuit 4 delays the output signal of the AD conversion circuit 2 by the audio processing time necessary to detect the audio start time. In this case, the time at which the detected voice start time is output must match or be earlier than the voice start time output by the delay circuit 4.

On the other hand, the bit clock generator circuit outputs a bit clock signal 17 synchronized with the signal of the digital transmission line.

The subframe generation circuit 6 outputs a subframe clock signal 18 for every 8 bits based on the pit clock signal 17. Information control signal clock generation circuit 7, block frame clock generation circuit 8, and multiframe clock generation circuit 9 generate information control signal clock signal 19, block frame clock signal 20, and multiframe clock signal 21, respectively.

The calling source control signal 22 can be arbitrarily set by the subscriber, and when the subscriber sets the code signal shown in the table to the sending source control signal generating circuit 10, the sending source control signal generating circuit 10 will:
A transmitter control signal 22 is generated based on the information control signal clock signal I9. At this time, the information control signal clock signal 19 is (k/m> times the subframe clock signal 18).

As mentioned above, the code of this transmission source control signal 22 indicates the information of the transmission source at the specified address bit position, and the time when the specified address bit position of the transmission source is output and the time when the voice detection circuit 3 The variable delay circuit 12 needs to change the amount of variable delay depending on the relative relationship between the audio detection time and the output time.

There are two methods to change this variable delay amount as shown below.

$ FIG. 5 shows a first delay method of delaying the voice start time from a specified address bit position in the block frame to a specified address bit position in the next block frame after the voice detection time.

If the bit position comparison control circuit 11 detects the specified address bit position in the block frame after the start of audio detection, it inserts a logical value [1] into the specified address bit position. At the same time as creating the sender control signal, the variable delay circuit 12 delays the voice start time from the voice detection time to this specified address bit position, and then delays the voice start time from this specified address bit position to the specified address bit position of the next block frame. The start of the signal is delayed by a delay circuit 13.

If the specified address bit position cannot be detected in the block frame after voice detection [Figure 5 b)], a logical value [1] is inserted into the specified address bit position in the next block frame to control the source of the voice. At the same time as creating the signal 22, the variable delay circuit 12 delays the audio start time until this inserted time, and the delay circuit 13 further delays the start of the audio signal from this designated address bit position to the next designated address bit position. '.

In this case, as shown in FIGS. 5(a) and 5(b), the unit time length of the specified address bit of the information control signal is now set from the TuS audio start time to the start of the next specified address bit position. If the time up to the time is T and the number of block frame bits is C, then O≦T8≦CTu, and a control signal frame at the specified address bit position can be generated from the voice detection time, and the delay time Ty for the start of the voice signal is: CTu≦TY (=T, +cTu)≦2CTu.

(2) FIG. 6 shows a second delay method of delaying the start time of the audio signal from the designated address bit position in the block frame to the start position of the next block frame after the audio detection time.

If there is a designated address bit position in the block frame after the voice detection time, the voice detection The start of the audio signal is delayed from the time to the start time of the next block frame by the variable delay circuit 12. In this case, the delay circuit 13 does not need to perform a delay operation.

If the specified address bit position does not exist in the block frame after voice detection [Figure 6 (company)], the logical value [1] of the specified address bit position in the next block frame is inserted and the transmitter control signal is transmitted. The start of the audio signal is delayed by the variable delay circuit 12 from the audio detection time to the start time of the next block frame, and the start of the audio signal is further delayed by the delay circuit 13 until the start time of the next block frame.

In addition, in FIGS. 5 and 6, referring to the table, if the speaker is 12 and the voice detection time is before the designated address bit position, [FIG. 5 (a) and FIG. 6 (a)
)] Caller number 7, or if there is a later [Figure 5 (b)
) and FIG. 6(c)] are examples of caller number 2, and the above-mentioned two methods showing the respective delay controls of the audio signal delay in a time chart are as follows.

■ The starting point of the audio signal is a block frame period after the specified address bit position.

(2) The start point of the audio signal is at the end of the block frame in which a significant signal, ie, the source control signal, was generated at the designated address bit position, or at the beginning of the next block frame.

This common basic idea is that the start point of the audio signal on the receiving side can be read from the block frame and the sending source control signal, and the receiving side performs audio addition signal processing and logical calculation of the sending source control signal. This makes processing easier.

As described above, after the transmitting source control signal is created, the - time storage circuit 14 writes the transmitting source control signal as the information design signal clock signal 19, reads it out based on the subframe clock signal 18, and reads it out from the multiplexing circuit. Give to 15. The delay circuit 13 outputs the audio signal delayed based on the subframe clock signal 18 to the multiplexing circuit 15. The multiplexing circuit 15 multiplexes the audio signal and the calling source control signal using the multi-frame clock signal 21 and sends the multiplexed signal to the digital transmission line 16.

As mentioned above, in this embodiment, since the sender and start time of the next audio signal are known on the receiving side, signal processing is performed to generate the audio signal at the corresponding sound image position, and lighting is turned on for each speaker. Can be processed.

Furthermore, although this embodiment deals with audio signals for the sake of simplicity, it is also possible to process analog image signals in the same way.

Furthermore, although the speaker is identified based on the bit position of the transmitter control signal, a logical number may be used as the transmitter control signal.

〔Effect of the invention〕

As explained above, the present invention can be applied to systemization technology that requires sound image localization processing and other signal processing other than the voice of the speaker, and even when there are multiple speakers at the same time, the present invention can be applied to This has the advantage of being able to determine how many people's audio signals are included in a frame, and also allowing sound image localization control processing to accommodate multiple callers.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a multiplex digital transmission system according to an embodiment of the present invention. FIG. 2 is a diagram showing the configuration of a multiframe in the multiplexed digital transmission system of the present invention. FIG. 3 is a one-dimensional multi-frame configuration diagram with the horizontal axis as the time axis in the multiplexed digital transmission system of the present invention. FIG. 4 is a time chart of each signal waveform of the multiplexed digital transmission system of the present invention. FIG. 5 is a diagram showing the phase relationship between the source control signal and the voice signal after voice detection by the first delay method of the multiplexed digital transmission system of the present invention. FIG. 6 is a diagram showing the phase relationship between the source control signal and the voice signal after voice detection by the second delay method of the multiplexed digital transmission system of the present invention. Figure 7 shows CC+TT Recommendation H for multiplexed digital transmission system.
, 221 is an explanatory diagram of a divided use frame format within 64 kbps. 1... Analog audio signal, 2... AD conversion circuit, 3
...Audio detection circuit, 4.Delay circuit, 5.Bit clock generation circuit, 6.Subframe clock generation circuit, 7.Information control signal clock generation circuit, 8.
...Block frame clock generation circuit, 9...Multi-frame clock generation circuit, 10...Sender control signal generation circuit, 11...Bit position comparison control circuit, 12
...Variable delay circuit, 13...Delay circuit, 14...
- Time memory circuit, 15... Multiplexing circuit, 16... Digital transmission line, 17... Bit clock signal, 18
. . . Subframe clock signal, 19 . . . Information control signal clock signal, 20 . . . Block frame clock signal, 21 . . . Multiframe clock signal. Patent Applicant Nippon Telegraph and Telephone Corporation Agent Patent Attorney Nao Ide Takahi-1 nl: 7 To--1 System Kosho No. Kashiwawari Buna I]
Maru+7L-mu Figure 2-To-f Summer! ! i Output output tact When voice is detected Detection time i Foot 7 address bit position 1 to 荊 荊 fbl N page eruption ffl + or specified address bit position IJ li yellow message signal example 兇-, 17) Slow Ji power Taisho 5 ■ 2B+ Conventional flight 1 For this spring's 1st flight Fushimuformat No. 7
Figure tact Detection time I address bit position when voice is detected! Example of a state that is earlier Ryoji's late man J-zuke Figure 6 Procedural amendment writing method) % formula % Incident display 1990 Patent Application No. 167518 2゜ Title of invention Multiplexed digital transmission method 3, amendment Relationship with the case involving the person who filed the patent application Patent applicant address 1-1-6 Uchisaiwai-cho, Chiyoda-ku, Tokyo Name (422> Nippon Telegraph and Telephone Corporation Representative Kojima)
Jin 4, Agent Address: 26-18 Kita-2-Chome, Sekimachi, Nerima-ku, Tokyo Name: Patent Attorney (7823) Naotaka Ide Telephone: 03-928-5673 September 10, 1990 (Shipped on September 25, 1990) Contents of the 8° correction The drawings 5 and 6 will be replaced with the attached drawings 5 and 6. 9゜Inventory drawing of attached documents (Figures 5 and 6) 1 copy (a) 4 voices, 1 protruding inscription, small Akanemu fixed ato υsuhi” 2 to ■J
5 (b) f% 7 special benefits 5 Rika has been praised for dress hit rank IJ sr distribution t-menru (formal example - 101 horses)
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Claims (1)

[Scope of Claims] 1. In a multiplex digital transmission system equipped with a multiplexing circuit that multiplexes a multiframe composed of a plurality of subframes including an input digital signal and an information control signal and sends it to a digital transmission line. , creating means for creating one or more block frames in the information control signal frame; a sending source control signal generating means for generating a sending source control signal indicating the sending source of the digital signal; a digital signal detection circuit for detecting the digital signal; a variable delay means for delaying the digital signal based on an input delay control signal and applying the delayed signal to the multiplexing circuit; The source control signal is inserted into the created block frame and applied to the multiplexing circuit, and the delay control signal is applied to the variable delay means so that the digital signal is generated at a time within the next block frame. A multiplexed digital transmission system characterized by comprising bit position comparison control means. 2. The above multi-frame is composed of m positive integer subframes, and each subframe is composed of a digital signal from the 1st bit to (integer n-1 of 2 or more) bits and a control signal at the nth bit. , the control signal channel consisting of m bits in the n-th column includes the above-mentioned information control signal of positive integer k bits smaller than m, and the value obtained by dividing k by the greatest common divisor of m and k is the above-mentioned source control signal. 2. The multiplexed digital transmission system according to claim 1, wherein the bit length is the minimum bit length of the transmission source control signal, and when the bit length of the transmission source control signal is longer than the minimum bit length, the bit length is a value obtained by equally dividing the greatest common divisor. 3. The address bit position specified by the calling source control signal in the block frame indicates the calling source number, the logical value of each bit position indicates the level call control signal of the sending source, and the bit position The comparison control means detects the block when the detection start time of the digital signal output from the digital signal detection circuit is before the time of the address bit position specified by the transmission source control signal in the block frame. A transmitter control signal is inserted into the frame, the start time of this digital signal is generated in the next block frame, and the detection time of the digital signal output from the digital signal detection circuit is the transmitter control signal in the block frame. If the control signal is after the address bit position specified by the control signal, the delay control signal is inserted so that the transmitter control signal is inserted into the next block frame and the start time of this digital signal is generated in the next block frame. 2. The multiplex digital transmission system according to claim 1, further comprising means for outputting.