JPH0191314U - - Google Patents

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Publication number
JPH0191314U
JPH0191314U JP18623987U JP18623987U JPH0191314U JP H0191314 U JPH0191314 U JP H0191314U JP 18623987 U JP18623987 U JP 18623987U JP 18623987 U JP18623987 U JP 18623987U JP H0191314 U JPH0191314 U JP H0191314U
Authority
JP
Japan
Prior art keywords
voltage
circuit
frequency amplification
detection
amplification circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18623987U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP18623987U priority Critical patent/JPH0191314U/ja
Publication of JPH0191314U publication Critical patent/JPH0191314U/ja
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案によるレベル制御回路および
その使用例のブロツク図。第2図、第3図は、従
来のレベル制御回路ブロツク図である。 それぞれのブロツクは以下に示す。1…信号源
、2…増幅回路、4…レベル検出回路、5…制御
電圧出力回路、6…可変容量ダイオード。
FIG. 1 is a block diagram of a level control circuit according to the present invention and an example of its use. FIGS. 2 and 3 are block diagrams of conventional level control circuits. Each block is shown below. DESCRIPTION OF SYMBOLS 1... Signal source, 2... Amplification circuit, 4... Level detection circuit, 5... Control voltage output circuit, 6... Variable capacitance diode.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 高周波増幅回路と、前記高周波増幅回路の入力
端とその前段回路の出力端との間に直列に介装さ
れた可変容量ダイオードと、前記高周波増幅回路
の出力信号を分岐して入力しこれを平滑して検出
電圧として出力するレベル検出回路と、前記検出
電圧を前記可変容量ダイオードに逆バイアス電圧
として加えると共に前記高周波増幅回路にAGC
電圧として加える制御電圧出力回路とを備えたこ
とを特徴とする高周波信号のレベル制御回路。
a high-frequency amplification circuit; a variable capacitance diode connected in series between the input terminal of the high-frequency amplification circuit and the output terminal of the preceding stage circuit; and a branched output signal of the high-frequency amplification circuit, which is input and smoothed. a level detection circuit that applies the detection voltage to the variable capacitance diode as a reverse bias voltage and outputs the detection voltage as a detection voltage;
A level control circuit for a high frequency signal, comprising a control voltage output circuit that applies the voltage as a voltage.
JP18623987U 1987-12-07 1987-12-07 Pending JPH0191314U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18623987U JPH0191314U (en) 1987-12-07 1987-12-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18623987U JPH0191314U (en) 1987-12-07 1987-12-07

Publications (1)

Publication Number Publication Date
JPH0191314U true JPH0191314U (en) 1989-06-15

Family

ID=31477472

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18623987U Pending JPH0191314U (en) 1987-12-07 1987-12-07

Country Status (1)

Country Link
JP (1) JPH0191314U (en)

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