JPH0186255U - - Google Patents
Info
- Publication number
- JPH0186255U JPH0186255U JP18270287U JP18270287U JPH0186255U JP H0186255 U JPH0186255 U JP H0186255U JP 18270287 U JP18270287 U JP 18270287U JP 18270287 U JP18270287 U JP 18270287U JP H0186255 U JPH0186255 U JP H0186255U
- Authority
- JP
- Japan
- Prior art keywords
- noise countermeasure
- electronic component
- predetermined number
- utility
- registration request
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000872 buffer Substances 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 5
- 230000001629 suppression Effects 0.000 description 1
Landscapes
- Dc Digital Transmission (AREA)
Description
第1図a,bは本考案の一実施例を示し、第1
図aは回路図、第1図bは実装状態の説明図、第
2図aは実施例の要部の正面図、第2図bは実施
例の要部の側面図、第3図a,bは本考案の他の
実施例を示し、第3図aは構成図、第3図bは等
価回路図、第4図a,bは従来例を示し、第4図
aは回路図、第4図bは実装状態の説明図である
。
B…フリツプフロツプ、C…ノイズ対策用バツ
フア、D…フラツトパツケージIC、E…ハイブ
リツドIC基板、P…プリント板のパターン。
Figures 1a and b show an embodiment of the present invention;
Figure a is a circuit diagram, Figure 1b is an explanatory diagram of the mounted state, Figure 2a is a front view of the main parts of the embodiment, Figure 2b is a side view of the main parts of the embodiment, Figure 3a, 3b shows another embodiment of the present invention, FIG. 3a is a configuration diagram, FIG. 3b is an equivalent circuit diagram, FIGS. FIG. 4b is an explanatory diagram of the mounting state. B...Flip-flop, C...Buffer for noise suppression, D...Flat package IC, E...Hybrid IC board, P...Printed board pattern.
Claims (1)
所定数のノイズ対策用バツフアを内蔵して成るノ
イズ対策用ICを、デイジタル回路の電子部品に
近設したことを特徴とするノイズ対策用集積回路
。 1. A noise countermeasure integrated circuit characterized in that a noise countermeasure IC, which is a single inline package type IC with a predetermined number of noise countermeasure buffers built in, is installed close to an electronic component of a digital circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18270287U JPH0186255U (en) | 1987-11-30 | 1987-11-30 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18270287U JPH0186255U (en) | 1987-11-30 | 1987-11-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0186255U true JPH0186255U (en) | 1989-06-07 |
Family
ID=31474146
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18270287U Pending JPH0186255U (en) | 1987-11-30 | 1987-11-30 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0186255U (en) |
-
1987
- 1987-11-30 JP JP18270287U patent/JPH0186255U/ja active Pending
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