JPH0147898B2 - - Google Patents
Info
- Publication number
- JPH0147898B2 JPH0147898B2 JP56157509A JP15750981A JPH0147898B2 JP H0147898 B2 JPH0147898 B2 JP H0147898B2 JP 56157509 A JP56157509 A JP 56157509A JP 15750981 A JP15750981 A JP 15750981A JP H0147898 B2 JPH0147898 B2 JP H0147898B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- voltage
- resistance
- circuit
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/086—Emitter coupled logic
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Logic Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56157509A JPS5858751A (ja) | 1981-10-05 | 1981-10-05 | 集積回路装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56157509A JPS5858751A (ja) | 1981-10-05 | 1981-10-05 | 集積回路装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5858751A JPS5858751A (ja) | 1983-04-07 |
| JPH0147898B2 true JPH0147898B2 (enExample) | 1989-10-17 |
Family
ID=15651226
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56157509A Granted JPS5858751A (ja) | 1981-10-05 | 1981-10-05 | 集積回路装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5858751A (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58107649A (ja) * | 1981-12-21 | 1983-06-27 | Nec Corp | 半導体集積回路装置 |
| US4583111A (en) * | 1983-09-09 | 1986-04-15 | Fairchild Semiconductor Corporation | Integrated circuit chip wiring arrangement providing reduced circuit inductance and controlled voltage gradients |
| JPS60102023A (ja) * | 1983-11-09 | 1985-06-06 | Hitachi Ltd | 論理lsi |
| JPS6235643A (ja) * | 1985-08-09 | 1987-02-16 | Hitachi Ltd | 半導体集積回路装置 |
| JPH01241843A (ja) * | 1988-03-23 | 1989-09-26 | Nec Corp | 集積回路装置 |
| JP2806053B2 (ja) * | 1991-02-13 | 1998-09-30 | 日本電気株式会社 | 半導体集積回路 |
-
1981
- 1981-10-05 JP JP56157509A patent/JPS5858751A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5858751A (ja) | 1983-04-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4228369A (en) | Integrated circuit interconnection structure having precision terminating resistors | |
| US3736477A (en) | Monolithic semiconductor circuit for a logic circuit concept of high packing density | |
| US4825276A (en) | Integrated circuit semiconductor device having improved wiring structure | |
| IE53844B1 (en) | Semiconductor integrated circuit comprising a semiconductor substrate and interconnecting layers | |
| US4499484A (en) | Integrated circuit manufactured by master slice method | |
| US4904887A (en) | Semiconductor integrated circuit apparatus | |
| JPH0365663B2 (enExample) | ||
| JPS6267925A (ja) | 局部に分布されるeclスレ−ブ基準発生器 | |
| US4723081A (en) | CMOS integrated circuit protected from latch-up phenomenon | |
| JPH0151066B2 (enExample) | ||
| JPS6010815A (ja) | 論理回路 | |
| EP0074804B1 (en) | Semiconductor integrated circuit comprising a semiconductor substrate and interconnecting layers | |
| JPS5858751A (ja) | 集積回路装置 | |
| US5029280A (en) | ECL circuit for resistance and temperature bus drop compensation | |
| KR900003258B1 (ko) | 대규모 집적회로(lsi) | |
| JPS6151421B2 (enExample) | ||
| JPS595657A (ja) | マスタ−スライス方式の半導体集積回路 | |
| JP3179211B2 (ja) | 半導体集積回路装置 | |
| JPS6350858B2 (enExample) | ||
| JPH01257348A (ja) | スタンダード・セル集積回路装置 | |
| US5694078A (en) | Semiconductor integrated circuit having regularly arranged transistor basic cells | |
| US5077493A (en) | Wired logic circuit for use in gate array integrated circuit | |
| JPH03218668A (ja) | 半導体集積回路装置 | |
| JPH065817B2 (ja) | バイポーラlsiにおける電源回路 | |
| JPH0120538B2 (enExample) |