JPH0141055B2 - - Google Patents

Info

Publication number
JPH0141055B2
JPH0141055B2 JP57112872A JP11287282A JPH0141055B2 JP H0141055 B2 JPH0141055 B2 JP H0141055B2 JP 57112872 A JP57112872 A JP 57112872A JP 11287282 A JP11287282 A JP 11287282A JP H0141055 B2 JPH0141055 B2 JP H0141055B2
Authority
JP
Japan
Prior art keywords
clock
input
level
detection circuit
falling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57112872A
Other languages
English (en)
Japanese (ja)
Other versions
JPS594339A (ja
Inventor
Satoshi Inano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57112872A priority Critical patent/JPS594339A/ja
Publication of JPS594339A publication Critical patent/JPS594339A/ja
Publication of JPH0141055B2 publication Critical patent/JPH0141055B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Dc Digital Transmission (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP57112872A 1982-06-30 1982-06-30 クロツク断検出回路 Granted JPS594339A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57112872A JPS594339A (ja) 1982-06-30 1982-06-30 クロツク断検出回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57112872A JPS594339A (ja) 1982-06-30 1982-06-30 クロツク断検出回路

Publications (2)

Publication Number Publication Date
JPS594339A JPS594339A (ja) 1984-01-11
JPH0141055B2 true JPH0141055B2 (enrdf_load_stackoverflow) 1989-09-01

Family

ID=14597633

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57112872A Granted JPS594339A (ja) 1982-06-30 1982-06-30 クロツク断検出回路

Country Status (1)

Country Link
JP (1) JPS594339A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61161054A (ja) * 1985-01-09 1986-07-21 Nec Corp 受信信号断検出回路
JP2001330488A (ja) * 2000-05-19 2001-11-30 Matsushita Electric Ind Co Ltd ガスメータ制御装置

Also Published As

Publication number Publication date
JPS594339A (ja) 1984-01-11

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