JPH0138976Y2 - - Google Patents

Description

[Detailed description of the invention] This invention is a power amplifier in which the power supply voltage supplied to the power amplification stage is switched according to the signal level of the signal to be amplified, and the bias of the power amplification stage is also changed according to the switching of the power supply voltage. This invention relates to a power amplifier that switches automatically.

Conventionally, power amplifiers are known in which the power supply voltage supplied to the power amplification stage is lowered for small signals, while the power supply voltage is increased for large signals in order to reduce power loss. In such a power amplifier, the bias of the power amplification stage is made deep (for example, class A bias state) when the power supply voltage is low, while this bias is made shallow (for example, class B bias state) when the power supply voltage is high. By switching, distortion especially at small signal levels, that is, sound quality, can be significantly improved. However, in this case, if a state where the bias becomes deep at a high power supply voltage occurs, there is a risk that the output transistor in the power amplification stage will be destroyed due to excessive collector loss. Therefore, this bias switching needs to be performed extremely accurately in accordance with the switching of the power supply voltage.

This idea was made in view of the above circumstances, and its purpose is to ensure that the bias of the power amplification stage is extremely accurately switched in accordance with the switching of the power supply voltage of the power amplification stage. The object of the present invention is to provide a power amplifier with improved performance. The features of this device include a diode that supplies the first power supply voltage (low power supply voltage) to the collector of the output transistor in the power amplification stage, and a power supply switch that supplies the second power supply voltage (high power supply voltage) to the collector. In the power amplifier having a transistor for the power amplifier, if the diode is in a forward bias state, the bias of the power amplification stage is made deep, and if the diode is in a reverse bias state, the bias is made shallow.

Hereinafter, embodiments of this invention will be described in detail with reference to the drawings.

FIG. 1 is a circuit diagram showing the configuration of a first embodiment of a power amplifier according to this invention. In this figure, reference numeral 1 indicates an input terminal to which a signal to be amplified is supplied, and reference numeral 2 indicates a voltage amplifier for voltage amplifying this signal. The positive side output terminal of this voltage amplifier 2 and the negative side output terminal in phase with this are connected to the power amplification stage 3 of this power amplifier.
The base of one drive transistor (NPN transistor) 4a and the base of the other drive transistor (PNP transistor) 4b are connected to each other. A bias circuit 5 is provided between the bases of both drive transistors 4a and 4b. This bias circuit 5 is
A collector-emitter of an NPN transistor 6 is inserted between the bases of the drive transistors 4a and 4b, and a resistor 7, a variable resistor 8, and a resistor 9 are connected in series in sequence, and the transistor 6
The base of is connected to the sliding terminal of variable resistor 8, and the resistor 10, variable resistor 11 and switch 1 are
2 and connected to the base of the drive transistor 4b in sequence.

On the other hand, the collector of the drive transistor 4a is connected to a power supply terminal 13a to which power supply voltage +Vh (second power supply voltage) is supplied, and the emitter of the drive transistor 4a is connected to the base of one output transistor (NPN transistor) 14a. and is connected via a resistor 15 to the emitter of the drive transistor 4b. Further, the power supply terminal 13a is connected to the collector of one voltage switching transistor (NPN transistor) 16a, and is connected to a constant current circuit 17a and a resistor 18.
A is connected to the emitter of the drive transistor 4b sequentially through a. The base of the transistor 16a is connected to the constant current circuit 17a and the resistor 18.
The transistor 16a is connected to the connection point with the transistor 16a.
The emitter of is connected to the collector of the output transistor 14a. Further, the power supply terminal 19a to which the power supply voltage +Vl (which is the first power supply voltage and has a relationship of +Vl<+Vh) is connected to the collector of the output transistor 14a via the diode 20a, and the emitter of the output transistor 14a is connected to the collector of the output transistor 14a. The output terminal 22 of this power amplifier via a resistor 21a
It is connected to the. In this power amplification stage 3, the circuit on the negative power supply side is constructed completely symmetrically to the circuit on the positive power supply side, and each corresponding component is marked with a suffix b.

Next, reference numeral 23 indicates a bias control circuit in this invention, and this bias control circuit 23 is composed of a voltage detection circuit 23a and an opening/closing control circuit 23b. The voltage detection circuit 23a detects the voltage between the anode and cathode of the diode 20a (or the base of the transistor 16a), and the voltage between the anode and the cathode of the diode 20b (or the base of the transistor 16a).
6b) and the cathode, either both of these diodes 20a, 20b are forward biased, or one of these diodes 20a, 20b is reverse biased. It detects whether there is a human being present and outputs a detection signal only in the latter case. The opening/closing control circuit 23b is connected to this voltage detection circuit 23a.
This circuit opens the switch 12 only when a detection signal is supplied from the switch 12.

Next, the operation of this power amplifier with the above configuration will be explained.

First, in the bias circuit 5, the variable resistor 8
is adjusted so that the output transistors 14a, 14b are correctly biased to class B when the switch 12 is open, and the variable resistor 11 is adjusted so that the output transistors 14a, 14b are biased correctly to class B when the switch 12 is closed.
14b is adjusted so that it is correctly biased to class A. Assume now that an input signal at a small signal level is being supplied to the input terminal 1. In this case, since the level of the signal appearing at each emitter of drive transistors 4a, 4b is also low, transistors 16a, 16b are not conductive. Therefore, in this case, the output transistor 14
The collector of a is supplied with the power supply voltage +Vl via the diode 20a, and the output transistor 1
The collector of 4b is supplied with the power supply voltage -Vl via the diode 20b. In this way, when the signal level is small, the diodes 20a, 20
Since both transistors b are biased in the forward direction, the voltage detection circuit 23a does not output a detection signal, and therefore the switch 12 is closed, so the output transistors 14a and 14b are biased to class A. Ru.

On the other hand, when an input signal of a large signal level is supplied to input terminal 1, drive transistor 4a,
The level of the signal appearing at each emitter of 4b also increases accordingly. In this case, when the emitter voltage of the drive transistor 4a rises to a level that requires a voltage higher than the voltage +Vl as the power supply voltage of the output transistor 14a, the transistor 16a becomes conductive due to the rise in the emitter voltage of the drive transistor 4b. In addition, when the emitter voltage of the drive transistor 4b decreases to a level that requires a voltage lower (larger on the negative side) than the voltage -Vl as the power supply voltage of the output transistor 14b, the emitter voltage of the drive transistor 4a decreases and the transistor 16b becomes conductive. Therefore, the output transistors 14a, 14
In the region where the signal level of the input signal exceeds each level, a voltage corresponding to the signal level (a voltage larger than the voltage ±Vl) is supplied to the collector of the diode 20.
Either a or 20b is in a reverse bias state. Therefore, in this case, the voltage detection circuit 23a
begins to output a detection signal, and as a result, the switch 12 becomes open, and the output transistor 1
4a and 14b are biased to class B.

In this way, according to the embodiment shown in FIG. 1, when the signal level is small, the output transistor 14
A low power supply voltage ±Vl is supplied to transistors 14a and 14b, and these transistors 14a and 14b are biased to class A, thereby causing transistors 14a and 14b to
14b operates at an optimal operating point within a range that does not cause excessive collector loss, and can achieve low distortion and high sound quality. Also, when the signal level is large, the output transistors 14a and 14b are controlled according to the signal level. While a high power supply voltage is supplied, these transistors 14a and 14b are biased to class B,
High efficiency is thereby achieved.

In the above embodiment, the bias is set to A class and B class.
Although the bias has been described as being switched between classes A and AB, or between classes AB and B, etc.

Next, FIG. 2 is a circuit diagram showing the configuration of a second embodiment of this invention. The circuit shown in this figure is the first
The difference from the embodiment shown in the figure is that the voltage detection circuit 2
A hold circuit 23c is provided between 3a and the opening/closing control circuit 23b, and the detection signal output from the voltage detection circuit 23a is held for a predetermined period of time and then supplied to the opening/closing control circuit 23b. According to this second embodiment, even if the power supply voltage changes frequently,
The bias switching frequency can be suppressed to a certain value, thereby making it possible to perform a more stable bias switching operation.

Next, FIG. 3 shows a specific circuit when the second embodiment is applied to an audio stereo power amplifier. In this figure, parts corresponding to those in FIG. 2 have the same reference numerals. is attached. In the power amplification stage 3 shown in this figure, an NPN transistor 26a and a PNP transistor 26b are connected to the power supply switching transistors 16a and 16b, respectively, and a capacitor 2 is connected to the base circuits of these transistors 26a and 26b.
7a, 27b and diodes 28a, 28b are provided, respectively, whereby transistor 26
The time for transition of a and 16b from a conductive state to a non-conductive state is delayed. Further, diodes 29a and 29b are inserted between the base of the transistor 26a and the power supply terminal 19a, and between the base of the transistor 26b and the power supply terminal 19b, respectively, so that the base voltage of the transistor 26a (or the transistor 26b) is It is designed so that it does not swing to the negative (or positive) side as necessary,
This prevents the rise of these transistors 26a (or transistors 26b) from being delayed due to the influence of accumulated charges. Further, the voltage detection circuit 23a includes an operational amplifier 30 configured as a comparator, and the voltage -Vl of the power supply terminal 19b and the base voltage _V1 of the transistor 26b.
This is used to detect whether the diode 20b is forward biased or reverse biased.
Further, this voltage detection circuit 23a includes a diode 31.
A voltage is supplied from the voltage detection point (point corresponding to the base of the transistor 26b) in the power amplification stage of the other channel via the channel.
The opening/closing control circuit 23b includes an operational amplifier 31 configured as a hysteresis amplifier, and the output voltage _V3 of the hold circuit 23c is the upper threshold voltage of this hysteresis amplifier.
When V _th is exceeded, the output voltage V ₄ of the operational amplifier 31 becomes low level, and the NPN transistor 32, PNP
When the transistor 33 is turned off, the NPN transistor 12' constituting the bias switching switch is turned off. On the other hand, when the voltage V ₃ falls below the lower threshold voltage V _tl of the hysteresis amplifier, the voltage V ₄ is turned off. The signal becomes high level and the transistor 12' is turned on.

For reference, the waveforms of each part of the above specific circuit are shown in FIG. In addition, in this Figure 4,
A in the figure shows the voltage of the output signal obtained at the output terminal 22.
V ₀ and the base voltage V ₁ of the transistor 26b, the figure (b) shows the output voltage V ₂ of the operational amplifier 30, and the figure (c) shows the output voltage V ₃ of the hold circuit 23c.
, and D of the figure shows the output voltage of the operational amplifier 31.
Showing V ₄ . Here, in Figure 2, T ₁
The bias is set to be shallow in the period shown by , and the bias is set to be deep in the period shown by T ₂ .

As is clear from the above explanation, in the power amplifier according to this invention, the collector of the output transistor in the power amplification stage has a diode that supplies the first power supply voltage (low power supply voltage), and a second
In a power amplifier having a power supply switching transistor that supplies a power supply voltage (high power supply voltage) of Since a bias control circuit that makes the bias shallower is provided, the bias of the power amplification stage can be switched extremely accurately in response to switching of the power supply voltage of the power amplification stage, thereby achieving low distortion at small signal levels. High sound quality and high efficiency at large signal levels can be achieved, and there is no fear that the output transistor will be destroyed by excessive power loss.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing the configuration of the first embodiment of this invention, Figure 2 is a circuit diagram showing the configuration of the second embodiment of this invention, and Figure 3 is a specific example of the second embodiment. The circuit diagram, FIG. 4, is a waveform diagram of each part of the specific circuit shown in FIG. 3... Power amplification stage, 4a, 4b... Drive transistor, 5... Bias circuit, 13a, 13
b, 19a, 19b...power terminal, 14a, 14
b...Output transistor, 16a, 16b...Power switching transistor, 20a, 20b...Diode, 23...Bias control circuit, 23a...
Voltage detection circuit, 23b...Opening/closing control circuit, 23c
...Hold circuit.

Claims (1)

[Scope of utility model registration request] a diode that supplies a first power supply voltage to the collector of the output transistor in the power amplification stage; a second power supply whose base is supplied with a signal corresponding to the amplified signal of the power amplification stage and whose collector is higher than the first power supply voltage; In a power amplifier comprising a power supply switching transistor to which a voltage is supplied and whose emitter is connected to the collector of the output transistor, if the diode is in a forward bias state, the bias of the power amplification stage is deepened; A power amplifier characterized by being provided with a bias control circuit that reduces the bias when a diode is in a reverse bias state.