JPH0133974B2 - - Google Patents
Info
- Publication number
- JPH0133974B2 JPH0133974B2 JP55143320A JP14332080A JPH0133974B2 JP H0133974 B2 JPH0133974 B2 JP H0133974B2 JP 55143320 A JP55143320 A JP 55143320A JP 14332080 A JP14332080 A JP 14332080A JP H0133974 B2 JPH0133974 B2 JP H0133974B2
- Authority
- JP
- Japan
- Prior art keywords
- fet
- circuit
- fixed potential
- voltage
- circuit point
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000010586 diagram Methods 0.000 description 3
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/3565—Bistables with hysteresis, e.g. Schmitt trigger
Landscapes
- Electronic Switches (AREA)
- Logic Circuits (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55143320A JPS5767331A (en) | 1980-10-14 | 1980-10-14 | Bias varying circuit |
US06/295,825 US4464587A (en) | 1980-10-14 | 1981-08-24 | Complementary IGFET Schmitt trigger logic circuit having a variable bias voltage logic gate section |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55143320A JPS5767331A (en) | 1980-10-14 | 1980-10-14 | Bias varying circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5767331A JPS5767331A (en) | 1982-04-23 |
JPH0133974B2 true JPH0133974B2 (US08088918-20120103-C00476.png) | 1989-07-17 |
Family
ID=15336033
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55143320A Granted JPS5767331A (en) | 1980-10-14 | 1980-10-14 | Bias varying circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5767331A (US08088918-20120103-C00476.png) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5943631A (ja) * | 1982-09-06 | 1984-03-10 | Hitachi Ltd | レベル変換入力回路 |
JPS59171216A (ja) * | 1983-03-17 | 1984-09-27 | Nec Corp | 電荷転送素子の入力サンプリングパルス発生回路 |
JPS61244115A (ja) * | 1985-04-22 | 1986-10-30 | Nec Corp | 電流制御型発振器 |
FR2758422B1 (fr) * | 1997-01-13 | 1999-02-05 | Sgs Thomson Microelectronics | Oscillateur en anneau en technologie cmos |
US20220216841A1 (en) * | 2019-05-08 | 2022-07-07 | Nippon Telegraph And Telephone Corporation | Transimpedance Amplifier |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5315056A (en) * | 1976-07-27 | 1978-02-10 | Toshiba Corp | Logic circuit |
-
1980
- 1980-10-14 JP JP55143320A patent/JPS5767331A/ja active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5315056A (en) * | 1976-07-27 | 1978-02-10 | Toshiba Corp | Logic circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS5767331A (en) | 1982-04-23 |
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