JPH01321613A - Electrode - Google Patents

Abstract

PURPOSE:To make it possible to obtain an electrode wherein the surface resistance does not increase by heat treatment at high temperature, cracks, etc., do not occur, the planeness is maintained, and the fear of separation from a substrate, etc., is small by laminating a chromic oxide layer, a chromic layer, a nickel layer, and a platinum layer in this order on a substrate. CONSTITUTION:An electrode 12 is made in multilayer structure, and a chromic oxide layer 14, a chromic layer 16, a nickel layer 18, and a platinum layer 20 are laminated in this order from the substrate 2 side. Hereby, for the reason that chromic oxide layer 14 effects preferable oxidation resistant action, etc., even if heat treatment at relatively high temperature is applied, there never occur such things that the surface is oxidized and the surface resistance increases. Also, cracks, etc., do not arise, either, and planeness as an electrode is maintained, and further this electrode 12 is never separated from the substrate 12, either.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a film-like electrode with excellent heat resistance that is particularly preferably used as a lower electrode in a ceramic capacitor or the like.

Ceramic capacitors are attracting attention as small, high-performance capacitors. This ceramic capacitor 10
As shown in FIG. 2, there is a substrate 2, a lower electrode 4 laminated on this substrate 2, a dielectric thin film 6 laminated on this lower electrode 4, and a layer laminated on this dielectric thin film 6. and an upper electrode 8.

To manufacture such a ceramic capacitor 10,
First, a film-like lower electrode 4 is formed on the substrate 2 by means such as vapor deposition. Thereafter, a dielectric thin film 6 is applied to the surface of this lower electrode 4.
, and together with the lower electrode 4 and the substrate 2 about 12
The dielectric thin film 6 is fired by heat treatment at a temperature of about 00°C. Thereafter, an upper electrode 8 is formed on the surface of this dielectric thin film 6 by means such as vapor deposition, thereby completing the ceramic capacitor 10. Note that the reason why the substrate 2 is required in the ceramic capacitor 10 is to increase the rigidity of the ceramic capacitor 10 as a whole.

Such a ceramic capacitor 10 requires heat treatment at a high temperature of about 1200° C. during its manufacturing process, and it is required that the lower electrode 4 does not change in quality due to the heat treatment.

Therefore, as the material constituting the lower electrode 4, pt, Pd
, W, Ni, Ti, Cr, and other high melting point materials are used.

However, in the conventional lower die 1ff14 made of a high melting point material such as Pd, W, Ni, Ti, Cr, etc., the surface is oxidized during the heat treatment for firing the dielectric thin film 6, resulting in an increase in sheet resistance. There was a risk.

Note that when Pl is used as the lower electrode 4, there is almost no change in sheet resistance, but due to the difference in thermal expansion coefficients of the substrate 2, lower electrode 4, and dielectric thin film 6, there is a risk that peeling or cracking may occur. There was a problem that there was. Such peeling, cracking, etc. may similarly occur even when a high melting point material other than PT is used as the lower electrode 4.

Therefore, if an electrode were developed that does not change in quality even when subjected to high-temperature heat treatment, does not peel or crack, and maintains its flatness as an electrode, it would be of extremely great industrial value.

The present invention has been made in order to solve the problems of the conventional technology, and has a structure that does not increase sheet resistance, does not cause cracks, etc., and maintains flatness even when subjected to high-temperature heat treatment. It is an object of the present invention to provide an electrode that has a low possibility of peeling off from a substrate or the like.

In order to achieve such an object, the present invention provides a film-like electrode formed on a substrate, in which a chromium oxide layer, a chromium layer, a nickel layer, and a platinum layer are formed. They are characterized in that they are laminated on the substrate in this order.

According to the electrode according to the present invention, the electrode has a multilayer structure, and the chromium oxide layer, the chromium layer, the nickel layer, and the platinum layer are laminated in this order from the substrate side.
The chromium oxide layer has extremely good adhesion to the substrate, and the platinum layer has good oxidation resistance, so even if heat treatment is performed at a relatively high temperature, the surface will not oxidize. The surface resistance does not increase, cracks do not occur, and the flatness of the electrode is maintained.
Moreover, this electrode does not peel off from the substrate.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to embodiments shown in the drawings.

FIG. 1 is a schematic cross-sectional view of a ceramic capacitor using a lower electrode according to an embodiment of the present invention.

As shown in FIG. 1, the electrode 12 according to the present invention is used, for example, as a lower electrode in a ceramic capacitor 30, and is made of chromium oxide formed on the surface of a substrate 2 (however, the value of chromium in the chromium oxide is A chromium oxide layer (hereinafter collectively referred to as "rCr 0 layer") 14 consisting of any number of ) (hereinafter referred to as "rCr 0 layer") 14 and a chromium layer (hereinafter referred to as "rCr layer") 16 consisting of chromium formed on the surface of this Cr0 layer 14 , a nickel layer (hereinafter abbreviated as "rNi layer") 18 made of nickel formed on the surface of this Cr layer 16, and this Ni layer 1.
8. A platinum layer (hereinafter referred to as rpt) consisting of platinum formed on the surface of
(hereinafter referred to as "layer") 20.

The substrate 2 is preferably made of a heat-resistant material, such as Si, SiO, Aj203 or Pt, W, T.
It is composed of metals such as i. Among these, especially S +, S
+ 02 or A J 20 s. Specifically, as the substrate 2, a silicon wafer, surface-polished alumina, or the like is used. As silicon wafers, it is possible to use any type of commercially available silicon wafer, such as non-doped type, P type, or N type, and there is no need to perform surface treatment such as surface etching. This is because it is maintained. Note that the reason why the surface of the substrate 2 is required to be flat is to maintain the flatness of the ceramic capacitor 30 formed thereon. The thickness of the substrate 2 must be sufficient to impart appropriate rigidity to the entire ceramic capacitor 30, and is in the range of 50 to 5000 μm.
It is preferable that it is m.

Note that the substrate is not necessarily limited to a flat plate shape, and may be cylindrical or cylindrical. If the substrate is cylindrical or cylindrical, the electrodes and dielectric thin film formed thereon may also be , the shape follows the shape of the substrate.

The thickness of the Cr0 layer 14 in the lower electrode 12 is 50 to 1
000 people, preferably 80-600 people. Also, C
The thickness of the r layer 16 is 50 to 200, preferably 80 to 200.
There are 150 people. The thickness of the Ni layer 18 is 200 to 20
00 people, preferably 300 to 1000 people. The thickness of the PT layer 20 is 1000 to 10000, preferably 2
000 to 6000 people. Each layer 14, 16, 18.2
By setting the thickness of electrode 1 to such a range,
The flatness of No. 2 is maintained, and cracks, peeling, etc. can be prevented.

The electrode 12 according to the present invention can be formed on the substrate 2, for example, as follows.

First, the substrate 2 is cleaned as necessary to remove dust etc. adhering to the surface, and then a predetermined thickness of carbon is coated on the substrate 2.
The r0 layer 14 is formed by a film forming method such as a sputtering method, a vapor deposition method, or a plating method. Specifically, this Cr0 layer is preferably formed by sputtering using Cr as a target and a mixed atmosphere of an inert gas such as argon and oxygen in the system. Next, this Cr0 layer 1
A Cr layer 16 of a predetermined thickness is formed on the surface of the substrate 4 using the film forming method used when forming the Cr0N14. This Cr
Specifically, it is preferable to form the layer by employing a sputtering method using C'' as a target, expelling oxygen from the system, and then setting the system to an inert atmosphere such as argon.

Thereafter, the Ni layer 18 and the PT layer 20 are formed in the same manner. Incidentally, a vapor deposition method may be adopted as a film forming method, but when a sputtering method or a vapor deposition method is adopted, both Cr
It is desirable that layer 16, N1 layer 18, and PT layer 20 be formed in succession in order to prevent oxidation of these layers 16 and 18.

Note that when forming the Cr0 layer 14 by sputtering, it may be formed in an oxidizing atmosphere using Cr as a target as described above, or may be formed using CrO as a target.

In the embodiment shown in FIG. 1, a ceramic capacitor 30 is constructed by forming a dielectric thin film 6 on the surface of the electrode 12 formed by such a method, and forming an upper electrode 8 on the surface of this dielectric thin film 6. be done.

As the dielectric thin film 6, conventionally known dielectric thin films such as barium titanate, aluminum oxide, tantalum oxide, lead titanate, zirconium oxide/lead titanate (PZT), and strontium titanate can be used. As a means for forming such a dielectric thin film 6 on the surface of the lower electrode 12, a sol-gel method, a sputtering method, a vapor deposition method, etc. are used. Although the thickness of the dielectric thin film varies depending on its material, it is preferably 1000 to 50 μm.

Upper mold [! 8, A(J, Cu, Au, A
, 11, pt, and other conventionally known electrodes may be used. As a means for forming this upper electrode 8 on the surface of the dielectric thin film 6, a sputtering method, a vapor deposition method, a plating method, etc. are used. The thickness of the upper electrode 8 is preferably 1000 to 1.0 μm.

In order to manufacture such a ceramic capacitor 30, once the dielectric thin film 6 is formed on the surface of the lower electrode 12, the dielectric thin film 6 is heat-treated together with the lower electrode 12 and the substrate 2. Heat treatment is performed by raising the temperature to approximately 800 to 1300 °C at a heating rate of 0.5 to 500 °C/min, maintaining this temperature for 30 to 300 minutes, and then increasing the temperature to 50 to 500 °C.
This is done by cooling at a cooling rate of C/min. This heat treatment is preferably carried out under an atmosphere of oxygen or an oxygen-containing gas (for example, in air).

It was confirmed that even with such heat treatment, the electrode 12 according to the present invention shows less change in sheet resistance than before the heat treatment, maintains flatness, and has almost no peeling or cracking.

Note that the electrode according to the present invention is a ceramic capacitor 30.
It is also possible to use it not only as the lower electrode 12 in , but also as an electrode in resistor chips and other electronic components.

Further, according to the present invention, a silicon oxide layer consisting of a silicon oxide layer (irrespective of valence) or an oxide film layer thereof is provided between the Cr0 layer 14 and the surface of the substrate 2 to a predetermined thickness. It may also be formed. If the substrate 2 is made of silicon, the silicon oxide layer can be obtained by heat treating the substrate 2.

As explained above, according to the present invention, the electrode has a multilayer structure, and the Cr0 layer, Cr layer, Ni layer, and PT layer are formed from the substrate side.
Since the Cr0 layer is laminated in this order, the Cr0 layer exhibits extremely good adhesion to the substrate, and the p
Because the T-layer has good oxidation resistance, even if heat treatment is performed at a relatively high temperature, the surface will not oxidize and the sheet resistance will not increase, and cracks will not occur. The flatness of the electrode is maintained, and the electrode does not peel off from the substrate, which is an excellent effect.

Hereinafter, the present invention will be explained based on more specific examples, but the present invention is not limited to these examples.

Example [Substrate Commercially available silicon wafer (P type, resistivity 10Ωa!1)
Do not use as a substrate a substrate that has been ultrasonically cleaned in Triclean, or one that has not been surface cleaned.

[Electron #! 1 The conditions under which films of cr o, cr, Nr, and pt were formed in this order on this substrate by ordinary high-frequency magnetron sputtering are shown below.

■Chromium oxide film (Cr 0 layer) After evacuating the chamber to a pressure of 1.0 x 10-5 torr or less, argon was evacuated to 1.0 x 10' torr.
Next, after introducing oxygen at 0.2 x 10-3 torr, the main valve is closed to reduce the pressure inside the system to 5.0 x 10
'torr'. Using 99.9% chromium (Cr) as a target, press sputtering was performed for 10 minutes at a high frequency output of 100 W, and then the shutter was opened for 2 minutes to form a chromium oxide film on the silicon wafer. The film thickness was approximately 120 people.

(Chromium film (Cr layer)) Next, after stopping the supply of oxygen gas, press sputtering was performed for 10 minutes to etch the chromium oxide layer on the target surface and expose a pure ROM surface. After that, the chromium film was formed on the silicon wafer at a pressure of 5 m torr.
, for 20 seconds at an output of 100W. The chrome layer thickness is approximately 8
There were 0 people.

■Nickel WA (Ni layer) Next, use 9 targets, 9% N1, and a pressure of 1
After press sputtering was performed for 10 minutes at OX 10-2 torr and output of 300 W, the shutter was opened for 2 minutes and 20 seconds to form N1WA of about 300 people.

■Platinum film (Pt layer) Next, using 99.9% platinum as the target, we performed tearless battering at a pressure of 5 x 10-3 torr and an output of 200 W for 10 minutes, and then opened the shutter for 6 minutes. Approximately 6,000 people formed platinum films.

In particular, in order to prevent oxidation of the unformed Cr layer and Ni layer, steps (1), (2), and (2) are continuous. After this process,
Cr0 layer (120 people) on silicon wafer substrate, Cr
layer (80 people), Ni layer (300 people), Pt layer (6000 people)
people) were formed in this order.

"Heat treatment" The silicon wafer with the above electrode attached was heat treated in an oxygen atmosphere. Heat treatment is carried out in an infrared image furnace or boxes.
After raising the temperature to 000°C, the temperature was maintained for 30 minutes, and then the temperature was lowered by 5°C/sec'''C''. During this time, only oxygen was supplied at 0.2J/min.

This operation was repeated 5 times. For boxes, 70°C
After raising the temperature to 1000°C at a rate of 70°C/hour, this temperature was maintained for 5 hours, and the temperature was returned to room temperature at a rate of 70°C/hour. During this time, only oxygen was supplied at 0.2J/min.

The surface resistance before heat treatment was 0.3Ω/mouth, but after heat treatment (image furnace, boxes etc.) it was 0.23Ω for both.
/ mouth, and there was no increase in resistance value. Furthermore, no cracks or discoloration occurred in the film. It also had excellent surface smoothness.

[Brief explanation of the drawing]

FIG. 1 is a schematic sectional view of a ceramic capacitor using a lower electrode according to an embodiment of the present invention, and FIG. 2 is a schematic view of a ceramic capacitor using a conventional electrode. 2... Board 4,8.12... Electric, F! i
! 14-Cr0 layer 16-Cr layer 18...N1 layer 20...PT layer Agent For patent attorney Shunichi Suzuki 1 Ward 2 Diagram

Claims (1)

[Claims] A film-like electrode formed on a substrate, characterized in that a chromium oxide layer, a chromium layer, a nickel layer, and a platinum layer are laminated in this order on the substrate.