JPH01318417A - Automatic gain control circuit - Google Patents

Abstract

PURPOSE:To shorten attack time even with the use of a voltage control type amplifying circuit by switching the voltage of a 1st input terminal of a differential amplifying circuit to the prescribed voltage via a 1st current source in accordance with the level of the detection signal. CONSTITUTION:A transistor TRQ19 is switched to the ON state and the differential voltages of the emitters of both TRQ13 and TRQ15 are inputted to the TRQ11 and the TRQ12 in a period T2 when the level of the reproduction signal SRF has a fall. In this case, said differential voltages ate proportional to the emitter currents of the TRQ13 and the TRQ15 and therefore changed in response to the current values of the constant current sources 24, 30 and 31 against a constant current source 29. Thus a voltage control type amplifying circuit 2 is kept at the gain that is decided by the current values of those sources 24, 29, 30, 31. Then the attack time is shortened even with the use of the circuit 2 having a multiplication circuit constitution.

Description

[Detailed description of the invention] The present invention will be explained in the following order.

A: Industrial field of application B: Outline of the invention C: Conventional technology (Figures 2 to 4) D: Rate of problems to be solved by the invention (Figure 5) E: Means for solving the problem (Figure 1) ).

F Effect (FIG. 1) G Embodiment (FIG. 1) H Effects of the Invention A Industrial Application Field The present invention relates to an automatic gain control circuit, and is suitable for application to, for example, a magnetic disk drive.

B Summary of the Invention The present invention provides an automatic gain control circuit that maintains the gain of a voltage-controlled amplifier circuit at a predetermined value using a current source, thereby preventing attack even when using a voltage-controlled amplifier circuit with a multiplier circuit configuration. You can shorten the time.

C. Prior Art Conventionally, in a magnetic disk drive, a reproduced signal obtained from a magnetic head is corrected to a predetermined signal level via an automatic gain control circuit.

That is, in FIG. 2, ``2'' indicates a feedback type automatic gain control circuit as a whole, and supplies the reproduced signal SRF to the voltage control type amplifier circuit 2. As shown in FIG.

As shown in FIG. 3, the voltage controlled amplifier circuit 2 includes transistors Q1 and Q2 having a differential amplifier circuit configuration, and transistors Q3 and Q4 having a differential amplifier circuit configuration whose emitters receive the output currents of the transistors Q1 and Q2. Q5 and Q6
The multiplication circuit as a whole constitutes a multiplication circuit.

That is, the emitters of the transistors Q1 and Q2 are connected through a resistor 3, and constant current sources 4 and 5 are connected, respectively, so that an input signal is received between the transistors Q1 and Q2.

On the other hand, transistors Q3 and Q4 and Q5 and Q6
■ Control voltage between the respective bases. Along with receiving
Transistors Q3 and Q5 and transistors Q4 and Q6
A common load resistor 7 and 8 is connected between the two.

Therefore, as shown in FIG.
When a signal source 9 with voltage VIIF is connected to Load the output signal.

The voltage can be obtained as the terminal voltage of the resistors 7 and 8.

Here ■, each transistor Q1, Q2, Q3, Q4
, represents the thermal voltage of Q5 and Q6, where k is the Boltzmann constant, T is the absolute temperature, and q is the amount of charge of electrons.Thus, the reproduced signal is transmitted to the transistors Q1 and Q2 in place of the signal source 9. Input 5IIF and control voltage ■.

By controlling the output signal according to the signal level of the reproduced signal SRF, it is possible to obtain an output signal corrected to a predetermined signal level.

That is, the voltage-controlled amplifier circuit 2 provides the output signal So to the peak detection circuit 10, and the resulting detection signal S,
is output to the gain control circuit 11.

The gain control circuit 11 generates a control signal Sc whose signal level changes in accordance with the detection signal, and applies a control voltage (2) to the voltage-controlled amplifier circuit 2. Bind and output.

In this way, even if the signal levels of the reproduced signals S and IF pulsate, the output signal S is corrected to a predetermined signal level. It has been made so that you can get it.

D Problems to be Solved by the Invention By the way, as shown in FIG. 5, in the reproduced signal 5RF (FIG. 5 (A)) obtained from the magnetic head, the signal level rises from the O level at every predetermined period. being done.

In this case, the control signal Sc is the output signal S during the period T1 in which the signal level of the reproduced signal 5FIF rises.

The gain G of the voltage-controlled amplifier circuit 2 is set to the control voltage ■ so that the signal level becomes a predetermined signal level. However, during the period T2 when the signal level of the reproduced signal 5IIF is O level, the signal level greatly exceeds the operating area A'RD. As a result, the gain G shifts to a region ARP (hereinafter referred to as a saturation region) in which the gain G does not change even if the control voltage 6-V changes.

Therefore, immediately after the signal level of the reproduced signal SRF rises from the O level, the control signal S. During the period until the signal level of S rises from the saturation region to a predetermined voltage in the operating region, the output signal S. There was a problem that overshoot occurred in the envelope (FIG. 5(B)).

In order to improve this problem, during the period T2 in which the signal level of the reproduced signal SRF is 0 level, the control signal S is activated.

By keeping the gain G at a predetermined level by keeping the gain G at a predetermined level, after the signal level of the reproduced signal SRF rises from the 0 level, the output signal S. A method has been proposed to shorten the period until the signal level falls to a predetermined level (hereinafter referred to as attack time) (Special Publication No. 61-61
570, Japanese Patent Publication No. 61-61726).

In this way, it is possible to obtain an automatic gain control circuit with a short attack time by holding the control signal Sc at a predetermined level and reducing the displacement of the control signal S before and after the signal level of the reproduced signal SRF rises. can.

However, in reality, the voltage-controlled amplifier circuit 2 with a multiplier circuit configuration
In this case, since the range of the operating region ARD is a small range of about 50 (mV) around the center voltage of the control voltage VC, the gain G is maintained at a predetermined gain by maintaining the control signal S at a predetermined level. There is a problem in that it is difficult to do so, and it cannot be practically applied to this type of voltage-controlled amplifier circuit 2.

The present invention has been made in consideration of the above points, and aims to propose an automatic gain control circuit that can shorten the attack time even when using a voltage-controlled amplifier circuit with a multiplier circuit configuration.

E Means for Solving the Problem In order to solve this problem, the present invention provides a variable gain amplifier circuit 2 and an input signal s+t of the variable gain amplifier circuit 2.
y or output signal S. A signal level detection circuit 1 outputting a detection signal SP whose signal level changes according to the signal level of
0 and a gain control circuit 21 configured to control the gain G of the variable gain amplifier circuit 2 based on the signal level of the detection signal SP. Differential amplifier circuit 22.23.24.25.26, Qll receiving SP at the first input terminal
, Q12, and differential amplifier circuit 22.23.24.25.2
6. A first current source 28.6, which is configured to switch the voltage VBI at the first input terminal of Qll and Q12 from the signal level of the detection signal S to a predetermined voltage in accordance with the signal level of the detection signal S. 30.31, Q13, Q19, and the voltage at the second input terminal of the differential amplifier circuit 22.23.24.25.26, Qll, Q12, are held at predetermined voltages. Current sources 28, 29, Q14, and Q15 are provided.

F action First current source 28.30, 31, Q13, Q19 differential amplifier circuit 22.23.24.25.26, -9=Qll, the voltage VB+ of the first input terminal of Q12 is detected as a signal. Detection signal S depending on the signal level of SP.

If you switch from the signal level to the specified voltage,
The gain of the variable gain amplifier circuit 2 is determined from the gain according to the signal level of the detection signal SP by the first and second current sources 28.30.
．． 31. Q13, Q19 and 28.29, Q14, Q1
It is possible to switch to a gain determined by a current of 5.

G example An embodiment of the present invention will be described in detail below with reference to the drawings.

In FIG. 1, in which parts corresponding to those in FIG. It is applied to the transistor Qll of the control circuit 21.

Transistor Qll constitutes a differential amplifier circuit together with transistor Q12, and transistor Qll
And the collector voltage of Q12 is the extraneous voltage ■. The signal is then output to the voltage controlled amplifier circuit 2.

That is, transistors Qll and Q12 have their emitters connected to constant current source 24 through resistors 22 and 23, respectively, and transistor Q13 through load resistors 25 and 26.
The collector has been connected to the

The transistor Q13 has its base connected to a reference power supply 28 having a reference voltage V□1, and thereby the transistor Q13
The emitter voltage of is set as the reference voltage ■1. (i.e., the base-emitter voltage of transistor Q13 is
E3 is maintained at voltage VREFVIIE3).

Further, the transistor Q12 is connected to a transistor Q15 via a diode-connected transistor Q14, and is also connected to a constant current source 29.

The transistor Q1'5 is connected to the reference power supply 28 in the same way as the transistor Q13, so that the base voltage ■8° of the transistor Q12 is equal to the voltage VR.
EF is maintained at vBt4VBES (with the base-emitter voltages of the channel transistors Q14 and Q10 being EE4 and vB!5).

Thus, constant current source 29 connects transistors Q14 and Q
15, along with the reference power supply 28, transistors Q11 and Q
12, resistors 22, 23, 25, and 26, and a constant current source 24 constitutes a second current source that maintains the voltage at the second input terminal of the differential amplifier circuit at a predetermined voltage.

Therefore the control voltage■. is the difference voltage between the base voltage of the transistor Q12 and the signal level of the detection signal SP consisting of the base voltage of the transistor Qll and the base voltage of the transistor Q12.
Assuming that the resistance values of the emitter resistors 22 and 23 are REI, and the resistance values of the load resistors 25 and 26 are RLI, the following equation can be obtained.If the reproduced signal SRF is input in place of the signal source 9, a predetermined signal can be obtained from the load resistors 7 and 8. Output signal S corrected to level. can be obtained.

Further, in this embodiment, the base of one transistor Q11 is connected to a transistor Q13 and a constant current source 30 via a diode-connected transistor Q19, and is also directly connected to a constant current source 31.

Therefore, since the emitter voltage of transistor Q13 is held at the voltage VREF VBE3 determined by the reference voltage V REF, the emitter voltage vREF - VBE3
From the base-emitter voltage of transistor Q19■80
．． When the signal level of the detection signal SP is higher than the voltage that has fallen by the amount of the voltage, the transistor Q 1 '9 is switched to the off state. □As a result, the base voltage V B H of the transistor Qll changes to follow the signal level of the detection signal SP, and the output signal S is thereby corrected to a predetermined signal level. can be obtained.

On the other hand, when the signal level of the detection signal SP decreases, the transistor Q19 is switched on, and the base voltage VB+ of the transistor Qll is changed to the reference voltage V REF
A predetermined voltage determined by (i.e. voltage VREF 'VBE
3 VIIE9).

Thus, constant current source 30 connects transistors Q13 and Q
19. The voltage V B H at the first input terminal of the differential amplifier circuit composed of the constant current source 31, the reference power source 28, the transistors Qll and Q12, the resistors 22, 23, 25, 26, and the constant current source 24. , constitutes a first current source that switches the signal level of the detection signal S to a predetermined voltage according to the signal level of the detection signal SP.

Therefore, in transistors Qll and Q12, since current 11 flows through both transistors Q19 and Q14 connected to the bases, assuming that the base-emitter voltages of transistors Q19 and Q14 are equal, the following formula % formula %) -V BES V BH3... A differential voltage expressed as (4) is obtained between the bases.

At this time, in transistors Q13 and Q15,
The base-emitter voltages V BH3 and V BES vary in proportion to the emitter current, in which case the constant current source 24.3
0 and 31 currents 12, I3 and 11, and constant current source 29
Since currents 11 and 11 flow respectively, the reverse saturation current of transistors Q13 and Q15 is set to 15, and the following relational expression is obtained. Substituting this into equation (3), the following equation is obtained. It can be transformed into the relational expression of the formula %.

Therefore, when the signal level of the detection signal S becomes low, the gain G of the voltage-controlled amplifier circuit 2 is calculated by substituting equation (7) into equation (1) as follows: (8) 1 -1. +12+I3 ・・・・・・(9
), where the emitter resistances 22 and 23
If the resistance values RE+ and RLl of the load resistors 25 and 26 are set equal, the gain is maintained at the gain expressed by the following equation.

That is, by selecting the reference voltage V REF with respect to the signal level of the detection signal SP, the output signal So corrected to a predetermined signal level is maintained during the period T1 (FIG. 5) in which the signal level of the reproduced signal SRF rises. On the other hand, during the period T2 during which the signal level of the reproduced signal SRF falls, the output signal S is amplified with the gain expressed by equation (10). can be obtained.

Therefore, from equation (7), the current value I of constant current sources 24 and 29
, the current value of the constant current source 30 or 31 ゛I2 or ■
By selecting 3, the gain G of the voltage-controlled amplifier circuit 2 can be maintained at a desired gain during the period T2 in which the signal level of the reproduced signal SRF falls.

Thus, by setting the currents of each constant current source 24, 29, 30 and 31 to a desired current ratio, the control signals S,
can be maintained at a predetermined level and the voltage-controlled amplifier circuit 2 can be maintained at a gain determined by the current ratio, so even in the voltage-controlled amplifier circuit 2 with a multiplier circuit configuration, the signal level of the reproduced signal SRF rises. It is possible to obtain an automatic gain control circuit 2 that can maintain a desired gain with high accuracy when the gain decreases, and has a correspondingly short attack time.

Furthermore, in an integrated circuit, since the current ratio of a constant current source can be obtained with extremely high precision, the desired gain can be maintained with extremely high precision, making automatic gain control suitable for integrated circuits. A circuit 20 can be obtained.

Furthermore, by maintaining the automatic gain control circuit 20 at a predetermined gain during the period T2 in which the signal levels of the reproduced signals S and IF fall, the signal processing circuit is free from noise signals during the period T2. Contamination can be reduced, and malfunctions of the magnetic disk device can be prevented accordingly.

In the above configuration, during the period Tl (FIG. 5(A)) in which the signal level of the reproduced signal SRF rises, the transistor Q19 is switched to the off state, and the reference voltage V R
Base voltage Vllz of transistor Q12 determined by EF
The difference signal between the signal levels of the detection signal S and the detection signal S is amplified, and the gain of the voltage-controlled amplifier circuit 2 is controlled based on the control signal SC obtained as a result.

On the other hand, during the period T2 in which the signal level of the reproduced signal SRF falls, the transistor Q19 is turned on, and the voltage difference between the emitter voltages of the transistors Q13 and Q15 is input to the transistors Qll and Q12.

Since the differential voltage is proportional to the emitter currents of transistors Q13 and Q15, it changes according to the current values of constant current sources 24.30 and 31 with respect to constant current source 29, thereby causing constant current sources 24.29. The voltage controlled amplifier circuit 2 is maintained at a gain determined by the current values 30 and 31.

According to the above configuration, during the period T2 in which the signal level of the reproduced signal SRF falls, the gain of the voltage-controlled amplifier circuit 2 is maintained at the gain determined by the current values of the constant current sources 24, 29, 30 and 31. By doing so, the gain of the voltage-controlled amplifier circuit 2 can be maintained with high precision, and thus the attack time can be shortened even when a voltage-controlled amplifier circuit with a multiplier circuit configuration is used.

In the above embodiment, a case has been described in which the resistors 25 and 26 are connected to the transistor Q13 and the constant current source 30 together with the transistor Q19, but the present invention is not limited to this. It can be widely applied, such as when it is separated from the current source 30 and connected directly to a power supply line, or when it is connected to a separate predetermined reference power supply.

In this way, the base-emitter voltage VIIE3 of the transistor Q13 expressed by the relational expression (5) can be set to a voltage determined by the constant current sources 30 and 31.

Furthermore, in the above embodiment, a case has been described in which a peak detection circuit is used as the signal level detection circuit to correct the signal level of the reproduced signal SRF to a predetermined level, but the signal level detection circuit is not limited to the peak detection circuit. The present invention can be widely applied, such as when a signal level detection circuit that detects the average value of the output signal of a variable gain amplifier circuit is used instead of the detection circuit.

Further, in the above-described embodiment, the case where the present invention is applied to a feedback type automatic gain control circuit has been described, but the present invention is not limited to this, and the gain can be adjusted according to the signal level of the input signal of the automatic gain control circuit. It can also be widely applied to feedforward type automatic gain control circuits designed to control.

Further, in the above-described embodiments, a case has been described in which a voltage-controlled amplifier circuit having a multiplier circuit configuration is used, but the present invention is not limited to this, and can be widely applied to various automatic gain control circuits.

Further, in the above-described embodiments, a case has been described in which the present invention is applied to a magnetic disk device, but the present invention is not limited to magnetic disk devices, but can be widely applied to various electronic devices.

H Effects of the invention As described above, according to the present invention, the gain of the voltage-controlled amplifier circuit is maintained at the gain determined by the current value of the constant current source, thereby increasing the gain of the voltage-controlled amplifier circuit. It is possible to maintain accuracy, and thus the attack time can be shortened even when a voltage-controlled amplifier circuit having a multiplier circuit configuration is used.

[Brief Description of the Drawings] Fig. 1 is a connection diagram showing an automatic gain control circuit according to an embodiment of the present invention, Fig. 2 is a block diagram showing the overall configuration of the automatic gain control circuit, and Fig. 3 is a voltage control circuit. FIG. 4 is a connection diagram showing a comb-type amplifier circuit, FIG. 4 is a characteristic curve diagram showing its input/output characteristics, and FIG. 5 is a signal waveform diagram for explaining problems. 1.20... Automatic gain control circuit, 2...
・Voltage controlled amplifier circuit, 10.11.24.29.30
．． 31... constant current source, 10... peak detection circuit, 11.21... gain control circuit.

Claims (1)

[Claims] A variable gain amplifier circuit; a signal level detection circuit that outputs a detection signal whose signal level changes depending on the signal level of the input signal or output signal of the variable gain amplifier circuit; and the signal of the detection signal. and a gain control circuit adapted to control the gain of the variable gain amplification circuit based on the level, the gain control circuit comprising: a differential amplifier receiving the detection signal at a first input terminal; an amplifier circuit; a first current source configured to switch the voltage at a first input terminal of the differential amplifier circuit from the signal level of the detection signal to a predetermined voltage in accordance with the signal level of the detection signal; and a second current source configured to maintain the voltage at the second input terminal of the differential amplifier circuit at a predetermined voltage.