JPH01311576A - Manufacture of multi-terminal hybrid ic and terminal structure - Google Patents
Manufacture of multi-terminal hybrid ic and terminal structureInfo
- Publication number
- JPH01311576A JPH01311576A JP63140552A JP14055288A JPH01311576A JP H01311576 A JPH01311576 A JP H01311576A JP 63140552 A JP63140552 A JP 63140552A JP 14055288 A JP14055288 A JP 14055288A JP H01311576 A JPH01311576 A JP H01311576A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- bending
- terminals
- hybrid
- comb
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 4
- 238000005476 soldering Methods 0.000 claims abstract description 15
- 238000000034 method Methods 0.000 claims description 10
- 229910000679 solder Inorganic materials 0.000 claims description 9
- 238000005452 bending Methods 0.000 abstract description 16
- 238000004080 punching Methods 0.000 abstract description 3
- 239000000758 substrate Substances 0.000 abstract description 3
- 239000002184 metal Substances 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 101100387247 Drosophila melanogaster Gdh gene Proteins 0.000 description 1
- 101150013260 GLUD1 gene Proteins 0.000 description 1
- 240000004808 Saccharomyces cerevisiae Species 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
Landscapes
- Multi-Conductor Connections (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Manufacturing Of Electrical Connectors (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は入出力用に多くの端子を必要とするハイブリッ
ドＩＣの製造方法及び端子構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a manufacturing method and terminal structure of a hybrid IC that requires many terminals for input/output.
従来この種のハイブリッドＩＣは、基板上に部品のりフ
ローによる半田付けと同時に入出力端子の半田接続も行
っている。このためリード７ノの一端を第４図（、）に
示す如く逆Ｕ字形に折り返し曲が９部７３を設け、リー
ド７１の先端部７２を半田付はバンド７５に略垂直に当
接し、リフローによる半田付け７６を行っていた（実顯
昭６１−１３４８５６号参照）。Conventionally, in this type of hybrid IC, input/output terminals are connected by soldering at the same time as components are soldered onto a board using a glue flow. For this purpose, one end of the lead 7 is folded in an inverted U-shape as shown in FIG. Soldering 76 was carried out by (see Jitten No. 61-134856).
又基板の片面に入出力端子を形成する他の方法は第４図
価）のようにリードフレーム８１を略ノ１ット形に形成
し、ハツトの１部にノツチ８４を入れ、前記基板を挟持
可能な構造とし、半田デッｆＫより半田付けし、後で連
結部８３を取り除くことによってリード端子を構成して
いた（特開昭６２−２６６．８５６号公報参照）。Another method for forming input/output terminals on one side of the board is to form the lead frame 81 into a substantially knot shape as shown in the fourth figure, insert a notch 84 in a part of the hatch, and then attach the board to the lead frame 81. It has a structure that can be held in place, and a lead terminal is constructed by soldering from a solder deck fK and later removing the connecting portion 83 (see Japanese Patent Laid-Open No. 62-266.856).
ハイブリッドＩＣの入出力端子が多数必要となってくる
と、基板の片面だけの接続では端子数が不足し、基板の
両面から入出力端子を設ける必要が生ずる。又ハイブリ
ッドＩＣを搭載するマザーボードのスルーホールピッチ
は強度、作業性等の理由から通常２．５４ｍピッチとな
っている。このためある長さの実装範囲内で入出力端子
の接続を得るには、多列化する必要がある。しかしなが
ら従来の端子構造では基板の両面に多数の端子をり７ｏ
＝又は半田デイツプによフ固着することが非常に難かし
いと云う問題が゛あった。When a hybrid IC requires a large number of input/output terminals, the number of terminals becomes insufficient if only one side of the board is connected, and it becomes necessary to provide input/output terminals from both sides of the board. Furthermore, the through-hole pitch of a motherboard on which a hybrid IC is mounted is usually 2.54 m for reasons such as strength and workability. Therefore, in order to connect input/output terminals within a mounting range of a certain length, it is necessary to use multiple rows. However, in the conventional terminal structure, there are many terminals on both sides of the board.
Another problem was that it was very difficult to fix the tape with a solder dip.
本発明は前述の問題点に鑑みなされたもので、ハイブリ
ッドＩＣの基板両面へ多端子を取付けりフローによって
固着することを目的とする。The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to attach multiple terminals to both sides of a hybrid IC substrate and secure them by a flow process.
本発明は多端子ハイブリッドＩＣに端子を固定するに際
し、交互に曲げ位置を変え連鎖部で連結したくし状の多
端子を２部枚１組とし互に向い合せ、基板の表、裏面に
設けた端子用・ぐラド部を挟持するように固定し、リフ
ロー後にくし状の多端子から連鎖部を切断する。これに
よりハイブリッドＩＣに千鳥格子のくし状多端子を形成
する。In the present invention, when fixing terminals to a multi-terminal hybrid IC, two pieces of comb-shaped multi-terminals, which are alternately bent at different positions and connected by chain parts, are made into a set, facing each other, and provided on the front and back surfaces of the board. Clamp and fix the terminal/glud part, and after reflow, cut the chain part from the comb-shaped multi-terminal. This forms a comb-shaped multi-terminal in a staggered pattern on the hybrid IC.
本発明によれば、ハイブリッドＩＣの入出力用端子を多
数設けるため、くし状の多端子を階段状に折り曲げる時
に交互に折り曲げ位置を変えることによって千鳥格子の
くし状多端子を実現した。According to the present invention, in order to provide a large number of input/output terminals for a hybrid IC, a comb-shaped multi-terminal in a staggered pattern is realized by alternately changing the bending position when folding the comb-shaped multi-terminal in a stepwise manner.
この千鳥格子の多端子を形成したことによシマザーボー
ドのスルーホールピッチ２．５４ｍを維持し、更に強度
や作業性を損うことなく端子の多列化を図シ、多端子構
造を実現するものである。By forming this houndstooth pattern of multi-terminals, the motherboard's through-hole pitch of 2.54 m can be maintained, and the multi-terminal structure can be realized by increasing the number of terminals in multiple rows without compromising strength or workability. It is something to do.
第１図は本発明の実施例を示す斜視図である。 FIG. 1 is a perspective view showing an embodiment of the present invention.
これは金属板の連続打抜き曲げ加工によりくし状の多端
子とし、階段状に折り曲げる時に交互に曲げ位置を変え
て端子１２．１３を形成する。該端子１２．１３の一方
は連鎖部１１によシ連結されている。This is made into a comb-shaped multi-terminal by continuous punching and bending of a metal plate, and the terminals 12 and 13 are formed by alternately changing the bending position when folding into a step-like shape. One of the terminals 12, 13 is connected to the chain 11.
基板の端子用パッドへ固着する半田付部１８は連鎖部１
１の反対の端に形成される。端子１２は連鎖部１１から
直線に伸び必要な端子長を形成した後、第１の曲げ１４
（山折り）、及び第２の曲げ１５・（谷折り）を行い先
端に半田付部１８を形成する。ここで第１の曲げ１４と
第２の曲げ１５の段差がマザーざ−ドの列方向スルーホ
ールピッチとなる。The soldering part 18 that is fixed to the terminal pad of the board is the chain part 1.
formed at the opposite end of 1. The terminal 12 extends in a straight line from the chain portion 11 to form the required terminal length, and then is bent by a first bend 14.
(mountain fold) and a second bend 15 (valley fold) to form a soldering portion 18 at the tip. Here, the difference in level between the first bend 14 and the second bend 15 becomes the through hole pitch in the column direction of the motherboard.
次に端子１３は連鎖部１１からすぐに第１の曲げ１６（
山折り）と第２の曲げ１７（谷折り）を行い連鎖部を略
平行に必要な端子長を形成した後半田付部１８を設ける
。The terminal 13 is then immediately moved from the chain 11 into the first bend 16 (
A rear soldering part 18 is provided by performing a second bend 17 (a mountain fold) and a second bend 17 (a valley fold) to make the chain part substantially parallel and to form the required terminal length.
次に本発明に係る多端子１を基板２にセットした時の説
明図を第２図に示す。Next, FIG. 2 shows an explanatory diagram when the multi-terminal 1 according to the present invention is set on the board 2.
２枚の多端子１を１組とし互に向に合わせにしてクラン
プ治具４の固定部４３と挟持部４１゜４２との間に挟み
込む。この状態で基板２の端子用ノＺツド２１．２２に
多端子１の半田付部１２が合うようにセットする。クラ
ンプ治具４Ｑ押えばね４４の弾力によって基板２と多端
子１とクランプ治具４が保持される。従ってこのままの
状態でリフロー装置に流すことが可能となり基板２の端
子用ノ４ツド２１，２２と多端子１の半田付部１８とが
半田３によって固着、接続される。Two multi-terminals 1 are made into a set and are sandwiched between the fixing part 43 and the clamping parts 41 and 42 of the clamp jig 4 with their directions facing each other. In this state, the multi-terminal 1 is set so that the soldering portion 12 of the multi-terminal 1 is aligned with the terminal nozzles 21 and 22 of the board 2. The board 2, the multi-terminal 1, and the clamp jig 4 are held by the elasticity of the clamp jig 4Q pressing spring 44. Therefore, it is possible to flow it into a reflow apparatus in this state, and the terminal nodes 21 and 22 of the board 2 and the soldering portion 18 of the multi-terminal 1 are fixed and connected by the solder 3.
第３図は本発明に係る端子組立工程図である。FIG. 3 is a terminal assembly process diagram according to the present invention.
同図に基づき本発明の端子組立工程を説明する。The terminal assembly process of the present invention will be explained based on the figure.
まず第３図（、）は裏面半田ペーストの印刷工程である
。通常基板２の端子用パッド２１のみ半田ペースト３の
印刷が行われる。第３図（ｂ）は部品搭載面（表面）の
半田イースト印刷工程である。この工程は端子用ノぐラ
ド２２、部品用ノ母ツド２３，２４に半田ペースト３の
印刷を行う。第３図（ｃ）は部品搭載工程であり、部品
５，６を搭載する。第３図（ｄ）は多端子１の挿着工程
であり、第２図で説明したクランプ治具４に保持された
多端子１の半田付部１８を多少ひらきぎみにして基板２
の端子用・ぐラド２１，２２にセットする。前述の工程
完了後リフロー装置に流し、部品５，６と多端子°１を
同時に半田付けする。第３図（、）は最終工程で多端子
１の中央部（第２図ｘ−ｘ’線）にて連鎖部１１を取り
除くため切断を行い４列千鳥格子の多端子１が完成する
。First, FIG. 3 (,) shows the process of printing the backside solder paste. Usually, the solder paste 3 is printed only on the terminal pads 21 of the board 2. FIG. 3(b) shows the solder yeast printing process for the component mounting surface (front surface). In this step, solder paste 3 is printed on the terminal pad 22 and the component pads 23 and 24. FIG. 3(c) shows a component mounting process, in which components 5 and 6 are mounted. FIG. 3(d) shows the process of inserting the multi-terminal 1, in which the soldering part 18 of the multi-terminal 1 held by the clamp jig 4 explained in FIG.
For the terminals, set it on the pads 21 and 22. After the above-mentioned steps are completed, the parts 5 and 6 and the multi-terminal 1 are simultaneously soldered by flowing into a reflow apparatus. FIG. 3(,) shows that in the final step, the multi-terminal 1 is cut at the central portion (line xx' in FIG. 2) to remove the chain portion 11, and the multi-terminal 1 in a four-row houndstooth pattern is completed.
以上詳細に説明した如く本発明によればハイブリッドＩ
Ｃの入出力端子を千鳥格子化することが容易で高密度実
装が可能となる。多端子は隣接端子共同様な第１曲げ第
２曲げが行われるため連続打抜き、曲げ加工の地取りサ
イズを最小にでき、しかも高い寸法精度を得ることが容
易である。又端子組立は、搭載部品と共に同時リフロー
されるため多端子接続のコストは非常に安価ですみ、高
密度実装に適した低コストの多端子ハイブリッドＩＣを
提供することができる。As explained in detail above, according to the present invention, the hybrid I
It is easy to arrange the input/output terminals of C in a staggered pattern, allowing high-density packaging. In the case of multi-terminals, adjacent terminals are subjected to the same first bending and second bending, so that the ground size of continuous punching and bending can be minimized, and it is easy to obtain high dimensional accuracy. Furthermore, since the terminal assembly is simultaneously reflowed together with the mounted components, the cost of multi-terminal connection is extremely low, making it possible to provide a low-cost multi-terminal hybrid IC suitable for high-density packaging.
第１図は本発明に係る端子の斜視図、第２図は本発明に
係るリフロー時の端子取付構造図、第３図は本発明に係
る端子組立工程図、第４図は従来の端子組立図。
１・・・多端子、２，７．８・・・基板、３・・・半田
に一スト、４・・・クランプ治具、１ノ・・・連鎖部、
１２゜１３・・・端子、１８・・・半田付部、２１．２
２・・・端子用パッド。
特許出願人 沖電気工業株式会社
本、茫Ｂ月端チ余１硯図
第１ 図
リフロー時の工柄子取イ寸講迭図
硝２図
！！日月１：よろ端子剤１立工幸五図
オ芝東の蛯テ絹、１図Fig. 1 is a perspective view of a terminal according to the present invention, Fig. 2 is a terminal mounting structure diagram during reflow according to the present invention, Fig. 3 is a terminal assembly process diagram according to the present invention, and Fig. 4 is a conventional terminal assembly. figure. 1... Multi-terminal, 2, 7.8... Board, 3... One stroke of solder, 4... Clamp jig, 1... Chain part,
12゜13...Terminal, 18...Soldering part, 21.2
2...Terminal pad. Patent applicant: Oki Electric Industry Co., Ltd. Book, 1st inkstone drawing, 1st inkstone drawing, 1st inkstone drawing, 1st inkstone drawing, 2nd drawing of how to remove the pattern during reflow! ! Sun/Month 1: Yoro terminal agent 1 Ritsu Kogogozu Oshiba Higashi Ebite silk, 1 illustration
Claims (3)
Ｃの製造方法において、 前記基板のパッド部に半田ペースを印刷する工程と、 一方を半田付部とし他方を連鎖部で連結したくし状の多
端子を互に向い合せてクランプする工程と、 前記クランプした多端子の半田付部を基板のパッド部に
挿入し固着する工程と、 くし状多端子から連鎖部を取り除く工程とからなる多端
子ハイブリッドＩＣの製造方法。(1) Hybrid I with many terminals arranged on the board
In the manufacturing method of C, a step of printing a solder paste on the pad portion of the board, a step of clamping the comb-shaped multi-terminals, one of which is a soldering portion and the other of which is connected by a chain portion, facing each other; A method for manufacturing a multi-terminal hybrid IC, comprising the steps of inserting and fixing the soldered part of a clamped multi-terminal into a pad part of a board, and removing the chained part from the comb-shaped multi-terminal.
にパッドを有する基板と、先端に半田付部を設けたくし
状の端子を交互に階段状に曲げて千鳥格子を形成した多
端子と、該多端子を互に向い合せて組となし前記基板の
表裏パッドに半田付部を固着したことを特徴とする多端
子ハイブリッドＩＣの端子取付構造。(2) In the terminal mounting structure of a hybrid IC, a board having pads on the front and back surfaces, a multi-terminal in which comb-shaped terminals with soldering parts at the tips are bent alternately into a stair-like pattern to form a houndstooth pattern; 1. A terminal mounting structure for a multi-terminal hybrid IC, characterized in that the terminals are arranged in sets facing each other, and soldered parts are fixed to the front and back pads of the board.
付部を有し、他方を連鎖部によって結合してくし状の多
端子を形成し、該多端子の各端子を階段状に折り曲げる
と共に交互に第１曲げの位置を変えて千鳥格子を形成し
たことを特徴とする多端子ハイブリッドＩＣの端子構造
。(3) In the terminal structure of a hybrid IC, one end has a soldered part and the other end is connected by a chain part to form a comb-shaped multi-terminal, and each terminal of the multi-terminal is bent in a step-like manner and the terminals are alternately connected. A terminal structure of a multi-terminal hybrid IC characterized by forming a houndstooth check by changing the position of one bend.
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63140552A JPH0732041B2 (en) | 1988-06-09 | 1988-06-09 | Multi-terminal hybrid IC terminal mounting structure |
| US07/361,658 US4985747A (en) | 1988-06-09 | 1989-06-02 | Terminal structure and process of fabricating the same |
| EP93202116A EP0577223A1 (en) | 1988-06-09 | 1989-06-05 | Mounting structure for a terminal |
| DE68917798T DE68917798T2 (en) | 1988-06-09 | 1989-06-05 | Connection structure and method for their production. |
| EP89305629A EP0346035B1 (en) | 1988-06-09 | 1989-06-05 | Terminal structure and process of fabricating the same |
| US07/486,611 US4989318A (en) | 1988-06-09 | 1990-02-28 | Process of assembling terminal structure |
| US07/563,320 US5081764A (en) | 1988-06-09 | 1990-07-26 | Terminal structure and process of fabricating the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63140552A JPH0732041B2 (en) | 1988-06-09 | 1988-06-09 | Multi-terminal hybrid IC terminal mounting structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01311576A true JPH01311576A (en) | 1989-12-15 |
| JPH0732041B2 JPH0732041B2 (en) | 1995-04-10 |
Family
ID=15271328
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63140552A Expired - Lifetime JPH0732041B2 (en) | 1988-06-09 | 1988-06-09 | Multi-terminal hybrid IC terminal mounting structure |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0732041B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006313836A (en) * | 2005-05-09 | 2006-11-16 | Nok Corp | Method of manufacturing fpc with connector |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63138673A (en) * | 1986-11-29 | 1988-06-10 | 東芝ライテック株式会社 | Lead frmane for circuit substrate |
-
1988
- 1988-06-09 JP JP63140552A patent/JPH0732041B2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63138673A (en) * | 1986-11-29 | 1988-06-10 | 東芝ライテック株式会社 | Lead frmane for circuit substrate |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006313836A (en) * | 2005-05-09 | 2006-11-16 | Nok Corp | Method of manufacturing fpc with connector |
| JP4600141B2 (en) * | 2005-05-09 | 2010-12-15 | Ｎｏｋ株式会社 | Method for manufacturing FPC with connector |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0732041B2 (en) | 1995-04-10 |
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