JPH01309054A - Formation of fine pattern - Google Patents

Formation of fine pattern

Info

Publication number
JPH01309054A
JPH01309054A JP14104888A JP14104888A JPH01309054A JP H01309054 A JPH01309054 A JP H01309054A JP 14104888 A JP14104888 A JP 14104888A JP 14104888 A JP14104888 A JP 14104888A JP H01309054 A JPH01309054 A JP H01309054A
Authority
JP
Japan
Prior art keywords
pattern
substrate
resist layer
fine
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14104888A
Other languages
Japanese (ja)
Inventor
Masahiro Yoneda
昌弘 米田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP14104888A priority Critical patent/JPH01309054A/en
Publication of JPH01309054A publication Critical patent/JPH01309054A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004Photosensitive materials
    • G03F7/09Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/095Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers having more than one photosensitive layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Architecture (AREA)
  • Structural Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)

Abstract

PURPOSE:To exactly process fine patterns by forming a resist layer having an excellent adhesive property to a substrate onto the substrate. CONSTITUTION:The 1st resist layer 5 having the high adhesive property to the substrate 1 is formed on the substrate and the 2nd resist layer 2 having excellent etching resistance is formed thereon, then the 3rd resist layer 4 having excellent dry etching resistance is formed. The prescribed fine patterns are formed on the 3rd resist layer 4 and the resist layers are etched with said patterns as a mask to form the multilayered fine patterns consisting of the 1st-3rd resist layers. Namely, the 1st resist layer 5 having the excellent adhesive property to the substrate is formed on the substrate and, therefore, the multilayered fine patterns are hardly exfoliated from the substrate at the time of forming the multilayered fine patterns consisting of the 1st-3rd patterns by the subsequent process. The fine surface patterns are exactly formed on the surface part of the substrate.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は″I!導体基板などの基板−1に微細なパタ
ーンを形成する方法にIi’lするしのである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention is directed to a method of forming a fine pattern on a substrate-1 such as a conductor substrate.

〔従来の技術〕[Conventional technology]

第3図 (a)〜(C)は各々従来の微細パターン形成
方法をポリ断面図である。以下、同図を参照しつつその
方法の説明をする。
FIGS. 3A to 3C are cross-sectional views of conventional fine pattern forming methods. The method will be explained below with reference to the same figure.

まず、凹凸部を有する半導体基板1上に平坦性の1帰れ
たフs t−レジスト層(またはポリイミド膜層)2を
j9り塗布し、同図(a)に示すように平坦化する。
First, a flattened resist layer (or polyimide film layer) 2 is coated on a semiconductor substrate 1 having uneven portions, and is planarized as shown in FIG. 3(a).

次に、このフォトレジスト層2上にドライエツチング耐
性の優れた無機嗅であるシリコン酸化膜3をスピンコー
ドし形成する。さらに、このシリ−1ン酸化膜3上にパ
ターン形成能の優れたフォト・レジスト層4を簿く形成
することひ同図(a)に承りよう1.:3層の多層レジ
スト100が形成される。
Next, on this photoresist layer 2, a silicon oxide film 3, which is an inorganic material having excellent dry etching resistance, is formed by spin-coding. Furthermore, a photoresist layer 4 having excellent pattern formation ability is formed on this silicon oxide film 3 as shown in FIG. 1(a). : A three-layer multilayer resist 100 is formed.

そしC1フォトレジスト層4を写真製版によりIF確な
パターン形成し、パターン形成されたフォトレジスト層
4をマスクとして、シリコン酸化膜3をエツチングする
ことぐ、同図(blに示ゾように)J+〜レジスト層4
のパターン40を転写したパターン30を形成する、。
Then, a precise IF pattern is formed on the C1 photoresist layer 4 by photolithography, and the silicon oxide film 3 is etched using the patterned photoresist layer 4 as a mask. ~Resist layer 4
A pattern 30 is formed by transferring the pattern 40 of .

そしC1これらのパターン40.30をマスクとしてフ
ォトレジスト層2をドライ」−ツチングする。この時、
シリコン酸化膜3はドライエツチングl1iJ竹が(う
れていることから、17い)Aトレジストb?i 2を
容易にエツチング処理でさる1、なお、パターン40は
この時、同時に−1−ツチングされ、同図(clに示す
ように微細な多層レジストパターン2 ()0が形成で
さる。この多層レジストパターン200をマスクとして
凹凸部を有する半導体基板1トに正確な微細な表面パタ
ーン(図示1!f、)を形成できる。
Then, using these patterns 40 and 30 as a mask, the photoresist layer 2 is dry-etched. At this time,
The silicon oxide film 3 is dry-etched (17 thick because it is wet) A resist b? The pattern 40 is etched by -1 at the same time, and a fine multilayer resist pattern 2 ()0 is formed as shown in the same figure (cl). Using the resist pattern 200 as a mask, an accurate fine surface pattern (1!f in the figure) can be formed on a semiconductor substrate 1 having uneven portions.

(発明が解決しようとする課題) 従来の微細パターン形成方法は以上のように行われてい
た。
(Problems to be Solved by the Invention) The conventional fine pattern forming method was performed as described above.

しかしながら、フA[・レジスト層2は半導体基板1と
の密着性が悪いため、このフォトレジスト層2のパター
ン20は半導体基板1から比較的容易に剥離する。この
lこめ、多層微細パターン200形成時や、半導体基板
1の表面パターン形成時にこのパターン20が゛ト導体
基板1から剥離する場合がある。すると、パターン不良
等が生じ、半導体基板1に微細な表面パターンを正確に
形成でさないという問題点があった。
However, since the photoresist layer 2 has poor adhesion to the semiconductor substrate 1, the pattern 20 of the photoresist layer 2 is relatively easily peeled off from the semiconductor substrate 1. Due to this, the pattern 20 may peel off from the conductive substrate 1 when forming the multilayer fine pattern 200 or when forming the surface pattern of the semiconductor substrate 1. This poses a problem in that pattern defects and the like occur, and a fine surface pattern cannot be accurately formed on the semiconductor substrate 1.

この発明は」−記のような問題点を解決するためになさ
れたもので、基板の表面部に微細な表面パターンを正確
に形成できる微細パターン形成方法を1足供することを
[1的とする。
This invention was made in order to solve the problems mentioned above, and its object is to provide a method for forming a fine pattern that can accurately form a fine surface pattern on the surface of a substrate. .

(課題を解決づ゛るための手段) この発明にかかる微細パターン形成方法は、基板の表面
部に微細な表面パターンを形成づ−る方法で・あって、
曲配り根土に対する密着性に畠″む第1のレジスト層を
前記基板上に形成する第1の二[程と、前記第1のレジ
スト層上に第1の」ツヂングに33ける1ツプング耐性
の優れた第2のレジスト層を形成する第2の1程と、前
記第2のレジスト層上に第2のエツチングにJ3けるド
ライエツチング耐性の優れた第3のレジスト層を形成す
る第3のゴー程と、前記第3のレジスト層に所定の微細
パターンを形成する第4の[程と、前記第4の工程でパ
ターン形成された第33のレジスト層をマスクとしC前
記第2のエツチングを行い前記第1〜第3のレジスト層
による微細多層パターンを形成1Jる第5の工程と、前
記微細多層パターンをマスクとして前;ば1第1の1″
ツチングを行い、O;i記草根の表面部に所定の微細な
パターンを形成σる′56の工程とを含んで・いる。
(Means for Solving the Problems) A fine pattern forming method according to the present invention is a method for forming a fine surface pattern on a surface portion of a substrate, and comprises:
forming a first resist layer on the substrate that has good adhesion to the curved soil; a second resist layer with excellent dry etching resistance in the second etching J3 on the second resist layer; and a third resist layer with excellent dry etching resistance in the second etching process. a fourth step of forming a predetermined fine pattern on the third resist layer; and a second etching step using the 33rd resist layer patterned in the fourth step as a mask. a fifth step of forming a fine multilayer pattern using the first to third resist layers; and a fifth step of forming a fine multilayer pattern using the first to third resist layers;
The method includes the steps of tucking and forming a predetermined fine pattern on the surface of the grass root.

〔作用〕[Effect]

この発明に、1Hノる第1の工程で、基板上にこの基板
とのV15着性に富んだ第1のレジメh %+”4を形
成したため、第5の]−程ににつで第1〜第3のレジス
ト層上 のyi細多層パターンが基板から剥離しにくい。
In this invention, in the first step of 1H, a first regime with high V15 adhesion to the substrate was formed on the substrate. The yi thin multilayer patterns on the first to third resist layers are difficult to peel off from the substrate.

〔実施例〕〔Example〕

第1図 (a)〜(C)は各々この発明の一実施例て・
ある微細パターン形成方法をポリ断面図である。
Figure 1 (a) to (C) each represent an embodiment of the present invention.
FIG. 3 is a polygon cross-sectional view showing a certain fine pattern forming method.

以°ト、同図を参照しつつ、その方法を説明する。Hereinafter, the method will be explained with reference to the same figure.

まず、凹凸部を有する半導体基板1十に密着性に富んだ
環化ゴム系樹脂からなる、ネガ型感光特例を右するフォ
トレジストに?45を薄く形成する。
First, a photoresist made of a cyclized rubber-based resin that has excellent adhesion to a semiconductor substrate 10 having uneven parts and which is a negative-tone photosensitive material. 45 is formed thinly.

そして、このフォトレジスト月桑層5上にノボラック系
樹脂からなるポジ型感光特性を右するフォトレジスト膜
2を淳く形成η゛る。このフA[・レジスト層2は平l
l性に優れ、半導体基板1表面部に微細パターンを形成
する際のエツチング耐性が良い。このため、)At−レ
ジスト層2の形成侵には、同図(a)に示すように表向
部は平ijl化する。
Then, on this photoresist layer 5, a photoresist film 2 made of a novolac resin and having positive photosensitive characteristics is formed. This film A[・Resist layer 2 is flat
It has excellent etching properties and good etching resistance when forming fine patterns on the surface of the semiconductor substrate 1. Therefore, during the formation of the At-resist layer 2, the surface portion becomes flat as shown in FIG. 2(a).

次に、このフォトレジストIVt 2 、L:にドライ
エツチング耐性の優れた無機膜であるシリコン酸化膜3
をスピン:]−1−u形成する。さらに、このシリコン
酸化膜3士にパターン形成能の優れたフォトレジスト膜
V4/Iを形成することで同図(a)に示すように4層
の多層レジスL−300が形成される。
Next, a silicon oxide film 3, which is an inorganic film with excellent dry etching resistance, is applied to this photoresist IVt2, L:.
Spin : ]-1-u to form. Furthermore, by forming a photoresist film V4/I with excellent pattern formation ability on these three silicon oxide films, a four-layer multilayer resist L-300 is formed as shown in FIG.

そして、フォトレジスト層4を写真製版により正確なパ
ターンを形成し、パターン形成されたフォトレジスト層
4をマスクとして、シリコン酸化膜層3を1ツチングす
ることで、同図(b)に示すようにフォトレジスト層4
のパターン/10を転写したパターン30を形成する。
Then, a precise pattern is formed on the photoresist layer 4 by photolithography, and the silicon oxide film layer 3 is etched using the patterned photoresist layer 4 as a mask, as shown in FIG. Photoresist layer 4
A pattern 30 is formed by transferring the pattern /10.

そして、これらのパターン40.30をマスクとしてフ
ォトレジスト層2.5をドライエツチングづ°る。この
時、シリコン酸化膜3から得られ(いるパターン30は
ドライ」ツヂング耐性が優れた無機膜であることから、
厚いフォトレジスト層2及びフォトレジスト層5を容易
にエツチング耐性できる。なお、パターン40はこの時
、同時エツチングされ、同図(C)に示すように微細な
多層レジストパターン400が形成できる。
Then, using these patterns 40.30 as a mask, the photoresist layer 2.5 is dry etched. At this time, since the pattern 30 obtained from the silicon oxide film 3 is an inorganic film with excellent resistance to dry
Thick photoresist layers 2 and 5 can be easily etched resistant. Note that the pattern 40 is etched at the same time, and a fine multilayer resist pattern 400 can be formed as shown in FIG.

この多層レジストパターン400をマスクとして凹凸表
面を有する半導体基板1上に対するエツチングを行う。
Using this multilayer resist pattern 400 as a mask, etching is performed on the semiconductor substrate 1 having an uneven surface.

フォトレジスト1F42から得られているパターン20
がエツチング耐性の高いノボラック系樹脂となっている
ことにより、半導体g11の表面には、特に正確に微細
な表面パターン(図示ゼず。)を形成することかできる
Pattern 20 obtained from photoresist 1F42
Since the material is a novolac resin with high etching resistance, a particularly fine surface pattern (not shown) can be formed on the surface of the semiconductor g11 with particular precision.

以1−1のプu 12スのなかで得られた多層レジスト
パターン400は、環化ゴム系樹脂からなるパターン5
)0が半導体基板1に対する密着性に富んでいるため、
半導体基板1とパターン50が半導体基板1から剥離覆
ることなく、良好な多層レジストパターン400が形成
できるとともに、半導体基板1の表面部に形成される微
細表面パターンも正確な微細パターンとなる。特に半導
体基板1とパターン50の密着性が重要視されるような
エツチング方法を用いるときに、この方法は極めて有効
である。
The multilayer resist pattern 400 obtained in step 1-1 below has a pattern 5 made of cyclized rubber resin.
)0 has high adhesion to the semiconductor substrate 1, so
A good multilayer resist pattern 400 can be formed without the semiconductor substrate 1 and the pattern 50 peeling off from the semiconductor substrate 1, and the fine surface pattern formed on the surface of the semiconductor substrate 1 also becomes an accurate fine pattern. This method is particularly effective when using an etching method in which the adhesion between the semiconductor substrate 1 and the pattern 50 is important.

なお、この実施例では、フォトレジスi−膜2としてノ
ボラック系樹脂を示したが、ポリイミド樹脂でも同様の
効果を秦する。
In this embodiment, a novolak resin is used as the photoresist i-film 2, but a polyimide resin can also have the same effect.

また、フォトレジスト層5として環化ゴム系樹脂を用い
たときにおいては、環化ゴム系樹脂は半導体基板1のエ
ツチングにおけるエツチング耐性が比較的低いため、第
2図で示すようにこのフォトレジスト層5の膜厚を極め
て薄くした微細多層レジストパターン500.を形成し
、その111があまり反映されないようにすることが望
ましい。
Furthermore, when a cyclized rubber-based resin is used as the photoresist layer 5, since the cyclized rubber-based resin has relatively low etching resistance during etching of the semiconductor substrate 1, the photoresist layer A fine multilayer resist pattern 500.5 with an extremely thin film thickness. It is desirable to form 111 so that its 111 is not reflected too much.

また、シリコン酸化膜3.フォトレジスト層4の代りに
パターン形成能とドライエツチング耐性の両方を兼ね備
えたレジスト層(・例えば有機シリコンレジスト)を用
い、このレジスト層に微細パターンを形成し、これをマ
スクとしてドライエツチングにより微細多層レジストパ
ターンを半導体基板1.トに形成1ノでbよい、。
Moreover, silicon oxide film 3. Instead of the photoresist layer 4, a resist layer (for example, an organic silicon resist) that has both pattern forming ability and dry etching resistance is used, a fine pattern is formed on this resist layer, and using this as a mask, a fine multilayer is formed by dry etching. Apply the resist pattern to the semiconductor substrate 1. It is good to form 1 no.

また、この発明は半導体gt板以外について適用しても
よく、表面に凹凸部を持たない基板であっても、基板と
多層レジストとの密着性が問題となる場合には有効ぐあ
る。
Further, the present invention may be applied to other than semiconductor GT boards, and is effective even when the substrate does not have an uneven surface, when the adhesion between the substrate and the multilayer resist is a problem.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、この発明によれば、第1の工程に
おいて、基板上に基板との重管性に富んだ第1のレジス
ト層を形成したため、正確に微細パターン加工が行える
効果がある。
As explained above, according to the present invention, in the first step, the first resist layer that has good overlap with the substrate is formed on the substrate, so that there is an effect that fine pattern processing can be performed accurately.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)〜(C)は各々この発明の一実施例である
微細パターン形成方法を示す断面図、第2図はこの発明
の他の実施例である微細パターン形成方法を示す断面図
、第3図(a)〜(C)は各々従来の微細パターン形成
方法を示す断面図である。 図において、1は半導体基板、2はフォトレジスト層、
3はシリコン酸化膜、5は環化ゴム系樹脂からなるフォ
トレジスト層、300は多層レジスト、400は多層レ
ジストパターンである。 なお、各図中同一符号は同一または相当部分を示す。
FIGS. 1(a) to (C) are cross-sectional views showing a fine pattern forming method according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view showing a fine pattern forming method according to another embodiment of the present invention. , and FIGS. 3(a) to 3(C) are cross-sectional views each showing a conventional fine pattern forming method. In the figure, 1 is a semiconductor substrate, 2 is a photoresist layer,
3 is a silicon oxide film, 5 is a photoresist layer made of cyclized rubber resin, 300 is a multilayer resist, and 400 is a multilayer resist pattern. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] (1)基板の表面部に微細な表面パターンを形成する方
法であって、 前記基板上に対する密着性に富む第1のレジスト層を前
記基板Lに形成する第1の工程と、前記第1のレジスト
層上に第1のエッチングにおけるエッチング耐性の優れ
た第2のレジスト層を形成する第2の工程と、 前記第2のレジスト層上に第2のエッチングにおけるエ
ッチング耐性の優れた第3のレジスト層を形成する第3
の工程と、 前記第3のレジスト層に所定の微細パターンを形成する
第4の工程と、 前記第4の工程でパターン形成された第3のレジスト層
をマスクとして前記第2のエッチングを行い前記第1〜
第3のレジスト層による微細多層パターンを形成する第
5の工程と、 前記微細多層パターンをマスクとして前記第1のエッチ
ングを行い、前記基板の表面部に所定の微細なパターン
を形成する第6の工程とを含む微細パターンの形成方法
(1) A method for forming a fine surface pattern on the surface of a substrate, which comprises: a first step of forming a first resist layer having high adhesion to the substrate on the substrate L; a second step of forming a second resist layer with excellent etching resistance in the first etching on the resist layer; and forming a third resist layer with excellent etching resistance in the second etching on the second resist layer. Third forming layer
a fourth step of forming a predetermined fine pattern on the third resist layer; and performing the second etching using the third resist layer patterned in the fourth step as a mask. 1st~
a fifth step of forming a fine multilayer pattern using a third resist layer; and a sixth step of performing the first etching using the fine multilayer pattern as a mask to form a predetermined fine pattern on the surface of the substrate. A method for forming a fine pattern, including a process.
JP14104888A 1988-06-07 1988-06-07 Formation of fine pattern Pending JPH01309054A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14104888A JPH01309054A (en) 1988-06-07 1988-06-07 Formation of fine pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14104888A JPH01309054A (en) 1988-06-07 1988-06-07 Formation of fine pattern

Publications (1)

Publication Number Publication Date
JPH01309054A true JPH01309054A (en) 1989-12-13

Family

ID=15283039

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14104888A Pending JPH01309054A (en) 1988-06-07 1988-06-07 Formation of fine pattern

Country Status (1)

Country Link
JP (1) JPH01309054A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001287199A (en) * 2000-02-03 2001-10-16 Sumitomo Metal Ind Ltd Microstructure and its manufacturing method
US7235490B2 (en) 2003-02-28 2007-06-26 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55138835A (en) * 1979-04-16 1980-10-30 Fujitsu Ltd Method of forming photoresist pattern
JPS5621328A (en) * 1979-07-31 1981-02-27 Fujitsu Ltd Method of making pattern
JPS58153242A (en) * 1982-03-09 1983-09-12 Toshiba Corp Manufacture of original disk for phonographic or recording disk
JPS608842A (en) * 1983-06-29 1985-01-17 Toshiba Corp Formation of pattern

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55138835A (en) * 1979-04-16 1980-10-30 Fujitsu Ltd Method of forming photoresist pattern
JPS5621328A (en) * 1979-07-31 1981-02-27 Fujitsu Ltd Method of making pattern
JPS58153242A (en) * 1982-03-09 1983-09-12 Toshiba Corp Manufacture of original disk for phonographic or recording disk
JPS608842A (en) * 1983-06-29 1985-01-17 Toshiba Corp Formation of pattern

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001287199A (en) * 2000-02-03 2001-10-16 Sumitomo Metal Ind Ltd Microstructure and its manufacturing method
US7235490B2 (en) 2003-02-28 2007-06-26 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device

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