JPH01303732A - Manufacture of carrier tape for semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To enable a solder bump to be formed easily at low cost by a method wherein the solder bump is formed through the intermediary of a through hole formed in a flexible region. CONSTITUTION:As for the bump manufacturing process on the part connected to an electrode of an electric part element of a conductor layer 33, a through hole is formed in a flexible resin 31 to form a bump electrode 40 in the through hole. That is, a solder bump can be easily formed in an inner lead 37 through the intermediary of the through hole in the flexible resin 31 simultaneously enabling the bonding process to be performed meeting the low temperature, low pressure requirements. Through these procedures, the manufacturing processes can be simplified at low cost of the material itself.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a flexible printed circuit board for semiconductor integrated circuits having solder protrusion electrodes, particularly a carrier tape.

[Conventional technology]

In a conventional carrier tape-based IC mounting system, the IC and external electrodes are electrically connected through bumps provided on the electrodes of an IC or LSI wafer.

The process of forming bumps on electrodes on an IC chip will be explained with reference to FIG.

The figure shows an AI pad 11 on an IC or LSI wafer.
3 shows a partial cross section of a wiring pattern formed by the surface protection film 12 and the surface protection film 12.

First, sputter etching [step (a)] is performed to remove the native Af oxide film on the surface of the A2 pad 11, and then Ti
- Continuously evaporate W alloy 13 and Au 14 [step (b)
)), the wafer that has come out of the sputtering chamber is then coated with a photoresist 15 to form a window 16 for forming Nomanpu plating by photolithography [step (
C)].

Then, Au bumps 17 are formed by electroplating [
Step (d)), then the photoresist 15 is removed, and the deposited layer other than the bumps is removed by chemical etching [Step (d)).
e)]. Currently, the mainstream method is to perform bonding using the thus-produced bumped IC and a carrier tape on which only a circuit pattern is formed.
It is necessary to provide bonding bumps on the wafer electrode.

On the other hand, as a typical example of another IC mounting method using a carrier tape method, there is a method in which a carrier tape with protruding electrodes formed by double-sided etching or the like is used to bond to electrodes on an IC chip. FIG. 5 shows an example of a method for manufacturing a carrier tape with protruding electrodes.

First, a metal foil 22 is laminated with an adhesive 25 on a flexible resin tape 23 with device holes 24 punched out at predetermined locations, and then a photoresist pattern 21 is formed on the surface of the metal foil 22 and a genuine agent 26 is filled ( a), after etching the metal foil (b), the resist 21
Then, by peeling off the genuine agent 26, a bump-free carrier having inner leads 27 is formed (C).

Next, a genuine adhesive film 28 is pasted on the pattern surface (d), and a back bump pattern 29 is formed using photoresist using the same method described above.e), and then half-etching is performed on the back of the finger (f). , a bumped carrier tape is formed (g).

[Problem that the invention seeks to solve]

However, in the method shown in FIG. 4 above, that is, the inner lead part of the carrier tape is plated with gold or tin and bonded to the Au bumps on the IC, the bumps are formed on the wafer. Since this process is carried out in a state where the chips are cut into IC chips, bumps are also formed on defective elements, resulting in waste of expensive bump metal.

Furthermore, in the method shown in FIG. 5, which is a method in which bumps (Au plating) are formed by half-etching the back surface of the inner leads of metal foil and are bonded to aluminum (AI) electrodes on the IC chip, Since the inner leads protrude in a cantilevered manner into the device holes of the carrier tape, relatively hard copper foil must be used. Therefore, when bonding the inner leads using thermocompression bonding, excessive pressure is placed on the IC chip. This poses problems, such as the high risk of damage to the electrodes on the IC chip and chip cracks due to the impact applied thereto.

[Means for solving problems]

For this purpose, the present invention has a conductor layer made of metal foil bonded on an insulating layer made of flexible resin,
In a carrier tape that electrically connects an electronic component element and an external board, a first step of forming a through hole in a flexible resin is used as a method for manufacturing a protrusion on a portion of the conductor layer that is connected to an electrode of an electrical component element. and a second step of forming a protruding electrode in the through hole using an ultrasonic soldering method. Moreover, it is possible to form a carrier tape with bumps at low cost, and it is possible to obtain a high yield of inner lead bonding and high reliability.

(Function) In the present invention, solder bumps can be easily formed on the inner leads through through holes on the flexible resin, and at the same time, bonding can be performed at lower temperatures and pressures than when using Au plating bumps. This improves the yield and reliability of bonding by extremely reducing the possibility of damage to the IC and electrodes, and at the same time enables low-temperature processing for direct mounting on display panels and the like.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a schematic flowchart for manufacturing a carrier tape with solder bumps according to the present invention.

First, holes are punched in the flexible resin tape 31, and through holes 32 for bump plating are formed (b)
. At this time, the flexible resin tape 31 is provided with at least one type of hole among sprocket holes for tape feeding and window holes for devices. Next, the metal tape (Cu) 33 and the flexible resin tape 32 are laminated via an adhesive 35 at a predetermined temperature and pressure.
Form a stem sample (C). Thereafter, a circuit pattern is formed using a photoresist 36 (d), and through the steps of etching (e) and peeling (f), a bumpless carrier tape 38 on which inner leads 37 are formed is obtained.

Solder bumps 40 are formed on the thus-formed carrier tape without bumps as described below to obtain a carrier tape 39 for semiconductor integrated circuits with bumps.

FIG. 2 schematically shows a solder bump forming apparatus. Base film 54 on which lead pattern 42 is formed
In this device, the base film 54 on which bumps are to be formed is set directly above the solder jet nozzle 46 and heated to a predetermined temperature (200 to 300') by the circulation pump 51 and heater 53. The solder maintained in step C) is sprayed from the jet nozzle 46 through the spray pump 52.

At this time, the solder jet operation and the cylinder operation that moves the plating jig 45 up and down are linked, and the base film 54 and the upper surface of the plating jig 45 are connected to the base film 54 and the top surface of the plating jig 45 using the sprocket hole of the base film 54 as a guide during the jet flow. maintain close contact with The overflowing solder is dropped onto a solder pool 50 kept at a constant temperature.

Also, during solder jetting, 20 to 40 kHz, 1°O to
By applying 200W ultrasonic waves using the ultrasonic vibration horn 44 attached to the tip of the nozzle, it is possible to promote the diffusion of solder into the through-hole, and also to remove the oxide film formed on the Cu surface and to prevent the solder from bonding with the solder. It can provide the effect of increasing wettability. In this case, the closer the tip of the ultrasonic vibrating horn 44 is to the bump forming surface, the better, and the effect can be enhanced in an ultrasonic output range of 100 W or more.

The predetermined bump formation conditions vary depending on the thickness of the base film, the diameter and number of through holes, etc., but by considering solder temperature, jet flow time, etc. as bump formation factors, the solder height can be set to a height that allows inner lead bonding. You can get a bump.

FIG. 3 shows the other side of the solder bump forming apparatus. There is a plating jig 45 having a film blowing port 47, a packing 55, and a sprocket guide 56.
By raising the base film 8, the base film is sandwiched between the upper film fixtures 61. Vacuum nozzle 57
By suctioning air through the film, the base film 54 and the upper surface of the plating jig 45 are kept in close contact with each other at the film blowing hole 47. In this example, a multi-tie rizzle 59 having a solder jet port 60 aligned with the position of the through hole is used to generate the jet.

In addition, in the above example, ordinary solder alloy (Sn6O%, P
40% weight ratio), but Sn-rich or Pb-rich solder may also be used.

〔Effect of the invention〕

As described above in detail, the method for manufacturing a carrier tape for semiconductor integrated circuits with bumps according to the present invention is superior to the conventional method of forming bumps on electrodes on a wafer and the method of forming carrier tapes with bumps by half etching. hand,
Obviously, there is an advantage that the manufacturing process is simplified, and at the same time, the problem of material cost is solved because the material itself is cheaper than Au. Furthermore, the thus obtained carrier tape for soldered semiconductor integrated circuits can be provided as a product suitable for low-temperature processing such as direct mounting on a display panel or the like.

[Brief explanation of the drawing]

FIG. 1 is a diagram for explaining the manufacturing process of a carrier tape with solder bumps according to one embodiment of the present invention, and FIG.
The figure is a schematic configuration diagram of an ultrasonic soldering device according to an embodiment of the present invention, FIG. 3 is a perspective view showing the other side of the solder jet nozzle used in the ultrasonic soldering device of FIG. 2, and FIG. 4 5 is a diagram for explaining the conventional process of forming bumps on wafers and IC chip electrodes, and FIG. 5 is a diagram for explaining the manufacturing process of a carrier tape with protruding electrodes by conventional half etching. 31... Flexible resin tape (insulating layer), 32...
...Through hole, 33...Metal foil (conductor layer), 37
...Inner lead, 40...Bump (protruding electrode)
, 44... Ultrasonic vibration horn, 45... Fixture for plating, 46... Jet nozzle. In order of appearance Hiroki Shirai (4 others), patent attorney representing Dai Nippon Printing Co., Ltd. To Figure 2, 1g.-. 1+-/Q Mise Figure 4

Claims (2)

[Claims] (1) In a carrier tape that has a conductive layer made of metal foil adhered on an insulating layer made of flexible resin and makes an electrical connection between an electronic component element and an external board, the electrode of the electrical component element of the conductive layer The method for manufacturing a protrusion on a part to be connected to the flexible resin includes a first step of forming a through hole in a flexible resin, and a second step of forming a protrusion electrode in the through hole using an ultrasonic soldering method. A method for manufacturing a carrier tape for semiconductor integrated circuits, characterized by: (2) A sprocket hole in the flexible resin,
2. The method of manufacturing a carrier tape for semiconductor integrated circuits according to claim 1, wherein at least one type of window hole is provided.