JPH01302774A - Semiconductor tension sensor - Google Patents

Abstract

PURPOSE:To thicken a diaphragm part, and increase breakdown voltage by forming a polycrystalline semiconductor layer on an etching stopper layer, and turning a polycrystalline layer on a substrate into single crystal. CONSTITUTION:On a semiconductor substrate 11, an etching stopper layer 12 composed of an insulating layer is formed in a diaphragm region. A polycrystalline semiconductor layer 13 is formed on the stopper layer 12. A single crystal semiconductor layer 14 is formed together with the stopper layer 12 by re-crystallizing the semiconductor layer 13 formed on the stopper layer 12. An intermediate layer 15 is formed on the semiconductor layer 13. A single crystal semiconductor layer 16 is formed on the insulating layer 15. A piezo resistor 19 is formed by diffusion or etching. The substrate 11 is etched from the lower part to the central part, and a recesses part 20 having a depth reaching the stopper layer 12 is formed. The upper part is formed in the diaphragm part 21. Thereby, the diaphragm part 21 is thickened, the breakdown voltage is increased.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor pressure sensor in which a piezoresistor is formed on the upper part of a semiconductor substrate, and particularly relates to an improvement in which the diaphragm portion is thickened.

[Conventional technology]

FIG. 4 is a sectional view of a conventional semiconductor pressure sensor disclosed in, for example, Japanese Patent Application Laid-Open No. 82-283679. In the figure, reference numeral 1 denotes a semiconductor substrate made of single crystal silicon, on the surface of which an etching stopper layer (hereinafter referred to as "stopper layer") 2 made of an insulating layer (Si02) is formed in the diaphragm region by photo-etching. 3 is a recrystallized single crystal silicon layer formed by an epitaxial method on the substrate 1 and the stopper layer 2; 4 is an insulating layer (Si02) formed on this silicon layer 3, with a diffusion window 4a; It is formed. 5 is an insulating layer (Si02) formed on the lower surface of the substrate 1; 6 is a piezoresistor formed in the silicon layer 3 by implanting boron; 7 is a hole formed in the insulating layer 5 by etching. This is a recessed portion having a depth reaching the stopper layer 2, and a thin diaphragm portion 8 is formed in the upper portion.

In this way, the diaphragm portion 8 is made into a thin portion with a highly accurate thickness.

[Problem to be solved by the invention]

In the conventional semiconductor pressure sensor as described above, the semiconductor layer 3 on the stopper layer 2 is made of polycrystalline silicon and cannot be made very thick; for example, the thickness is 05 μm.
The problem was that it was thin, about L, and could not have a high breakdown voltage.

The present invention has been made to solve these problems, and an object thereof is to obtain a semiconductor pressure sensor in which a diaphragm portion is formed to a required thickness with high precision and has a high breakdown voltage.

[Means to solve the problem]

In the semiconductor pressure sensor according to the present invention, an etching stopper layer made of an insulating layer is formed on a semiconductor substrate in a diaphragm region, a first polycrystalline semiconductor layer is formed on the stopper layer and the substrate, and a first polycrystalline semiconductor layer is formed on the substrate. A crystalline semiconductor H is made into a single crystal, an intermediate insulating layer is formed on a polycrystalline semiconductor layer on a stopper layer, a single crystal semiconductor layer is formed on this intermediate insulating layer, and a piezoelectric layer is formed in this single crystal semiconductor layer by diffusion or etching. A resistor is formed, a concave portion reaching the stopper layer is formed in the center by etching the substrate from the bottom surface, and a diaphragm portion of a required thickness is formed in the upper portion.

[Effect]

In this invention, the polycrystalline semiconductor layer is formed on the etching stopper layer, and the required thickness can be adjusted with high accuracy, and the polycrystalline semiconductor layer on the substrate can be made into a single crystal even if it is thick. In this way, the diaphragm portion is thickened to the required thickness, and the breakdown pressure is increased.

〔Example〕

FIG. 1 is a sectional view of an embodiment of a semiconductor pressure sensor according to the present invention. In the figure, 11 is a semiconductor substrate made of single crystal silicon, and 12 is an etching stopper layer (hereinafter referred to as "stopper layer") made of an insulating layer (Si02, etc.) formed on this substrate 11 in the diaphragm region.
, 13 is a polycrystalline silicon layer formed on the stopper layer 12, and 14 is a polycrystalline silicon layer formed simultaneously on the substrate 11 and the stopper layer 12, of which the portion on the substrate 11 has been recrystallized. It is a single crystal silicon layer. Stopper layer 12
The polycrystalline silicon layer 13 on top can be made thicker because it does not become a single crystal, and the polycrystalline silicon on the substrate 11 can be recrystallized even if it is thick. This allows the diaphragm portion to be adjusted to be as thick as required.

15 is an intermediate insulating layer (Si02, etc.) formed on the polycrystalline silicon layer 13 in the diaphragm region, 16 is a single crystal silicon layer formed on this intermediate insulating layer and on the single crystal silicon layer 14, and 17 is this A diffusion window 17m is formed in an upper insulating layer (S i 02, etc.) formed on the monocrystalline silicon layer 6. 8 is a lower insulating layer (S i 02, etc.) formed on the lower surface of the substrate 11, and an opening 18m corresponding to the diaphragm region is formed in the center.

19 is a piezoresistor formed by diffusion into the surface of the single crystal silicon layer 16; 20 is a recess formed in the substrate 11 by etching from below to a depth reaching the stopper layer 12; The diaphragm portion 21 is formed as a diaphragm portion 21. Note that electrode wiring connecting each piezoresistor 18 and a protective film covering the upper part are provided, but illustration thereof is omitted.

Next, a method for manufacturing the above pressure sensor will be explained with reference to FIG. 2. First, as shown in FIG. 2(a), an insulating layer (for example, 5i02
) is formed on the entire surface, and then the diaphragm region is left and the rest is removed to form the stopper layer 12 shown by the solid line.

Subsequently, as shown in FIG. 2(b), a polycrystalline silicon layer 13a is formed to a desired thickness on the stopper layer 12 and the substrate 11 by an epitaxial method or the like.

As shown in FIG. 2(e), the polycrystalline silicon layer on the substrate 11 is removed by a single crystalline silicon layer 14 by laser annealing or the like.
Make it. The polycrystalline silicon layer 13 on the stopper layer 12 remains polycrystalline.

As shown in FIG. 2(d), an insulating layer (for example, 5i02) is formed on the entire surface of the single crystal silicon layer 13 and the polycrystalline silicon layer 14, and then the diaphragm region is left and the rest is removed.
An intermediate insulating layer 15 indicated by a solid line is formed.

As shown in FIG. 2(e), a polycrystalline silicon layer 17 is formed on the intermediate insulating layer 15 and the single-crystal silicon layer 14 by an epitaxial method or the like, and this is made into a single-crystal silicon layer 16 by laser annealing or the like. , 2, and then in Figure 2 (f
), a soil insulation layer (for example, 5i0
2) After forming 17 and a lower insulating layer (for example, 5i02 Ng) on the entire surface, a diffusion window 17a and an opening 18a are formed by etching.

As shown in FIG. 2 (gl), a piezoresistor 19 is formed within the surface of the single crystal silicon layer 16 by diffusion or the like.

Furthermore, as shown in FIG.
form 0.

Next, each piezoresistor] 8 is connected and a lead-out electrode wiring is formed externally by a known method, but illustration thereof is omitted.

In this way, the relatively thick polycrystalline silicon layer 13, the intermediate insulating layer 15, and the single crystal silicon layer 16 are stacked on the stopper layer 12 to have an accurate thickness, and the substrate 11 below is layered. By removing and forming the concave portion 20, the upper portion becomes a diaphragm portion 21 having a required thickness.

FIG. 3 is a sectional view showing another embodiment of the semiconductor pressure sensor according to the present invention. A stopper layer 12 on the semiconductor substrate 11,
The structure in which a polycrystalline silicon layer 13 and a single crystalline silicon layer 14 are formed, and an intermediate insulating jaI5 is formed on the polycrystalline silicon layer 13 is the same as that shown in FIG. 1 above. However, the following methods are different. .

22 is a piezoresistor formed on the intermediate insulating layer 15 and made of single crystal silicon. The piezoresistor 22 is formed as follows. A polycrystalline silicon layer is formed on the intermediate insulating layer isJ: and the single-crystal silicon layer 14 by an epitaxial method or the like, and is made into a single crystal by a laser annealing method or the like. By etching, the piezoresistor 22 is left and the rest is removed.

〔Effect of the invention〕

As described above, according to the present invention, an etching stopper layer made of an insulating layer is formed on a semiconductor substrate, a polycrystalline semiconductor layer is formed on top of this and on the substrate, and among this semiconductor layer,
A single crystal silicon layer is formed on the substrate, an intermediate insulating layer is formed on the polycrystalline semiconductor layer on the stopper layer, a single crystal semiconductor layer is formed on this intermediate insulating layer, and diffusion or The piezoresistor is formed by etching, and the substrate is etched from below to form a recess that reaches the stopper layer, and the upper part is made into a diaphragm, so the diaphragm can be thickened with high precision and the rupture pressure can be increased. It is possible to expand the measurement pressure range by 1°.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of one embodiment of the semiconductor pressure sensor according to the present invention, FIG. 2 is an explanatory diagram showing the manufacturing method of the pressure sensor of FIG. 1 in order of steps, and FIG. FIG. 4 is a cross-sectional view of a conventional semiconductor pressure sensor. In the figure, 11 is a semiconductor substrate, 12 is an etching stopper layer, 13 is a polycrystalline semiconductor layer (polycrystalline silicon layer), 14 is a single crystal semiconductor N (single crystal silicon layer), 15 is an intermediate insulating layer, and 161 is a single crystal semiconductor layer (single crystal silicon layer). Crystal semiconductor layer (upper crystal layer),
19 is a piezoresistor, 20 is a recessed portion, 21 is a diaphragm portion, and 22 is a piezoresistor. In the drawings, the same reference numeral 2 indicates the same or equivalent portion. Figure 1

Claims (1)

[Claims] A semiconductor substrate on which an etching stopper layer made of an insulating layer is formed in a diaphragm region, a polycrystalline semiconductor layer formed on the stopper layer, and a polycrystalline conductor layer formed on the stopper layer as well as on the stopper layer. A single crystal semiconductor layer formed by recrystallization, an intermediate insulating layer formed on the polycrystalline semiconductor layer on the stopper layer, and a single crystal semiconductor layer formed on the intermediate insulating layer by diffusion or etching. What is claimed is: 1. A semiconductor pressure sensor comprising: a piezoresistor; the center portion of the substrate is etched from below to form a recessed portion deep enough to reach the etching stopper layer; the upper portion is a diaphragm portion.