JPH01298950A - Device for improvement of power factor - Google Patents

Abstract

PURPOSE:To eliminate an increase in loss and deterioration by so controlling that a switching element which outputs an arc signal at the last of opening time and a switching element which outputs an arc signal at the initial of closing time always become different elements. CONSTITUTION:A controller of a power factor improving device is composed of a synchronous power source 12, a waveform shaper 13, 90 deg. and 270 deg. detectors 14-15, a power factor decrease detector 17, etc. In this case, two flip-flops(FF) 22, 23 having different input clock signals are provided, the FF 22 is operated at the timing of the output pulse from only the detector 14, and the FF 23 is operated at the timing of the output pulse from both the detectors 14, 15. Thus, it is output to a first thyristor of a pair of thyristors 8. Then, when the switch 8 is opened, a capacitor current becomes zero, its voltage becomes a bias to be applied to the first thyristor as a forward voltage and to the second thyristor as a reverse voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power factor correcting device using switching elements such as thyristors, and particularly to improvements in its control system.

[Conventional technology]

FIG. 3 is a circuit diagram showing the main circuit of an AC electric vehicle equipped with a power factor correction device disclosed in, for example, Japanese Patent Laid-Open No. 61-244201. In the figure, (1) is an AC overhead wire, (2) is a pantograph, (3) is a vehicle-mounted transformer, and (4) is a converter that converts AC power from the secondary side of transformer (3) into DC power. The power converter, (5) is the main smoothing reactor, (6) is the main motor, and (7) is the power factor correction device connected in parallel with the secondary side of the transformer (3) and therefore its load, with the following configuration. It consists of parts. That is, (8) is a thyristor switch as an AC switch formed by connecting thyristors THA and THB as a pair of switching elements in antiparallel, (
9), (l10.αυ are a power factor correction glue, a resistor, and a capacitor, respectively, which constitute a phase advancing circuit.

FIG. 4 is a circuit diagram showing a conventional control circuit for the power factor correction device of FIG. In the figure, (6) is an AC overhead line (
(1) is a synchronous power supply circuit that generates a voltage signal synchronized with the voltage, (2) is a waveform shaping circuit that converts a sine wave voltage signal into a rectangular wave voltage signal, and α→ and (to) are synchronous voltage signals, respectively. A 90° detection circuit and a 270° detection circuit output pulse signals when the phase is 90° and 270°, respectively, αQ is an OR circuit, and (l'i) is a power factor whose power factor falls below a predetermined set value due to load fluctuations. a power factor drop detection circuit that outputs a signal GST which is a power factor improvement control command when
(To) is a D-type flip-flop, α is an inverter, and (A) ■υ is an AND circuit.

Next, the operation will be explained. FIG. 5 is a time chart of each voltage, current, and control signal. In Figure 5,
Let us now consider the time 1=11 when the phase of the voltage vS on the secondary side of the voltage regulator (3) becomes turbulent. At this time, since the signal GST from the power factor drop detection circuit αη is at H level, the Q1 output of the flip-flop (G) becomes H level. Also, input is also H.
level, the Qt ratio output becomes H level. As a result, the AND circuit power reaches the H level, and outputs the gate signal GA as an ignition signal to close the thyristor THA and energize it. Then, the signal GST is at time 1 =
1! Time 1 when the next clock pulse is input to the T terminal of the flip-flop after reaching the deshiri bell:
At 1s, the signal GST is at L level and the input is also at L level, so Ql ratio output Q! Both specific outputs become L level, and A
The outputs of the ND circuit r2Q@υ are both at L level, and both thyristors THA and THB are in an open state. Therefore, as shown in FIG. 5, the power factor correction device (7) has the power factor corrector (7) at time 1 = 1. Until then, the current IC is more advanced than the voltage s.
flows. Then, time 1 = 1. Thereafter, the current Ic becomes zero, the voltage Vc of the capacitor 01) is biased, and the voltage VTR as shown in the figure is applied to the thyristor THA in the reverse direction and to the thyristor THB in the forward direction. Next, if the signal GST becomes H level again at time 1:14, the first clock pulse after that will be at time 1 = 1. The flip-flop (G) sets its Q1 output to H level and its Q2 output to L level, so the output of the AND circuit becomes H level and outputs the gate signal GB, which continues in the forward direction until then. Voltage VT
The thyristor THB to which R was applied closes and resumes energization. The above control makes it possible to open and close the power factor correction device (7) without transient phenomena, and achieves power factor control in accordance with load fluctuations of the main motor (6).

``[Problem to be solved by the invention] Since the conventional power factor correction device is configured as described above, the following problems may occur depending on the timing of the signal GST from the power factor drop detection circuit αη. Fig. 6 is a time chart when the signal GST is different from Fig. 5.Here, the signal GST is at the L level at time 1 = 1 in the time period when the gate signal GB is at the H level. As a result, time 1 of phase 90' of voltage Vs =
1. The current Ic is then cut off, and thereafter the voltage VTR as shown is applied to the thyristor THA in the forward direction and to the thyristor THB in the reverse direction. Then, time 1=1. When the signal GST becomes H level again, time 1 = 1. First, the gate signal GB is output to the thyristor THB. However, at this point, the voltage VTR is applied to the thyristor THB.
Since is being applied in the reverse direction, no current is applied, and at time t=tto half a cycle later, the thyristor THA to which the voltage is applied in the forward direction is closed and energization is resumed. That is, time 1 = 1. During the period from tto to tto, gate signals are output to the thyristor THB to which a reverse voltage is applied, which increases the leakage current of the thyristor, increases loss, and accelerates the deterioration of the element. In this way, with conventional equipment,
There was a problem that the timing of the signal GST increases the number of si-risk elements.

This invention was made in order to solve the above-mentioned problems, and its purpose is to obtain a power factor correction device in which normal operation of the elements is always achieved no matter when the signal GST is applied. do.

[Means to solve the problem]

The power factor correction device according to the present invention includes a switching element that outputs the ignition signal last when the AC switch is opened, and a switching element that outputs the ignition signal first when the AC switch is closed. Control is performed so that the switching elements are always different from each other.

[Effect]

Suppose now that the signal to close the AC switch is cut off, the last ignition signal is output to the first switching element of the pair of switching elements, and then the AC switch is opened. After this time, the current in the capacitor becomes zero and the voltage becomes a bias, so that a reverse voltage is applied to the first switching element and a forward voltage is applied to the second switching element. Then, when the signal to close the AC switch is output again, the first ignition signal is
The signal is output to a switching element different from the switching element , that is, a second switching element.

Since a forward voltage has been applied to this second switching element until then, it is immediately closed by the ignition signal and continues normal switching operation.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure shows the control circuit in this case. Note that the main circuit is the same as in FIG. 3. In Figure 1, @~Qη, a groan~QI
) is the same as the conventional case shown in FIG. 4, so the explanation will be omitted. The difference from the conventional one is the flip-flops, and in this embodiment, two flip-flops (A) and (A) are provided which receive different input clock signals. That is, the flip-flop (a) is the 906 detection circuit α
The flip-flop (to) operates at the timing of the output pulse from → only, and the flip-flop (to)
It operates at the timing of the output pulse from 410*.

Next, the operation will be explained with reference to the time chart shown in FIG.

In FIG. 2, first, time 1=1. Consider the operation in . Here, since the phase of voltage Vs is 0, a clock pulse is output to the flip-flop, and since its D input is at H level, its Q output is also at H level. On the other hand, the flip-flop also has its D input at H level and its Q output at H level.

As a result, the AND circuit outputs the gate signal G to close the thyristor THA. Next, time 1 after half a cycle
= 1. Here, although the signal GST is at L level, no clock pulse is output to the flip-flop (A) and its Q output does not change. After all, flip-flops
only changes its Q output to L level. As a result, A
The ND circuit Q outputs the gate signal GB and the thyristor T
HB is closed. Then, when the time reaches 1:13,
Since the flip-flop also operates and changes its Q output to L level, the outputs of both AND circuits (a) 21) both become L level, and both thyristors THA and THB are opened. In the end, it is the thyristor THB that finally outputs the gate signal, but this occurs at the time 1=1 when the signal GST becomes L level. is 1 = 1. It will not change after that. That is, the above phenomenon does not change regardless of the timing of the signal GST. Therefore, time t=j.

After that, be sure to connect thyristor THA to thyristor T in the forward direction.
The voltage VTR is applied to HB in the opposite direction. Next, time 1 = 1. Assuming that the signal GST becomes H level again at the time 1 = 1. , the flip-flop inverts its Q output, but
Since the Q output of the flip-flop does not change, both thyristors THA are still connected.

No gate signal is output to THB. At time t=t6, the Q output of flip-flop 4 is inverted to H level, and at the same time, the Q output of flip-flop 7 is also inverted to H level, and gate signal G is output.

As a result, the thyristor THA to which the voltage VTR was applied in the forward direction until then is closed. And in this case, even if time 1 = 14 when signal GST is reapplied is time 1
= 1. Even during the period from t6 to t6, the above-mentioned thyristor THA is still closed first.

That is, in this embodiment, when the thyristor switch (8) is opened, it is always the thyristor THB that outputs the gate signal last, and when the thyristor switch (8) is closed, the gate signal is output first. It is always the thyristor THA that outputs. As a result, the phenomenon in which a gate signal is output to a thyristor to which a voltage is applied in the opposite direction is completely avoided, and problems such as increased thyristor loss and accelerated deterioration are eliminated.

In addition, in the above embodiment, the thyristor switch (8) outputs a gate signal when the thyristor switch (8) is opened and closed, but the thyristor switch is fixed. However, the present invention is not necessarily limited to the above method. (8) When the thyristor switch (8) is opened, the last energized thyristor is stored in a separate storage means, and when the thyristor switch (8) is closed next, the gate to the thyristor stored above is stored. The effects of the present invention can be similarly achieved by a system in which the output of the signal is locked and the lock is released by energizing the other thyristor.

Furthermore, the present invention can be similarly applied to cases where other switching elements such as transistors are used in addition to thyristors.

Furthermore, although the above embodiment improves the power factor of the main motor load of an AC electric vehicle, the present invention can be widely applied to cases where an AC switch is used to improve the power factor of a fluctuating load.

[Effects of the Invention] As described above, in this invention, the switching element outputs the ignition signal last when the AC switch is opened, and the switching element outputs the ignition signal first when the AC switch is closed. Since the switching elements are controlled so that the switching elements are always different from each other, there is no possibility that an ignition signal will be output to the switching elements to which a voltage has been applied in the opposite direction, which will prevent increased loss and deterioration of the switching elements. Problems such as promotion will be resolved.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing a control circuit of a power factor correcting device in an embodiment of the present invention, Fig. 2 is a time chart showing the operation of the device shown in Fig. 1, and Fig. 3 is an AC equipped with a power factor correcting device. FIG. 4 is a circuit diagram showing a conventional control circuit of a power factor correction device, and FIG. 5, FIG. 6 is a time chart showing the operation of the device shown in FIG. 4. In the figure, (7) is a power factor correction device, (8) is a thyristor switch as an AC switch, αυ is a capacitor,
THA and THB are thyristors as switching elements, and GA and GB are gate signals as ignition signals. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] A phase advance circuit including a capacitor is connected in parallel with a single-phase load via an AC switch formed by connecting a pair of switching elements in antiparallel, and the phase advance circuit described above is set at a phase where the phase advance current flowing through the phase advance circuit becomes zero. In the device for improving the power factor of a load by outputting an ignition signal to a switching element and controlling opening/closing of the AC switch, the switching element outputs an ignition signal last when the AC switch is opened, and the AC switch. 1. A power factor correction device characterized in that the switching element that first outputs the ignition signal when the switch is closed is controlled so that the switching element is always different from each other.