JPH04208076A - Method for detecting output current of pwm inverter - Google Patents

Abstract

PURPOSE:To eliminate deviation of a current detecting timing due to a dead time, a switching delay by detecting the edge timing of a zero vector period from the output voltage of an inverter, and detecting the difference of starting and ending timings of the timing and the zero vector period of the voltage vector timing signal. CONSTITUTION:Phase PWM wave output voltages of an inverter 5 are detected as ON/OFF period by a voltage detector 7, and detected as a pulse having a width and timing of zero vector V0, V7 periods by a logic circuit 8. Edge detectors 91-94 detect starting and ending timings of the zero vector. The end timing of the vector V0 is detected by the detector 91 during an ON-mode period, the starting timing of the vector V7 is detected by the detector 92, and the output timing of the detector 91 and the output timing of the detector 92 become a timing between both the periods of the vectors V1 and V6.

Description

DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to a control device for a PWM inverter, and more particularly to a method for detecting an output current of an inverter.

B1 Summary of the Invention The present invention provides a PWM inverter that generates each phase output from a voltage vector timing signal, and in order to sample the inverter output current at the center of the zero vector, which corresponds to the apex timing of the carrier wave, the present invention is based on the center of the zero vector and the inverter output voltage. By detecting the difference between the vector and the center of the zero vector and correcting the current detection timing, deviations in current detection timing due to inverter dead time and switching delays are eliminated.

C1 Conventional technology PWM inverters enable high-performance speed control of AC motors such as vector control, and when this vector control is speed sensorless, speed estimation using the motor's primary voltage and current, and current tracking. Motor current detection is required for comparison of triangular waves in the method.

In the current of a PWM inverter, a current ripple due to the PWM switching frequency and a fundamental wave current are superimposed, and in order to detect the fundamental wave component from this current waveform, there is a known method of removing harmonic components using a low-pass filter. There is.

In this method, the phase delay of the detected current becomes large, and the effect on high-speed response in vector control and the like becomes large. PWM
Another method for high-speed inverter current detection is to sample the current waveform and set the 20 Samblinog timing to the peak (break point) at which the PWM carrier signal (triangular wave) is at its maximum or minimum (for example, Hitachi Review, VOL65, No. 4 (+983-4), Direct digital control of inverters by microprocessors)
.

In this method, the switching operation point of the main switch element of the PWM inverter is avoided, and current sampling is performed at approximately the midpoint of the switching operation, thereby reducing the influence of current ripple.

D1 Problems to be Solved by the Invention The conventional current detection method uses the peak of the triangular wave as the current detection timing, but in the time chart of Fig. 4, the PWM waveform is obtained by comparing the triangular wave and the fundamental wave, the U, V, and W phases are all on. This corresponds to the period when , and the period when both are off, and this corresponds to the output voltage vector (
The zero vector period V in Fig. 5). , is the central timing of v7. Therefore, in a PWM inverter that generates a PWM waveform using the triangular wave comparison method or generates a 2wM waveform from PWM pattern data, the ripple current component can be removed by sampling the current at the center timing of the zero vector v0°V7.

Here, the main circuit switch of the inverter is designed to have a slight delay in the on/off control of both the high voltage side arm and the low voltage side arm to prevent simultaneous on (short circuit) when the high voltage side arm and low voltage side arm are switched on and off at the same time. A time will be set.

Due to the dead time delay described above, the delay of the dead time compensation circuit, and the switching delay of the switch element itself, there is a difference between the zero vector time of the PWM waveform generation circuit and the zero vector time of the actual output voltage, which causes ripples in current detection. A large amount of current may remain, and when current detection is performed for speed estimation etc., there is a problem that fluctuations in the detected current deteriorate speed detection accuracy.

An object of the present invention is to provide a current detection method that eliminates deviations in current detection timing due to dead time and switching delays.

80 Means and Effects for Solving the Problems In order to achieve the above object, the present invention provides a PWM inverter that generates each phase output of the PWM inverter from a voltage vector timing signal. detect the timing, detect the difference between this timing and the start/end timing of the zero vector period of the voltage vector timing signal, and use this difference to correct the timing signal at the center of the zero vector of the voltage vector timing signal. , the output current of the inverter is sampled and detected at this corrected timing, and the start/end timing of the zero vector period of the zero vector timing signal for generating the PWM wave and the zero of the inverter output voltage vector are detected. The difference between the start and end timings of the vector period is detected as dead time or switching delay, and current sampling at the peak of the carrier wave is performed by correcting the current sampling timing using this difference.

F. Example FIG. 1 is a circuit diagram showing an embodiment of the present invention.

The PWM calculation unit 2 of the microcomputer 1 generates start and end timing data T for each voltage hectare period from the frequency and modulation degree commands. , T2, T, and the zero vector period ■. , the timing data T that is the center of V7. −
Find DET. Gate signal generation B43 is timing data T. -DET, To, T, , generate gate outputs V U'', V V'V2 having widths from the output start to the end of each voltage vector v1 to V6 from T2, and use the phase sequential data at this time as a modulation signal PWM. It is obtained from the phase sequence table 4 which inputs the phase of MOD.

Gate output vUt, Vv", Vw"i;L-+"
/bar';'5 is set as a gate signal, and a PWM waveform voltage output is obtained from the inverter to drive the induction motor 6.

Each phase PWM wave output voltage of the inverter 5 is determined by the voltage detection circuit 7.
It is detected as an on-off period by the logic circuit 8, and is detected by the logic circuit 8 as a pulse having the width and timing of the zero vector v0, 7 period. Edge detection circuits 9□ to 94 detect the start and end timings of zero vectors, respectively. For example, in FIG. 4, this timing is a zero vector during the on mode period.

The circuit 9 detects the end timing of The start timing of the zero vector 7 is detected by the detection circuit 9. The output timing of the detection circuit 9I and the output timing of the detection circuit 9° are the timings sandwiching the rainy period of vectors v1 and v6.

Delay time detection units 101 to 10. are the start and end timings T of each voltage vector (1) to (6) of the PWM calculation unit 2. ,
The edge detection circuit 9 uses To,T, of T, ,T, as the reference timing for the start and end of the output voltage vector period.
．． The difference T from the detection timing of .about.94 is detected as a delay time. For example, in the off-mode period in FIG. 4, the voltage vector that is the sum of voltage vectors v6 and V is the rising timing T of Vll.

From the falling timing T2 of
-5 is detected, and the detection unit 10. Then, the difference ΔTON-E in the on-end timing with respect to T is detected.

Correction time calculation unit 11□, 11. is the delay time detection section 101
~10. The correction time ΔToFF−DET1ΔT in on mode and off mode from the delay time ΔT detected by
Find ON-DET. These correction times are shown in the flowchart shown in FIG.

This figure generalizes the on-mode period and off-mode period of FIG. 4, and shows the timing T when the output voltage vector command is reached. , T2, T are determined by the calculation unit 2, and the gate outputs ■♂, Vv',
Vw" is applied to the inverter 5. At this time, the actual output voltage vector λ' from the inverter 5,
μ' is the edge detection circuit 9. ~94 is detected as an edge timing, and the delay time detection unit 10. ~104, the delay time ΔToN-s, ΔTON-E in the on mode and the delay time ΔTOFF-! in the off mode! II, ΔTO
FF-6 is detected respectively. From these delay times, the correction time calculation section 11. ．． The correction time 112 is obtained as the average value of the delay at the start and the delay at the end of the actual voltage vector outputs λ', μ' with respect to the voltage vector commands λ, μ.

Next, the timing correction unit 12 corrects the correction time ΔT 0FF−
DET, ΔToN-, )ET is added/subtracted to zero vector timing To-DET. In this correction, as shown in Fig. 2, the correction time ΔTON-DET detected in the previous on-mode period is used as the correction amount for the next zero vector timing, and the correction time similarly detected in the previous on-mode period is used as the correction amount for the next zero vector timing. Let ΔTOFF-DET be the next zero vector timing correction amount. Through these corrections, the zero vector timing is corrected to the center of the zero vector of the actual output voltage vector, that is, the zero vector timing is corrected to the zero vector timing corrected by the dead time and switching delay on the inverter 5 side.

Therefore, the sample and hold circuit 1 detects the current of the motor 6.
3. 133 and the A/D converters 141 to 143, by sampling at the zero vector timing corrected by the timing correction section 12,
It is possible to eliminate the occurrence of current ripples due to deviations due to dead time and the like.

Each operation of the microcomputer 1 described above is realized by the flowchart shown in FIG. In the figure, step 8
1 to S8 are timings T1 to T3 and the start of the zero vector.
Difference from end timing ΔT' o ToS % ΔTo
Find w-xq ΔTOFF-8% ΔTOFF-E,
Timing T in step S9. -oErsTa~T,
In step Sll, the corrected timing T in the on mode is calculated. -DET is determined, and in step S12, the corrected timing T in off mode and -DET are determined.
In each case, the timing obtained in step s9 is T. N-8
etc. Further, in step S13, each timing data is set as a gate control command signal and as a current sampling signal.

G1 Effects of the Invention As described above, according to the present invention, the deviation between the start and end timings of the zero vector period of the voltage vector timing signal that generates the PWM waveform and the output voltage vector is detected, and the current sampling is controlled based on this deviation. Since the timing of the center of the zero vector is corrected, it is possible to perform current sampling without shifting the center of the zero vector due to the dead time set in the inverter's main switch or switching delay, which reduces ripple and reduces ripple.
This enables highly accurate speed control from current detection and speed estimation.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 is a time chart of correction time calculation in the embodiment, Fig. 3 is a flowchart of another embodiment, and Fig. 4 is a triangular wave comparison method in a PWM inverter. FIG. 5 is a voltage vector diagram. 2... PWM calculation section, 3... Gate signal generation section, 4
,... Phase sequence table, 9°, 94... Edge detection circuit, 108, +04... Delay time detection section, 111.112
．． . . . Correction time calculation section, 12 . . . Timing correction section. Figure 5 Voltage vector diagram m

Claims (1)

[Claims] (1) In a PWM inverter that generates each phase output of the PWM inverter from a voltage vector timing signal, detect the edge timing of the zero vector period from the output voltage of the inverter, and compare this timing with the zero vector period of the voltage vector timing signal. Detect the difference between the start and end timings, use this difference to correct the timing signal at the center of the zero vector of the voltage vector timing signals, sample the output current of the inverter at this corrected timing, and detect the current. A current detection method for a PWM inverter, characterized in that: