JPH01298417A - Substrate constitution control system - Google Patents

Abstract

PURPOSE:To eliminate the contradiction that the clock condition of a subsystem must be set beforehand before the substrate is detected without increasing a hardware quantity by setting a shift ring to the same condition as one signal line. CONSTITUTION:Two types of shifting clocks are both inputted through clock lines 5 and 6 to a shifting ring 9 on a substrate 2 as a level signal held at the ON condition, the shifting ring 9 is made into the same condition as one signal line and thus, the input data through a signal line 7 from a service processor SVP3 are communicated without shifting the shifting ring 9 and inputted through a signal line 8 to a SVP 3 as output data as they are. When the condition of the output data is coincident to the condition of the input data, it is decided that the substrate 2 exists in a subsystem 1. Thus, without increasing the hardware quantity, the contradiction that the clock condition of the subsystem 1 must set beforehand before the substrate is detected can be eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a board configuration control method for computer systems, etc., and particularly to detection of a board mounting state.

[Prior Art] FIG. 2 is a block diagram showing the configuration of a computer system necessary for explaining the prior art and the present invention. In the figure, ■ is a subsystem such as a central processing unit, channel device, main memory controller, etc. that is the main component of a computer system, 2 is a board mounted in this subsystem 1, and 3 is a control for each subsystem 1. A service processor (hereinafter referred to as SvP) manages the operation and maintenance of a computer system.
A plurality of flip-flops 4 connected in series are provided on the substrate 2, and two types of shift clock lines 5°6 from 5VP3 are connected to each flip-flop 4.
At the same time, the input of the flip-flop 4 in the first stage is connected to the input signal line 7 from 5vP3, the output of the flip-flop 4 in the final stage is connected to the output signal line 8 to 5VP3, and the shift ring 9 is connected to It is formed.

In the above configuration, conventionally, the input data is shifted from the shift ring 9 to the 5VP by a normal shift operation using the input data from the 5VP3 to the shift ring 9 and two types of shift clocks that are alternately significant.
By detecting that the output data input to subsystems 3 and 3 are equal, it is detected that the board 2 is mounted in each subsystem 1.

That is, the input data inputted from 5VP3 to the shift ring 9 via the input signal line 7 is transmitted through the two types of shift clocks on the shift clock lines 5 and 6 and the shift B.
By operating the clock alternately as shown in FIG. Output as data, 5V via output signal line 8
It is input to P3. The 5VP3 compares the data patterns of the input data and output data, and detects that the board 2 is mounted in the subsystem 1 if the comparison results match.

[Problems to be Solved by the Invention] As described above, the conventional board configuration control method shifts the shift ring 9 through a normal shift operation and compares the input data from the 5VP3 and the output data from the shift ring 9. Since the mounting state of the board 2 was detected by doing this, it was necessary to set the internal clock state of each subsystem 1 in order to shift the shift ring 9 in a normal shift operation, and the state of the board 2 was detected before the board mounting state was detected. There was a problem in that the clock supplied to the board had to be initialized. This problem is caused by changing the board mounting state to 5.
This problem can be solved by providing a dedicated signal line for transmitting the signal to VP3, but this has the problem of increasing the amount of hardware.

This invention was made to solve the above problems, and it is possible to eliminate the contradiction that the clock state of the subsystem must be set in advance before detecting the board, without increasing the amount of hardware. The purpose of this study is to obtain a board configuration control method that can be used.

[Means for Solving the Problems] A board configuration control method according to the present invention uses level signals that keep two types of shift clocks in an on state, and sets a shift ring in the same state as one signal line. The mounting state of the board is detected without shifting the shift ring.

[Operation] In the present invention, two types of shift clocks are input to the shift ring on the board as a level signal with both kept in the on state, without setting the clock state in the subsystem in advance, and one shift ring is input to the shift ring on the board. By setting the same state as the signal line of
It is manually input to SVP as output data to P.

[Example code] An embodiment of the present invention will be described below with reference to the drawings.

The configuration of the computer system is similar to that shown in FIG. 2, but in this system, two types of shift clocks and input data supplied from the 5VP 3 to the shift ring 9 on the board 2 are different from the conventional example.

FIG. 1 (al to tdl) shows these embodiments in timing charts. In the figure, 10 is a shift clock supplied from 5VP3 to shift ring 9 via shift clock line 5, and 11 is a shift clock supplied from 5VP3 to shift ring 9. Shift B supplied to shift ring 9 via clock line 6
Both clocks are held in the on state when the board mounting state is detected, and are simply level signals. On the other hand, 12.1
3 is input data, and when detecting the board mounting state, two types of input data 12 in the on state and input data 13 in the off state are compared with the output data.

Next, the operation will be explained. First, the shift ring 9 is controlled by supplying the shift clock 10 and shift B clock 11 from the 5VP3 to each flip-flop 4 in the shift ring 9 as level signals in the on state, as shown in FIG. Make it the same state as one signal line. This takes advantage of the property of a flip-flop that data is lost when the clock is on.

Next, in this state, input data in the on state or off state is input to the shift ring 9 via the input signal line 7, and the input data is input to the shift ring 9 via the output signal line 8 to the 5VP3.
The two types of on-state input data 12 and off-state input data 13 shown in FIG. 1 are compared to see whether the state of the output data input to the input data is the same as the state of the input data. Only when these two comparison results match, it is determined that the board 2 is present in the subsystem 1, thereby detecting the board mounting state in the subsystem 1.

Note that although the above embodiment describes detection of the board mounting state of a computer system, the present application can be applied to any device having a shift ring, and the same effects as in the above embodiment can be achieved.

[Effects of the Invention] As described above, according to the present invention, two types of shift clocks are both kept in the on state as level signals, and the shift ring is set in the same state as one signal line to be mounted on a board. Since the state is detected, it can be detected without shifting the shift ring during normal shift operation, which increases the amount of hardware and requires setting the clock state of the subsystem in advance before detecting the board. This has the effect of eliminating this contradiction.

[Brief explanation of the drawing]

Figure 1 +01~ (dl is a timing chart showing one embodiment of the present invention, Figure 2 is a block diagram showing the main configuration of a computer system, Figure 3 fa), (bl is a timing chart showing a conventional system. 1 is a subsystem, 2 is a board, 3 is a 5vP (service processor), 4 is a flip-flop, 5 is a shift clock line, 6 is a shift clock line, 7 is an input signal line, 8 is an output signal line, 9 is a shift ring, 10 is a shift clock, 11 is a shift clock, 12, 13
is input data. Agent Masuo Oiwa (and 2 others) Figure 2 1: W7'' system, 2; Tsune (9; Shift Link Tomb) Figure 3 (a) Shift A'711 Tsu78 (b) Shi7) B ON FF

Claims (1)

[Claims] A board whose output data is input to the service processor by shifting the mounting state of the board constituting the subsystem controlled by the service processor by alternating input data from the service processor using two types of significant shift clocks. In a board configuration control method in which detection is performed by comparing the input data and output data using the above shift ring, the above two types of shift clocks are both held in the on state as level signals, and the shift ring A board configuration control method characterized in that a board mounting state is detected by setting a signal line to the same state as one signal line.