JPH0129266B2 - - Google Patents

Info

Publication number
JPH0129266B2
JPH0129266B2 JP56202106A JP20210681A JPH0129266B2 JP H0129266 B2 JPH0129266 B2 JP H0129266B2 JP 56202106 A JP56202106 A JP 56202106A JP 20210681 A JP20210681 A JP 20210681A JP H0129266 B2 JPH0129266 B2 JP H0129266B2
Authority
JP
Japan
Prior art keywords
test
pattern
adapter
printed wiring
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56202106A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58103671A (ja
Inventor
Akio Sano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56202106A priority Critical patent/JPS58103671A/ja
Publication of JPS58103671A publication Critical patent/JPS58103671A/ja
Publication of JPH0129266B2 publication Critical patent/JPH0129266B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
JP56202106A 1981-12-15 1981-12-15 パタ−ンチエツカ−の制御方法 Granted JPS58103671A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56202106A JPS58103671A (ja) 1981-12-15 1981-12-15 パタ−ンチエツカ−の制御方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56202106A JPS58103671A (ja) 1981-12-15 1981-12-15 パタ−ンチエツカ−の制御方法

Publications (2)

Publication Number Publication Date
JPS58103671A JPS58103671A (ja) 1983-06-20
JPH0129266B2 true JPH0129266B2 (enrdf_load_stackoverflow) 1989-06-08

Family

ID=16452058

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56202106A Granted JPS58103671A (ja) 1981-12-15 1981-12-15 パタ−ンチエツカ−の制御方法

Country Status (1)

Country Link
JP (1) JPS58103671A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61259597A (ja) * 1985-05-13 1986-11-17 株式会社日立製作所 プリント基板の配線方法
JP5276774B2 (ja) * 2005-11-29 2013-08-28 株式会社日本マイクロニクス 検査方法及び装置

Also Published As

Publication number Publication date
JPS58103671A (ja) 1983-06-20

Similar Documents

Publication Publication Date Title
US6378110B1 (en) Layer-based rule checking for an integrated circuit layout
JP2003514475A (ja) 論理特徴付けビヒクルを使用した製品歩留り予測のためのシステムおよび方法
US20080148208A1 (en) Method for improving a printed circuit board development cycle
US7870534B2 (en) Method and apparatus for creating wiring model, computer product, and method of manufacturing device
US20190259140A1 (en) Semiconductor wafer measurement method and system
CN110874518B (zh) 布线基板的设计辅助装置、导孔配置方法以及记录介质
CN117892681B (zh) 修复电压降的方法、电子设备、存储介质和程序产品
CN116306485A (zh) 一种电路板数字孪生体的建立方法、系统及终端
TWI378521B (en) Mock wafer, system calibrated using mock wafer, and method for calibrating automated test equipment
US10796056B2 (en) Optimizing library cells with wiring in metallization layers
JPH0129266B2 (enrdf_load_stackoverflow)
JP2006253187A (ja) 電源解析方法および電源解析を実行するプログラム
JP3209597B2 (ja) プリント配線基板の設計方法
US20090243121A1 (en) Semiconductor integrated circuit and layout method for the same
Zlatanov PCB design process and fabrication challenges
JPH0245881A (ja) プリント基板の配線方法
Adshead Optimising automatic tracking of multilayer boards
JPH02137390A (ja) 印刷配線板ユニットの製造方法
JP3040665B2 (ja) プリント板設計装置
JP3365328B2 (ja) プリント配線板ｃａｄにおいてネガ図形を自動発生する方法
CN119089856A (zh) 电子迁移检查模块功能验证方法、计算机设备、介质及程序产品
JP2007286891A (ja) Ｌｓｉパッケージ基板設計支援装置
Wilkins Physical design of circuit boards for testability and maintainability
JPH04282773A (ja) プリント基板配線パターン生成順序決定方法
JP5035003B2 (ja) 配線レイアウト装置、配線レイアウト方法及び配線レイアウトプログラム