JPH01292554A - Check system for firmware sequence - Google Patents

Abstract

PURPOSE:To avoid the foul result or the breakdown of data due to the disturbance sequence by detecting the phase of an SCSI bus and checking whether this phase is equal to the estimated one or not. CONSTITUTION:The state of each phase carried out on a general-purpose interface SCSI bus 1 is always monitored by a detecting circuit 2 in a controller connected to the SCSI. When a phase transition occurs, the code of the phase corresponding to the shifted phase is stored in a phase code register 3. While the firmware so far controlled the working of a device sets the phase codes corresponding to the phases to a phase comparison register 4 when each phase is processed and gives an instruction to a comparator 5 to compare the contents of a register 3 with those of a register 4. When the coincidence is obtained between both contents by the circuit 5, the operation is continued. While the operation is interrupted when no coincidence is obtained between both contents.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a control method for a general-purpose interface 8C8l, and particularly to a firmware sequence check method using phase detection.

(Prior Art) Conventionally, when a firmware sequence is disrupted in a device controlled by firmware, the disruption of the sequence can be indirectly detected due to a mismatch in data processed by the firmware. However, because it is indirect, there are many cases where the detection point is delayed or the resulting data is extremely difficult to analyze, and it takes a long time and a lot of man-hours to resolve firmware-related problems. Was.

(Problems to be Solved by the Invention) The conventional firmware control method described above has a drawback in that when the sequence is disrupted due to a logic bug, hardware failure, etc., the disruption of the sequence itself is not detected. In other words, firmware with a disordered sequence may cause inconsistencies in processed data or 1. Disturbances in the sequence are only indirectly detected due to defects in the calculation results. However, the drawback is that it is difficult to distinguish between a simple malfunction in the arithmetic circuit and a disturbance in the firmware sequence.

An object of the present invention is to monitor signals on the 5C8I bus of a general-purpose interface to detect phase transition states, and at the time a phase transition is detected based on the detection result, to retain a code corresponding to the transitioned phase. It is an object of the present invention to provide a firmware sequence check method configured to eliminate the above-mentioned drawbacks and to quickly resolve sequence disturbances by comparing the phase difference with the phase set by the firmware.

(Means for Solving the Problems) A firmware sequence check method according to the present invention is configured to include a phase detection circuit, a phase code register, a phase comparison register, and a comparison circuit.

The phase detection circuit monitors (1) on the 5C8I bus to detect a phase transition state.

The phase code register is used to hold a code corresponding to a transition phase when a phase transition is detected according to an instruction from the phase detection circuit.

The phase comparison register is for holding the contents set by firmware.

The comparison circuit is for comparing the contents of the phase code register and the contents of the phase comparison register.

(Example) Next, one aspect of the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of a firmware sequence check method according to the present invention.

In FIG. 1, 1 is the 5eS1 bus.

The target device is connected to the SC81 bus l. 2
is the phase detection direction M, 3tl! A phase code register 4 is a phase comparison register Th5 is a comparison circuit.

In the control device connected to the general-purpose interface 5C81, the state of each phase being executed on the 8C8I bus 1 is constantly monitored by the detection circuit 2. Here, when a phase transition occurs, the code of the phase corresponding to the transitioned phase is stored in the phase code register 3.
is stored in

In addition, the firmware that controls the loading operation,
When executing the processing of each phase, set the phase code corresponding to the phase in the phase comparison register 4,
The comparison circuit 5 is instructed to compare the contents of the phase code register 3 and the contents of the phase comparison register 4. ratio! 5! If the comparison result in circuit 5 indicates a match, then
The device continues to operate. If a mismatch is detected, the output of the comparison circuit 5 interrupts the operation of the device.

In the 8C8I interface, is it a serious problem that the phase that the firmware is trying to execute is different from the phase that is actually trying to be executed on bus 1?

Or it's a bug. Therefore, in such a case, subsequent operations are not guaranteed at all.

For this reason, the operation is interrupted to prevent the spread of adverse effects.

(Effects of the Invention) As explained above, the present invention detects a phase on the 808 I bus and checks whether the phase is a scheduled phase or not. This has the effect of preventing fraud and data destruction, and even in the unlikely event that a problem occurs, it can be resolved quickly.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of a firmware sequence check method according to the present invention. 1,,,8 CSI bus 2...detection circuit 3.
...Phase code register 4...Phase ratio register 5...Comparison circuit patent applicant NEC Corporation representative Patent attorney Hisashi Inoro Figure 1

Claims (1)

[Claims] A phase detection circuit for detecting a phase transition state by monitoring signals on the SCSI bus, and for holding a code corresponding to the transitioned phase at the time when a phase transition is detected according to an instruction from the phase detection circuit. A phase code register, a phase comparison register for holding contents set by firmware, and a comparison circuit for comparing the contents of the phase code register and the contents of the phase comparison register. A firmware sequence check method characterized by: