JPS61224056A - Processing system for detecting trouble of channel - Google Patents

Abstract

PURPOSE:To detect effectively even a hang-up trouble or the like by providing a timer monitor device in a CPU and performing the channel trouble detection processing directly or through a service processor if response does not come from a channel processor within a prescribed time. CONSTITUTION:When a channel start instruction is issued, a CPU 1 checks the physical connection state on a channel table 5. If the channel is not connected as the check result, a condition code is set as channel unconnection to terminate the instruction execution. If the channel is connected, its channel processor, for example, 202 is started, and the CPU waits for response by a timer monitor device 4. When response comes within the prescribed time, a condition code is set by the report from the processor 2-2 to terminate the instruction execution. If response does not come within the prescribed time, the CPU 1 clears the processor 2-2 directly or through a service processor 3 and performs the channel trouble processing of the processor 2-2.

Description

DETAILED DESCRIPTION OF THE INVENTION Overview: In a data processing system having a central processing unit and one or more channel processors.

The central processing unit checks whether there is a response from the channel processor to which the activation instruction has been issued, and activates or activates failure processing for the channel processor when there is no response;
It is disclosed that a central processing unit detects a failure of a channel processor when the channel processor hangs up.

[Industrial application field]

The present invention relates to a channel failure detection processing method, and more particularly to a channel failure detection processing method.

A channel failure detection processing method that allows the central processing unit to detect failures when the channel processor itself is in a state where it cannot detect the failures. As in, central processing unit 1
and a plurality of channel processors 2-0゜2-1.・・・
・Data processing systems in which the and are connected are known. In this case, as shown in FIG. 1, there is also a system to which a service processor 3 is connected.

Conventionally, in such data processing systems.

If there is no response from the channel processor 2-2 after the central processing unit 1 activates the channel processor 2-2, generally, the condition code is set to no response and the channel activation command is issued. It was all I could do to end it. Further, a failure in the channel processor 2-2 is reported as an interrupt request to the central processing unit 1 by the channel processor 2-2 itself or by a monitoring device such as the service processor 3.

[Problem that the invention seeks to solve]

Conventionally, the above control mode was used, but the channel
When the processor 2-2 becomes, for example, in a hang-up state, the hang-up is often not detected by the service processor 2-2 as well as the channel processor 2-2. If there is a time limit in controlling the lower-level input/output device connected to the channel processor 2-2.

In some cases, this may lead to system failure. Especially when the channel processor is configured under microprocessor control.

The above problem becomes obvious.

[Means for solving problems]

The present invention aims to solve the above-mentioned problems, and FIG. 1 shows a block diagram of the principle of the present invention.

The code 1 in the figure is the central processing unit, 2-0.2-1°...
. . . represent channel processors, 3 a service processor, 4 a time monitoring means, and 5 a channel table.

The channel table 5 consists of a memory indexed by the logical channel number of each channel processor,
A physical channel number, a connection flag indicating whether the channel is physically connected, etc. are stored. The time monitoring means 4 also has the role of monitoring the time since the central processing unit 1 activated the channel processor 2-2, for example, and checking whether there is a response from the channel processor 2-2. .

[Effect]

When the channel activation command is issued, the central processing unit 1 determines whether the corresponding channel is physically connected to the central processing unit 1 using the channel table 5.
Find out by. If it is not connected, a condition code (CC=3) is set to indicate that the channel is not connected, and the instruction execution is terminated.

If connected, the corresponding channel processor e.g.
-2, and the central processing unit 1 waits for a channel response. If there is a response within the stipulated time.

By reporting from channel processor 2-2.

Sets the condition code and terminates instruction execution.

A timeout occurs when there is no response from the time monitoring means 4 within a specified time.

The central processing unit 1 instructs itself or the illustrated service processor 3. This clears the channel processor 2-2 and clears the channel processor 2-2.
2 is executed.

〔Example〕

FIG. 2 shows the configuration of an embodiment of processing in the central processing unit, and FIG. 3 shows an explanatory diagram illustrating aspects of startup processing.

In FIG. 2, in process (al), the contents of the channel table 5 are examined as will be described later with reference to FIG.

If the corresponding channel bromo, for example 2-2, is not connected, CC=3 is generated as described above. In process 2-2, the presence or absence of a response from the channel processor 2-2 is checked, and if there is a response, CC=0 to CC=3 are generated in response to the report, and instruction execution is terminated.

If there is no response and a timeout occurs, the central processing unit 1 issues CC=3 in process (C) and executes error handling.

Reference numeral 5 in FIG. 3 is the channel table shown in FIG. 1, which is a memory indexed by the logical channel number (value: (Bt)+Dz) specified by the startup instruction 6. The table 5 stores the physical channel number, connection flag, etc. of the corresponding channel processor.

Then, when activation command 6 is issued.

Obtain the logical channel number by (B, )+Dt and central processing unit 1
indexes the table 5. Based on the connection flag read at this time, it is determined whether the relevant channel processor, for example 2-2, is physically connected.

〔Effect of the invention〕

As explained above (1) According to the present invention, on the condition that the response that should naturally exist does not arrive, the central processing unit l
Detects channel processor hang-up, etc.
Forces processing such as clearing the channel processor.

Therefore, it becomes possible to correctly deal with hang-ups, which have been difficult to detect in the past.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the principle of the present invention, FIG. 2 is a configuration of an embodiment of the present invention, and FIG. 3 is an explanatory diagram illustrating aspects of startup processing. In the figure, 1 is a central processing unit, 2 is a channel processor,
3 represents a service processor, 4 represents a time monitoring means, and 5 represents a channel table.

Claims (1)

[Scope of Claims] A data processing system having a central processing unit (1) and one or more channel processors (2-i), wherein the central processing unit (1) i) Create a channel table (5) that holds a connection flag indicating whether the channel processor is physically connected or not, and The central processing unit (1) includes a time monitoring means (4) for monitoring the presence or absence of a response from the corresponding channel processor, and the central processing unit (1) indexes the channel table (5) in response to the channel activation command and determines whether or not there is a response from the corresponding channel processor.・Check whether the processor is physically connected or not.
and in the connected state, in response to a timeout from the time monitoring means (4), executes or activates processing to clear the state of the channel processor and perform fault processing for the channel processor. A channel failure detection processing method characterized in that: