JPS59180758A - Loop detecting system of ncp - Google Patents

Abstract

PURPOSE:To make sure loop detection possible, by setting the most suitable loop detecting level of each program level by means of the number of instruction executing steps. CONSTITUTION:In a control memory 11 programs of each level Li of a line control program NCP are stored. An executing program is selected by a control section 16 and instructions are successively fetched by a register 13 and executed in accordance with a value set in an address register 12. An instruction running number counter 14 counts whenever an instruction is fetched at each level Li and displays the total step number R of executed instructions. In an instruction running number upper limit value table 18, the upper limit value Mi of allowable total instruction step numbers are previously registered at every level Li. A comparing section 19 reads out the upper limit value Mi in accordance with the level Li and compares the read out Mi with a total step number R and, when the R becomes R>=Mi, generates interruption and informs of the incidence of a fault by judging that a loop condition occurs.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a fault detection method for a communication control device CCP,
In particular, the present invention relates to a method for detecting a loop state of the line control program NCP.

[Technology background]

First, FIG. 1 shows an example of the configuration of a data communication processing system in a data processing system to which the present invention is directed. In the figure,
1 is a host, 2 is an application program, 3 is a communication access method VTAM, 4 is an input/output control program (execute channel program) EXCP, 5 is a communication control processing unit CCP, 6 is an NCP, and 7 is a line network. be. Data communication between the application program 2 and terminals connected to the line 7 is executed under the control of the VTAM 3.

The NCP 6 is composed of programs or modules at five levels, for example, level 1 to level 5, as shown in the figure. Level 1 has the highest priority and level 5 has the lowest priority.

At level 1, a diagnostic program for the most urgent fault is assigned. This diagnostic program determines whether a hardware failure is caused by the channel side or by the line $41.
It performs a process of diagnosing whether the computer is running or not, and notifying the host of the results.

Level 2 includes character units (byte units) to and from the line.
A program for data transfer processing is assigned. This program has a small number of steps and is given high priority because line operation is fast and overruns occur if the transfer of a previous character is not completed before the next character.

Level 3 includes line and channel side interfaces.

For example, a program for processing a transmission control procedure for each message is assigned for interface control.

At level 4, a supervisor and the like who act as a bridge from level 3 to level 5 are assigned.

Level 5 includes application program level processing, VTAM
Programs such as response processing are assigned.

When a failure occurs in these NCPs, that is, when a particular program enters an infinite loop state, or when it is exclusively used for processing at a particular level and control is not handed over to a lower level for a long time, conventional methods are used. , N.C.
P was unable to detect this by itself and relied on time monitoring using monitor commands from vTAM. However, with time monitoring using VTAM, it is not possible to know which program level of the NCP is looping, and since the monitor command is controlled by software at a considerably higher level, the actual There may be a considerable time lag before the process is executed, leading to concerns that it is unreliable.

[Object and structure of the invention]

An object of the present invention is to provide a means for the NCP itself to detect the loop state of the NCP at each level. In a communication control processing device equipped with an NCP configured by a plurality of programs, there is a counter that counts the number of consecutively running command steps for each priority level, and a counter that counts the number of consecutively running command steps that are allowed for each priority level. and a table means in which an upper limit value of the number of continuous running command steps is registered, and at a given priority level, the counted value of the counter is compared with the upper limit value of the number of consecutive running command steps of the priority level registered in the table means. However, when the count value of the counter exceeds the upper limit of the number of consecutive running command steps, it is determined that an NCP loop attack has occurred.

[Embodiments of the invention]

The details of the present invention will be explained below based on examples.

FIG. 2 is a configuration diagram of one embodiment of the present invention, and in the figure, 1
1 is a control memory in which the NCP is stored, 12 is an address register, 13 is an instruction register, 14 is an instruction execution number counter, 15 is an interrupt display register, 16 is a control unit,
Reference numeral 17 represents a program level register, 18 represents an instruction execution number upper limit value table, and 19 represents a comparison section.

The operation is performed as follows.

The control memory 11 stores programs or seven joules for each level LL of the NCP.

The execution program is selected by the control unit 16, and the instructions are sequentially fetched into the instruction register 13 according to the value set in the address register 12 and executed.

The instruction run number counter 14 counts by 1 each time an instruction is fetched at each program level LL.
Displays the total number of steps R of executed instructions.

When an interrupt occurs, the control unit 16 refers to the interrupt display register 15, identifies the cause of the interrupt, determines its priority 17, and when the interrupt is possible, stores the address of the program that will perform the corresponding process in the address register 1.
2, and further sets the program level Li in the all program level register 17. At the same time, the instruction running number counter 14 is cleared. Thereby, the instruction execution number counter 14 can count the number R of instruction execution steps at the program level to be executed next.

In the instruction execution number upper limit value table 18, an upper limit value M of the total number of instruction execution steps allowed is registered in advance for each program level LL.

The comparator 19 reads the instruction execution number upper limit value M= from the instruction execution number upper limit value table 18 according to the level value L2 of the program level register 17, and compares this with the count value R of the instruction execution number counter ]4. . When R2ML is reached, it is assumed that a loop state has occurred, and an interrupt is generated and a failure occurrence notification (ABEND processing) is performed.

Note that many modifications can be made to the configuration of the embodiment described above.

〔Effect of the invention〕

In this way, the optimal loop detection level for each program level can be set by the number of instruction execution steps, making it possible to reliably detect loops and memory dumping of looping program levels and programs (modules). The reliability of the system can be immediately known by
Maintainability can be improved.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a general configuration of a data communication processing system in a data processing system, and FIG. 2 is a configuration diagram of one embodiment of the present invention. In the figure, 1 is a host, 5 is a CCP, and 6 is an NCP. 11 is a control memory, 14 is an instruction execution number counter, 15 is an interrupt display register, 16 is a control section, 17 is a program level register, 18 is an instruction execution number upper limit value table,
19 represents a comparison section. Patent applicant Fujitsu Limited

Claims (1)

[Claims] An NCP consisting of multiple programs each assigned to one of multiple predetermined priority levels.
A communication control processing device equipped with a counter for counting the number of consecutively running command steps for each priority analysis level, and a table means in which an upper limit value of the allowable number of consecutively running command steps for each priority level is registered. At a given priority level, the counted value of the counter is compared with the upper limit value of the number of consecutive running command steps of the priority level registered in the table means, and the counted value of the counter is determined to be continuous running. When the upper limit of the number of instruction steps is exceeded, N
A loop detection method in an NCP characterized by determining that a loop state of the CP has occurred.