JPH01291338A - Semiconductor device - Google Patents

Abstract

PURPOSE:To simplify the circuit used for programming by utilizing an instruction of the inside of a processor for the programming. CONSTITUTION:A flip-flop circuit 1 outputs a high or low (SS signal) by a pulse signal which is inputted to the inverse of SS pin, and when the SS signal is inputted, an instruction decoder 2 outputs an NOP signal. When the SS signal is inputted, an address generating circuit 4 stops the generation of an address, and holds an address of an instruction which has been executed. Subsequently, an executing unit 5 is programmed against the generated address of the address generating circuit 4 based on the control signal from the instruction decoder 2, and on the other hand, when the NOP signal has been sent out, the operation is stopped. In such a way, a program for a subroutine becomes unnecessary, a program memory area is used effectively, and the circuit is simplified.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device having a single step function for programming.

[Prior art] The single step function is a function used to facilitate program execution tracing.When developing a program such as a micro combi coater, the single step function is used to trace the program operation each time an instruction is executed. Waiting,
It's set.

Here, the microprocessor is, for example, μPD7066.
The case of programming (V2O) will be described.

Normally, as shown in FIG. 4, a subroutine for single-step processing is provided, and information such as internal registers and addresses is traced every time one step of instruction is executed.

[Problems to be Solved by the Invention] Such blockraming has the following drawbacks.

(1) A program area for subroutines such as the single-step processing routine described in ``2'' is required in the program memory of the programming circuit.

(2) As with normal interrupts, it is necessary to save addresses, data, etc. during program execution, and this processing takes time.

(3) This cannot be realized if there is no interrupt function (including hardware such as stack registers).

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device which eliminates the above-mentioned drawbacks and has a simplified programming circuit.

[Means for Solving the Problems] A semiconductor device of the present invention is a semiconductor device for programming an execution unit in a single step, and includes a signal output circuit that outputs a predetermined signal by pulse human power, and a signal output circuit that outputs a predetermined signal by pulse manual power. an address generation circuit that operates to stop generation of addresses and hold the executed address for the execution unit in response to a signal output from the circuit;
The present invention is characterized by comprising an instruction decoder that outputs a stop signal for stopping the operation in the execution unit in response to a signal from the signal output circuit.

[Function] When a predetermined signal is output from the signal output circuit due to pulse input, the address generation circuit stops generating addresses and operates to hold the executed address for the execution unit. By outputting a stop signal that stops the operation in the execution unit, programming is performed in a single step.

[Embodiment] FIG. 1 shows the configuration of a processor to which an embodiment of the semiconductor device of the present invention is applied, and the part inside the broken line constitutes a single step (SS) circuit for single step programming.

1 is a flip-flop circuit, which can be turned high or low (
SS signal) is output. 2 is an instruction decoder, which outputs various control signals based on the instruction code fetched by the fetch unit 3, and also outputs various control signals to the flip-flop circuit 1.
When the SS signal is input from the terminal, the NOP signal is output.

Reference numeral 4 denotes an address generation circuit that generates an address on the address bus, and when the SS signal is input from the flip-flop circuit 1, it stops generating the address and holds the address of the executed instruction. 5 is an execution unit, which is programmed to the generated address of the address generation circuit 4 based on the control signal from the instruction decoder 2. On the other hand, when the NOP signal is sent from the instruction decoder 2, the execution unit 5 suspends operation.

In the above configuration, an interrupt circuit for programming is omitted, but instead a NOP signal is used to halt the operation of the execution unit 5. Also, although the internal trace function has been omitted, basic addresses and data can be observed.

FIG. 2 shows the circuit configuration of the single step circuit, and the same parts as in FIG. 1 are given the same reference numerals. The address generation circuit 4 consists of an address calculation circuit 4a that calculates a jump destination address, etc., and an a-subdown counter 4b that counts the addresses. The instruction decoder 2 is exemplified as a 4-bit one.

FIG. 3 shows an example of the configuration of the execution unit 5, which includes a program ROM 5a, a register 5b, and an operation unit 5C.

In the above circuit configuration, when pin 1 is set low,
When the flip-flop circuit I outputs the low SS signal, the instruction decoder 2 outputs the NOP signal as described above, the execution unit 5 stops operating, and
Address is locked and single step mode (SS
).

When you want to execute the next command, input a high pulse to cabinet p7 with a short width equivalent to the execution of one command and execute only one command.

[Effects of the Invention] As explained above, according to the present invention, since instructions inside the processor are used for programming, there is no need to separately save information such as addresses and data during program execution; does not occur either. In addition, since there is no need for subroutine programs, the program memory area can be used effectively, and the circuit can be simplified, making it easier to use the IC.
This makes it easier to

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of a processor to which an embodiment of the semiconductor device of the present invention is applied, FIG. 2 is a circuit diagram showing the configuration of the non-gle step circuit shown in FIG. 1, and FIG.
FIG. 1 is a block diagram showing the configuration of the execution unit, and FIG. 4 is a diagram showing the conventional single step programming operation. ■・Flip-flop circuit, 2・・Instruction decoder, 3
Fedge unit, 4 Address generation circuit, 5 - Execution unit. Patent applicant Rico Co., Ltd. −

Claims (1)

[Claims] (1) A semiconductor device for programming an execution unit in a single step, which includes a signal output circuit that outputs a predetermined signal in response to pulse input, and stops generation of addresses by the signal output from the signal output circuit. and an address generation circuit that operates to hold an address executed for the execution unit, and an instruction decoder that outputs a stop signal that stops the operation of the execution unit in response to a signal from the signal output circuit. Characteristic semiconductor devices.