JPH01284070A - Picture input device - Google Patents

Abstract

PURPOSE:To eliminate the effect of bit noise and to obtain a picture data with high quality by providing a switching means switching one output of a sampling means or an average data in a prescribed order and outputting an average data at bit noise position of an image sensor. CONSTITUTION:An average picture data (AD+CD)/2 is generated from picture data AD and CD by an arithmetic means 12 applying addition and 1/2 division and the result is inputted to an analog switching means 9 comprising such as element as an analog switch. A sample-and-hold data BD of a middle sample- and-hold circuit 7 is given to a contact S2 of the analog switching means 9 and the analog switching means 9 is thrown to the position of the contact S2 at the normal state without bit noise and the sampling data BD is outputted as a picture data GD3 and the switch means 9 is thrown to the position of contact S1 at the bit noise position of the image sensor and the average data is outputted from the arithmetic means 12 as a picture data GD3. The picture data GD3 outputted in this way is of high quality without effect of bit noise.

Description

[Detailed Description of the Invention] Purpose of the Invention: (Industrial Application Field) This invention eliminates bit noise that is fixedly generated from pixels of an image sensor such as a CCD by taking the average value of sampling data. The present invention relates to an image input device that performs correction.

(Prior Art) FIG. 8 shows a block configuration of a conventional general image input device.

In this image input device, an image lO of a document or the like is optically read by an image sensor (for example, a line sensor) 2 such as a CCD via an optical system l such as a lens. In this case, the image sensor 2 receives a lock signal S as shown in FIG. 2 (B) from the clock circuit 3, and the image sensor 2 receives an image synchronized with the lock signal S as shown in FIG. A signal GS is output. on the other hand,
The clock signal KS is supplied to the phase control circuit 5. The sampling signal ss, which is also input to the image signal GS and shifted by a predetermined phase as shown in FIG. It looks like this. Then, the hold value corresponding to each pixel of the sample hold circuit 6 is output as image data GO.

(Problem to be Solved by the Invention) However, the number of pixels in the image sensor 2 is enormous, and due to manufacturing variations, some pixels may always output a slightly higher (or lower) signal than surrounding pixels. Yes, even when reading an image with uniform density, the image data GS has bit noise NSI and NS2 as shown in Figure 2 (A).
will occur. Then, the image signal GS with the bit noises NSI and NS2 is output to the sample and hold circuit 6.
, the image data GD with noise BNI and BN2 as shown in FIG. 3(C) is output as is. In this case, the magnitude of bit noise is always constant regardless of the density (brightness) of the image 10, so even if the signal level changes high or low like GDA-GD (:), the noise BN
The difference α between the values at each level of I and BN2 and the true value is the same. When an image is reproduced based on the image data GO output in this way, bit noise always occurs from the same pixel of the image sensor 2, so in the case of a line sensor, vertical streak-like unevenness appears in the reproduced image. There is a drawback. Moreover, since the error is always output with the same level difference regardless of the density, the noise B on the image data GD is
It is difficult to remove NI and BN2 with a conventional sensitivity variation correction device (bright area correction device).

This invention was made from the above-mentioned circumstances,
An object of the present invention is to provide an image input device that can remove bit noise generated from fixed pixels of an image sensor and obtain high quality image data.

Structure of the Invention: (Means for Solving the Problems) The present invention relates to an image input device using an image sensor, and the above object of the present invention is to sample analog image signals read by the image sensor in time order. A plurality of sampling means connected in series, a calculation means for adding the outputs of the plurality of sampling means to obtain average data, and a switching means for switching one output of the sampling means or the average data in a predetermined order. ,
This is achieved by outputting the average data at bit noisy positions of the image sensor.

(Function) The image input device of the present invention sequentially inputs analog image signals read by an image sensor to sampling means configured of three stages connected in series, and outputs multiple signals from the preceding and final stages of these sampling means. The effects of bit noise of the image sensor can be reduced by adding together the analog sampling data of the above to create average data, and outputting this average data and the sampling data of the middle sampling means in a predetermined order using the analog switching means. This is done to obtain high-quality image data.

(Embodiment) FIG. 1 shows a block configuration of an image input device that improves the problems of the image input device explained in FIG.
The same members as those in the figures will be described with the same reference numerals.

In this image input device, bit noise position data S corresponding to each pixel position of the image sensor 2 is added to the device shown in FIG.
A memory 4 for measuring and storing D is provided. Further, the clock circuit 3A outputs Sl as a correction signal based on the position data SD stored in the memory 4, and the phase control circuit 5A generates a correction sampling signal 551 based on Sl as the correction signal. The sample and hold circuit 6 is configured to input the signal to the sample hold circuit 6. Note that the memory 4 is configured to store bit noise pixel position data SD obtained by measuring pixel data of the image sensor 2 in advance.

Next, the operation of such an image input device will be explained in FIGS.
) will be explained with reference to the time chart.

As in the case of FIG. 8, the image lO is read by the image sensor 2 via the optical system 1, and the image signal GS is input from the image sensor 2 to the sample and hold circuit 6. Position data SD indicating the bit noises NSI and NS2 is input from the memory 4 to the clock circuit 3A, and at the pixel position corresponding to the bit noises NSI and NS2,
) is input to the phase control circuit 5A, and when the correction signal KSI is input, the phase control circuit 5A does not output S to the clock signal at that timing, as shown in (E) in the same figure. A corrected sampling signal SS1 is input to the sample hold circuit 6. In other words, in this example, the correction signal shown in FIG. 2(D) corresponding to the bit noises NSI and NS2 in FIG. 2(A) is
The corrected sampling signal SS1 shown in E) is input to the sample hold circuit 6, the bit noise NSI and the image signal GS of NS2 are not sampled, and the value held by sampling the data of the previous pixel is output as is. . Thereby, the influence of bit noise is removed from the output signal. Therefore, the image data GDI output from the sample and hold circuit 6 becomes uniform with the noises BNI and BN2 removed, as shown in FIG. becomes.

However, in the above-mentioned image input device, the third image input device is
When an image signal GSI having a slope as shown in the figure (^) is input, the slope part of the image signal GSI is as shown in the figure (^).
C) Corrected sampling signal S corresponding to bit noise
The pulse SSP of Sl is not sampled, and the sample and hold signal of the previous pixel is output as is as image data. As a result, there is a problem in that image data GO2 having a large step at the position FD corresponding to the bit noise is output as shown in FIG. 2B.

Therefore, in order to make the image input device compatible with the uniform and flat image signal GS and the image signal GSI having a slope, the image input device of the present invention
The average value of the sampling data of I is calculated and this data is output as image data at the bit noise position. As a result, parts with bit noise are averaged out, and the output image data is of high quality.

For example, to create image data GD3 from the image signal GS2 as shown in FIG. 4, the image signal GS2 is sampled in a predetermined preceding and following interval. In other words, the image data AD and CD are obtained by sampling the point PI-P2,
After adding these image data AD'Et and CD, this data is halved and the image data of the central PC (AD+C
D)/2 is obtained. Then, this image data (AD+CD
)/2 at the bit noise position of the image sensor, it is possible to output image data that is not affected by bit noise.

FIG. 5 shows the basic configuration of an image input device of the present invention having such a function. In this device, when an image signal GS2 as shown in FIG. 4 is input to analog sample-hold circuits 6 to 8 connected in series in three stages, sampling is performed sequentially in each sample-and-hold circuit 6 to 8. , the front and rear sample and hold circuits 6 explained above
The image data AD-CD sampled at 8 and 8 is output. Then, from the image data AD and CD, average image data (AD+CD)/2 is created by arithmetic means 12 that performs addition and division by 1/2, and is inputted to analog switching means 9 having an analog switch configuration, for example. The sampling data BD of the sample hold circuit 7 in the middle is input to the contact S2 of this analog switching means 9, and in normal times when there is no bit noise, the analog switching means 9
is connected to contact S2, and the sampling data BD
is output as image data GD3, the contact point Sl is switched at the bit noise position of the image sensor, and the average data from the calculation means 12 is output as image data GD3. The image data GD3 output in this way is
The result is high quality without the influence of bit noise.

FIG. 6 shows a block configuration of an image input device of the present invention embodying the above-described principle, and the same members as those in FIG. 1 will be described with the same reference numerals.

In this image input device, the image sensor 28 is configured with a combination of two series, and read data is output separately for, for example, odd-numbered pixels and even-numbered pixels. That is, when the lock signal φ1 as shown in FIG. 7(A) is input from the clock circuit 3B, two analog image signals 051.
52 is output. On the other hand, a lock signal 5PLS as shown in FIG. Phase control circuit 5B.

5C outputs sampling signals SPI and SF3 shifted by a predetermined phase as shown in FIG. In the image input device of the present invention, the image signals O51 and O52 are each sent to analog sample and hold circuits 68 to 8A connected in series in three stages.

6B to 8B, these image signals 051 and 052 are sampled and then added, and data processing is performed in the same manner as the image data ADNCD explained with reference to FIG. The image signal OSI is input to the sample and hold circuit 6A, and sampled based on the sampling signal SP2, and analog image data DI as shown in FIG. 3E is inputted to the sample and hold circuit 7A. The image data DI is sampled based on the sampling signal SPI, and analog image data 02 as shown in FIG.
It is input to A. Image data D2 is sampling signal S
P2 is sampled, and analog image data D3 as shown in FIG. 3(E) is output. On the other hand, the image signal O52 is also supplied to the sample hold circuits 6B to 8 similar to those described above.
Sequentially input to B, sampling signals SPI, SF3
Analog image data D4 to D6 as shown in the figure (ε) are output. Image data DI and D6 are added via resistors R1 and R6, and the image data (
Added image data D7 as shown in F) is created. Image data D2. D5 are added via resistors R2 and R5, respectively, to create added image data D8 as shown in FIG. Also, image data D3. D4 is each resistor R3
The images are added together via R4, and added image data D9 as shown in FIG. 3(F) is created. Then, the added image data D7
~D9 are input to an analog switch circuit 9A having switches 51~S3 inside. In the analog switch circuit 9^, the switches 51 to S3 are controlled by switching signals KSI to
The switching is made based on S3. Here, similarly to the principle explained in FIG. 5, switches 5l-53 are switched at predetermined timing, and the added image data 07 to
09 is added to create average value data, which is sequentially output as image data 010 as shown in FIG.

Thereafter, the image signals 051 and 052 sequentially inputted from the image sensor 2A are data processed in the same manner as described above, and high quality image data DIG without bit noise is obtained. In other words, with this device, the image signal GS as shown in Figure 2 (^)
However, high-quality image data C without the influence of bit noise
It has the characteristic that DI can be obtained.

Effects of the invention: According to the image input device of the present invention, the influence of bit noise of the image sensor, which could not be removed with conventional devices, is completely removed, and even if an image signal with a slope is input, the output signal is Since it is not affected by sampling, it has the advantage that high-quality image data can always be obtained. Moreover, it has the advantage of a simple device configuration and low cost.

[Brief explanation of the drawing]

Figure 1 is a block configuration diagram of an image input device that is an improved version of the conventional device, Figures 2 (A) to (F) are time charts showing examples of signal waveforms, and Figures 3 (^) to (C) and 4. 5 is a diagram showing an example of a signal waveform for explaining the present invention, FIG. 5 is a principle diagram of the inventive device, FIG. 6 is a block configuration diagram showing an embodiment of the image input device of the present invention, and FIG. (A1-(F
) is a diagram showing an example of the signal waveform, and FIG. 8 is a diagram showing a conventional general image input device. 1... Optical system, 2.2A... Image sensor, 3.
3A. 3B...Clock circuit, 4...Memory, 5.58,
5B, 5G...phase control circuit, 6.6A to 8A, 68
~8B... Sample hold circuit, 9A... Analog switch circuit, 10... Image, 11... Switching signal generation circuit. Applicant's agent Yuzo Yasugata 1st session//1

Claims (1)

[Claims] 1. A plurality of serially connected sampling means for sampling analog image signals read by an image sensor in time order, a calculation means for adding the outputs of the plurality of sampling means to obtain average data, and the sampling means or a switching means for switching the average data in a predetermined order, and outputs the average data at a bit noise position of the image sensor.