JP2902520B2 - Video signal processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal processing apparatus suitable for use in a liquid crystal display device such as a liquid crystal television and a liquid crystal projection, and more particularly to a video signal processing apparatus in which the level of an inverted video signal and the level of a non-inverted video signal are always kept equal. The present invention relates to a signal processing device.

[0002]

2. Description of the Related Art FIG.
It is configured as shown in FIG.

In FIG. 4, 1 is an input terminal, 2 is an inverting amplifier, 3 is an analog switch, 4 is a buffer, 5 is an output terminal, and 6, 7, and 8 are resistors for determining the inverted video signal level of the inverting amplifier 2. is there.

In the video signal processing apparatus constructed as described above, the non-inverted video signal input to the input terminal 1 is inverted and amplified by the inverting amplifier 2, and the inverted and inverted video signal is combined with the non-inverted video signal. The signal is switched by the analog switch 3 at the cycle of the inversion pulse n and output to the output terminal 5 through the buffer 4, and the liquid crystal display panel or the like is driven via a driver or the like to display a predetermined image on the liquid crystal display panel. .

[0005]

In the conventional video signal processing device constructed as described above, since the gain of the inverting amplifier 2 is determined (set) by the resistors 6, 7, and 8,
If the resistance value varies, it becomes a gain error, and a level difference may occur between the level of the inverted video signal and the level of the non-inverted video signal, thereby generating a direct current in the liquid crystal display panel of the liquid crystal display device, There were drawbacks that had an adverse effect.

[0006]

The video signal processing apparatus according to the present invention eliminates the above-mentioned drawbacks, adds and combines an inverted video signal and a non-inverted video signal, and adjusts the level of the pedestal position of the synthesized signal. In the case where there is a difference between the level of the synchronous position and the level of the synchronous position, the level of the inverted video signal and the level of the non-inverted video signal are always kept equal by varying the gain of the inverting amplifier with a control signal corresponding to the difference.

[0007]

The present invention has the above-described structure,
The level of the inverted video signal and the level of the non-inverted video signal can be accurately equalized.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of a video signal processing apparatus according to the present invention will be described below with reference to FIGS. FIG. 1 is a block diagram showing an embodiment of a video signal processing apparatus according to the present invention, and FIG. 2 is a specific circuit diagram of FIG. FIG. 3 is FIG.
3 is a waveform chart of each part of FIG. 2 and FIG.

1 and 2, reference numeral 11 denotes an input terminal;
12 is a gain inverting amplifier, 13 is a gain control voltage generating circuit,
14 is a buffer, 15 is an analog switch, 16 is a buffer, 17 is a buffer, 18 and 19 are analog switches, 20 and 21 are buffers, 22 is an operational amplifier, and 23 and
Reference numerals 24, 25, and 26 denote capacitors and resistors constituting the sample and hold circuit, and reference numerals 27 to 32 denote resistors.

In FIG. 3, a and c are non-inverted video signals, b is an inverted video signal, d is an inverted pulse, e is an output video signal, f is a first sample and hold pulse, and g is a second sample and hold pulse. FIG. 3 is a waveform diagram of the position of each part in FIGS. 1 and 2;

Next, an operation state of the video signal processing apparatus having the above configuration will be described with reference to FIGS.

The non-inverted video signal a input to the input terminal 11 is inverted by the gain inverting amplifier 12 and taken out as an inverted video signal b, and is subjected to impedance conversion in the buffer 14 and taken out as a non-inverted video signal c. The extracted inverted video signal b and the non-inverted video signal c are added and synthesized by the same resistance values 27 and 28, impedance-converted by the buffer 17, and applied to the analog switches 18 and 19, respectively.

Each of the analog switches 18 and 19 is closed at the timing of each of the sample and hold pulses f and g, and the inverted video signal b and the non-inverted video signal c output only when each of the analog switches is closed. Is a capacitor 23, a resistor 2
4, sample-and-hold circuits constituted by a capacitor 25 and a resistor 26 are applied to the buffers 20 and 21 respectively.

Each signal whose impedance has been converted by each of the buffers 20 and 21 is applied to an operational amplifier 22 through resistors 29 and 30, and is subjected to arithmetic processing by the operational amplifier 22 to obtain a gain of the variable gain inverting amplifier 12. Is output, and the gain of the variable gain inverting amplifier 12 is controlled so that the outputs of the buffers 20 and 21 become equal, that is, the step of the synchronous portion is eliminated in the waveform of the comparison signal i. .

[0015]

Since the video signal processing apparatus of the present invention has the above-described configuration, it is possible to obtain a highly accurate inverted video signal, and the inverted video signal and the non-inverted video signal are maintained at the same level. Thus, the reliability of the liquid crystal display panel can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a video signal processing apparatus according to the present invention.

FIG. 2 is a specific circuit configuration diagram of FIG.

FIG. 3 is a waveform chart of each part in FIGS. 1 and 2;

FIG. 4 is a block diagram showing an embodiment of a conventional video signal processing device.

[Explanation of symbols]

 12 Variable gain inverting amplifier 22 Operational amplifier a, c Non-inverted video signal b Inverted video signal

Claims (1)

(57) [Claims] 1. An inverting amplifying means for changing a gain and inverting a video signal, an adding and synthesizing means for adding and synthesizing an inverted signal of the inverting amplifying means and a non-inverted video signal at the same ratio, and Sample and hold each of the synchronizing signal position and the pedestal position of the addition / synthesis output, calculate each sampled and held signal, and, in accordance with each difference, calculate and amplify means for controlling the gain of the inverting amplifying means; Wherein the level of the inverted signal is always maintained at the same level as the non-inverted video signal.