JPH01281546A - Error detector for bit map memory - Google Patents

Abstract

PURPOSE:To detect an error by the minimum memory capacity by using a check sum memory with small capacity to detect a data error synchronously with the reading of display data. CONSTITUTION:Display data are read out by a display reading circuit 3 synchro nously with the raster scanning of a CRT and in address is outputted from the circuit 3 to a bit map memory 2 and the check sum memory 5. At that time, data in the memory 2 are successively outputted. The outputted data are outputted to a display through a display interface 4, a bit value '0' or '1' to be used for check sum is counted up by a counter 15 and added by an adder 16, the added value is stored in a register 14, and a bit count value is found out by successively repeating addition and outputted to a comparator 8. The comparator 8 compares the check sum value obtained from the memory 5 with the bit count value, and at the time of discrepancy of both the values, informs the generation of a data error.

Description

[Detailed Description of the Invention] [Summary] This relates to a bitmap memory error detection device that detects data errors in a bitmap memory used in a bitmap display using a raster scanning method. A checksum memory that stores the number of 1 or O bits for each line of the bitmap memory as a checksum value; a checksum update circuit that updates the checksum value in the checksum memory during drawing; a counter that counts the number of 1 or 0 bits in one line in synchronization with reading display data from the bitmap memory; and a counter for each line. a comparison circuit that compares the bit count value measured by the counter and the checksum value of the checksum memory at each time;
It was composed of

[Field of Industrial Application] The present invention relates to a bitmap memory error detection device for detecting data errors in a bitmap memory used in a bitmap display using a raster scanning method.

A bitmap display device using the raster scanning method has a display bitmap memory that corresponds one-to-one to the display screen, reads out memory data in synchronization with raster scanning, and displays pixel data according to this data. The brightness was determined.

Therefore, it is possible to display characters, figures, images, etc. using the data written to the bitmap memory.

In recent years, the resolution of display screens has improved, and the number of display pixels has increased to 204.
An 8x204a dot bitmap display device has also been announced, and there is a need for even higher resolution. Therefore, as the resolution increases, the capacity of the bitmap memory for storing screen data also increases.

By the way, if a data error such as a parity check occurs in the bitmap memory, discontinuous bright spots will appear on the screen, giving an unpleasant feeling to the operator. Therefore, it is necessary to reliably detect data errors in bitmap memory and take early action.

[Prior Art] Conventionally, a detection device for detecting data errors such as a parity check of a bitmap memory requires an increase in memory capacity, requires bit-by-bit rewriting, and detects data errors when a data error occurs. , it was not provided for the reason that it could be confirmed on the screen.

[Problems to be Solved by the Present Invention] However, when a data error such as a parity check actually occurs in the bitmap memory, discontinuous bright spots appear on the display screen, causing problems when the screen data is repeatedly used. Error data is displayed forever, which makes the operator feel uncomfortable.

As a result, there has been a problem in that data errors cannot be dealt with early and the reliability of the device cannot be improved.

The present invention has been made in view of the above-mentioned conventional problems, and provides a detection method that takes advantage of the characteristics of bitmap memory and detects data errors in bitmap memory by adding a minimum amount of memory. The purpose is to

[Means to solve the problem] FIG. 1 is a basic configuration diagram of the present invention.

In FIG. 1, a checksum memory 5 stores the number of 1 or 0 bits for each line of the bitmap memory 2 as a checksum value.

A checksum update circuit 6 updates the checksum value in the checksum memory 5 during drawing. A counter 7 counts the number of 1 or O bits in one line in synchronization with the readout of display data from the bitmap memory 2. A comparison circuit 8 compares the bit count value measured by the counter 7 and the checksum value of the checksum memory for each line.

[Operation] In the present invention, the data in the checksum memory 5, which stores the number of bits of "OH" or "1" for each line as a checksum value, is updated when the data of the drawing processor 1 is rewritten, and Using the display read data, count the number of bits for each line with the counter 7,
This bit count value and the checksum value are compared by a comparison circuit 8, and if the two do not match, a data error is detected.

Therefore, by using the checksum memory 5 having a small capacity, it is possible to easily detect data errors in bit-by-bit writing for each line pixel of a CRT. As a result, even if discontinuous bright spots appear on the screen, it can be dealt with quickly, and the reliability of the device can be improved.

[Example] Embodiments of the present invention will be described below based on the drawings.

FIG. 2 is a circuit block diagram showing one embodiment of the present invention.

First, to explain the configuration, in FIG. 2, 1 is a drawing processor that rewrites data in the bitmap memory 2, and this drawing processor 1G4 bitmap memory 2
Write a character pattern on top and draw a straight line.

Reference numeral 3 denotes a data successive output circuit for display; the display data reading circuit 3 reads data from the bitmap memory 2 in synchronization with the raster scanning of the CRT, and transfers it to the display via the display interface 4. The data read from the bitmap memory 2 is converted into a CRT display data format by a display interface 4 and output to the display.

Reference numeral 2 denotes the bitmap memory, which stores data that corresponds one-to-one to each dot on the display screen.

That is, the bitmap memory 2 stores the data according to instructions from the drawing processor 1, and outputs the data to the display interface 4 according to instructions from the display data reading circuit 3. Note that the capacity of the bitmap memory 2 may be increased depending on the size of the display screen.

5 is a checksum memory; checksum memory 5
is “1” or “0” for each line of bitmap memory 2.
'' is stored as the checksum value. Therefore, the capacity of the checksum memory 5 is 1.
It is sufficient to have a capacity that can express the number of bits of the line.

6 is a checksum update circuit, and the checksum update circuit 6 updates the data in the checksum memory 5 when the drawing processor 1 rewrites the data in the bitmap memory 2.

7 is a bit number counter, and the counter 7 is synchronized with the readout of display data by the display data readout circuit 3.
The bit error of either "0" or "01" in the display line is measured and the counted bit count value is output.

Reference numeral 8 denotes a comparison circuit (comparator), which detects a data error by comparing the bit memory value measured by the counter 7 and the checksum value of the checksum memory 5 when the comparison circuit 8 finishes displaying one line. .

Next, the effect will be explained.

First, the operation when the drawing processor 1 writes data will be explained based on FIG.

In FIG. 3, first, the drawing processor 1 outputs an address for accessing data to the comparator 9, the bitmap memory 2, and the checksum memory 5.

The comparator 9 outputs a signal to the drawing processor 1 to stop writing when the number of lines of drawing points from the drawing processor 1 matches the number of display lines input separately. This is to prevent the data from being updated while it is being checked.

Next, the drawing processor 1 reads the checksum value of the line of the checksum memory 5 that the drawing processor 1 is trying to access, reads the data at the access position of the bitmap memory 2, and calculates the number of bits that are 'O' or '1' by the counter 10. Count with .

Next, the count value counted by the counter 10 is subtracted by the subtracter 11 from the current checksum value of the checksum memory 5, and this subtracted value and the count value counted by the counter 12 of the new input data are added to the adder. After adding in 13,
This added value is stored in the checksum memory 5 to update the checksum value, and on the other hand, the writing of data in the bitmap memory 2 is updated.

Next, the data error detection operation will be explained based on FIG.

In FIG. 4, reading of display data by the display successive circuit 3 is always performed in synchronization with raster scanning of the CRT, and addresses are output from the display successive circuit 3 to the bitmap memory 2 and checksum memory 5. Ru.

Here, register 14 is cleared at the start of line scanning,
According to the scan, the data in the bitmap memory 2 is sequentially output. The output data is output to the display via the display interface 4, and the counter 15 counts the bit value ("Ote" or "1") that is the target of the checksum in this read data, and the adder 16 and stored in the register 14, the addition is repeated sequentially to obtain a bit count value, and the bit count value is output to the comparator 8.

A checksum value is input from the checksum memory 5 to the comparator 8, and the comparator 8 compares this checksum value with the bit count value, and if the two do not match,
Notify when a data error occurs.

Note that as an initial operation, the bitmap memory 2 and checksum memory 5 are initialized.

As described above, in this embodiment, since data errors are detected every time the CRT is scanned, data errors can be easily detected. in this case,
Even when the data of the drawing processor 1 is written into the bitmap memory 2 in units of bits, this can be easily handled because the number of bits is counted.

Furthermore, since the checksum value is determined for each line, the capacity of the checksum memory 5 can be small.

[Effects of the Invention] As described above, according to the present invention, data errors can be easily detected for each line scan of a CRT using a checksum memory having a small capacity.

As a result, even if discontinuous bright spots appear on the screen, it can be dealt with quickly, and the performance of the device can be improved.

[Brief Description of the Drawings] Fig. 1 is a basic configuration diagram of the present invention; Fig. 2 is a circuit block diagram showing an embodiment of the present invention; Fig. 3 is an explanatory diagram illustrating the operation during a write cycle; FIG. 4 is an explanatory diagram illustrating the data error detection operation. In the figure, 1...Drawing processor, 2...Bit map memory, 3...Continuous display circuit, 4...Display interface, 5...Checksum memory, 6...Checksum update Circuit, 7.10,12,15...Counter, 8.9...Comparator, 11...Subtractor, 14...Register, '13.16...Adder. )#Groove surface Figure 1

Claims (1)

[Claims] A checksum memory (5) stores the number of 1 or 0 bits for each line of the bitmap memory (2) as a checksum value, and the checksum memory (5)
Checksum update circuit ( ) that updates the checksum value of )
6), a counter (7) that counts the number of 1 or 0 bits in one line in synchronization with the reading of display data from the bitmap memory (2), and a counter (7) for each line.
) A comparison circuit (8) that compares the bit count value measured by the checksum memory (5) with the checksum value of the checksum memory (5).
A bitmap memory error detection device comprising: