JPH01274530A - Digital radio repeat system - Google Patents

Abstract

PURPOSE:To reduce the entire synchronizing restoration time by sending a reception signal as it is without applying branch of additional bit, insertion, error correction, decoding or coding if frame synchronization is unlocked and allowing each station succeeding to an intermediate repeater station to execute it operation at out of synchronism. CONSTITUTION:Intermediate repeater stations B-F are provided between a sending end radio terminal station A and a receiving end radio terminal station G to form a digital radio repeat system. Through the constitution above, if frame out of synchronism takes place in the relay station C due to a fading between the stations B and C, the reception signal from the station C is sent as it is to succeeding stations and the stations D to G receive the signal in the station of out of synchronism. When the fading is restored, a frame synchronizing circuit of the station C starts synchronizing locking and the succeeding station D continues the reception under the condition of not applying forward error connection, branch and insertion of additional bit till the synchronization is established. When the synchronization is established again, branching or the like is restarted and the state is restored to the usual state.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital radio relay system, and particularly to a digital radio relay system that performs error correction.

[Conventional technology]

In digital wireless communication systems, signals to be transmitted are framed in order to time-division multiplex multiplex and other additional bits for line monitoring and control onto main data signals and transmit them. In such digital wireless communication systems, forward error correction is used to encode signals to be transmitted into block codes for error correction, transmit them, and correct errors during decoding.
When applying FEC), two methods are used: a method in which framing and encoding are performed at independent timings, and a method in which they are performed at a common timing.

The former method has the advantage that the frame length and code length can be set independently, but it requires speed conversion to provide time slots for inserting additional bits when framing, and time slots for redundant bits when encoding. It requires two stages of speed conversion to provide time slots, and the receiving side must perform frame synchronization and code synchronization independently, making the hardware complex. On the other hand, in the latter method, time slots for additional bit insertion and redundant bits are provided in one speed conversion, and frame synchronization also serves as code synchronization, so there is no need for hardware. becomes easier.

In a digital wireless relay system that uses common frame synchronization and code synchronization, a frame synchronization circuit detects a frame synchronization bit included in a received signal and generates a synchronization pulse.
Using this synchronization pulse as a time reference, the time positions of additional bits and redundant bits are known.

The received signal is FEC-decoded, additional bits are dropped and inserted, and FEC-coded to become a transmission signal.

In the conventional digital radio relay system, even if frame synchronization is lost and synchronization pulses with correct timing cannot be obtained, additional bits can be dropped, inserted, and FEC decoded.
Encoding was performed with each synchronization free-running.

FIG. 2 is an explanatory diagram showing a general configuration example of a digital wireless communication system.

Intermediate relay stations B-F, which are sequentially arranged between transmitting-end wireless terminal station A and receiving-end wireless terminal station G, use the conventional digital wireless relay method described above, and fading between intermediate relay stations B and C is prevented. Assume that the intermediate relay station C cannot detect the frame synchronization bit and loses frame synchronization. At this time, the frame synchronization is also lost in the subsequent intermediate relay station DF and receiving end wireless terminal station G.

Assume that when fading is recovered thereafter, the free run phase of frame synchronization at intermediate relay station C and each subsequent station deviates from the correct phase by one time slot or more. Intermediate relay station C requires a certain amount of time (synchronization pull-in time) after recovery from fading until frame synchronization is re-established.

During this time, branching, insertion, FEC decoding, and encoding of the additional bits are performed in the wrong phase at the intermediate relay station C, so the signal sent to the intermediate relay station does not contain the correct frame synchronization bit. . Only after frame synchronization is re-established at intermediate relay station C does the intermediate relay station receive a signal containing the correct frame synchronization bits, frame synchronization pull-in is started, and after the synchronization pull-in time, frame synchronization is performed at the intermediate relay station. Synchronization is reestablished. The same process is repeated thereafter, and finally frame synchronization is re-established at the receiving end wireless terminal station G.

[Problem to be solved by the invention]

In the conventional digital radio relay system described above, the frame synchronization of the final station is not re-established until the sum of the synchronization pull-in times of the intermediate relay station that lost frame synchronization and each subsequent station has elapsed. The drawback is that the frame synchronization recovery time as a whole is long.

An object of the present invention is to provide a digital radio relay system that shortens the frame synchronization recovery time of the entire digital radio communication system.

[Means to solve the problem]

The digital radio relay system of the present invention is a digital radio relay system that uses common frame synchronization for dropping and inserting additional bits and code synchronization for error correction decoding and encoding. When the error occurs, the received signal is sent out as it is without performing the branching and insertion of the additional bits and the error correction decoding and encoding.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram illustrating an intermediate relay station according to an embodiment of the present invention. In addition, in FIG. 1, the radio part and the modulation/demodulation part are omitted.

The intermediate relay station shown in Figure 1 detects the frame synchronization bit from a received signal that has been framed including the frame synchronization bit, additional bits have been inserted, and FEC encoded at the same timing as the frame formation timing. a frame synchronization circuit 1 which generates a synchronization pulse by detecting a frame synchronization bit and stops outputting the synchronization pulse when a frame synchronization bit cannot be detected;
an FEC decoding circuit 2 that performs code synchronization with the received signal using the input synchronization pulse as a time reference, performs FEC decoding on the received signal, and outputs the received signal as is if no synchronization pulse is input;
A branch/insert circuit that branches and inserts additional bits into the output signal of the FEC decoding circuit 2 using the input synchronization pulse as a time reference, and outputs the output signal, and if no synchronization pulse is input, outputs the additional bit as it is without branching or inserting it. 3, and an FEC encoding circuit 4 which performs FEC encoding on the output signal of the branch/add circuit 3 using the input synchronization pulse as a time reference, and outputs it as a transmission signal without performing FEC encoding if the synchronization pulse is not input. It is configured.

If the quality of the received signal at the intermediate relay station shown in FIG. 1 is normal and the frame synchronization circuit 1 outputs a synchronization pulse, the error will be corrected by FEC decoding and additional bits will be branched and inserted. , is FEC-encoded again to become a transmission signal. When the quality of the received signal deteriorates and the frame synchronization circuit 1 is unable to detect the frame synchronization bit (frame synchronization is lost), the received signal becomes the transmission signal as it is.

In the digital wireless communication system shown in Fig. 2, the intermediate relay stations shown in Fig. 1 are used as intermediate relay stations B to F, and frame synchronization occurs at intermediate relay station C due to fading between intermediate relay stations B and C. Suppose it comes off. At this time,
Since the intermediate relay station C sends the received signal as it is to the intermediate relay station, the frame synchronization is also lost at the intermediate relay station, and in the same way, the frame synchronization is also lost at the intermediate relay stations E, F and the receiving end wireless terminal station G.

After that, when the fading is recovered, the frame synchronization circuit l of the intermediate relay station C starts pulling in frame synchronization. Until this frame synchronization is re-established, the intermediate relay station receives a normal signal, except that FEC is not performed at intermediate relay station C and no additional bits are dropped or inserted. In the same manner, each subsequent station receives a normal signal, except that FEC is not performed in each preceding station after intermediate relay station C, and additional bits are not added/dropped. Therefore, (ignoring propagation delays between each station) the intermediate relay station and each subsequent station start pulling in frame synchronization at the same time and in parallel with the intermediate relay station C. When the synchronization pull-in time has elapsed at the intermediate relay station C and each subsequent station, frame synchronization is re-established in the frame synchronization circuit 1 of each station, and synchronization pulses are output, FEC and branching and insertion of additional bits at each station are also restored. and it will be executed normally.

〔Effect of the invention〕

As explained above, the present invention transmits the received signal as it is without performing branching, insertion, error correction decoding, or encoding of additional bits when the frame synchronization is lost. The intermediate relay station and each station that is out of frame synchronization following the intermediate relay station can start pulling in frame synchronization simultaneously and in parallel, which has the effect of shortening the frame synchronization recovery time for the digital wireless communication system as a whole.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an intermediate relay station according to an embodiment of the present invention, and FIG. 2 is an explanatory diagram showing a general configuration example of a digital wireless communication system. 1...Frame synchronization circuit, 2...FE
C decoding circuit, 3...branch/insertion circuit, 4...
...FEC encoding circuit. Agent Patent Attorney Uchihara Syllable 1 Diagram A: Sending @Reijohan Bureau, 5-F Okimachusha Bureau Diagram Z q: Uketate Kakerouhan

Claims (1)

[Claims] In a digital radio relay system that shares frame synchronization for dropping and inserting additional bits and code synchronization for error correction decoding and encoding, the additional bits are dropped when the frame synchronization for the received signal is lost. A digital radio relay system characterized in that the received signal is transmitted as it is without performing the insertion and the error correction decoding and encoding.