JPH01272152A - Semiconductor element with guard ring - Google Patents

Abstract

PURPOSE:To deepen diffusion depth without depending upon a thermal diffusion process for a prolonged term, and to increase breakdown strength by forming a guard ring in dig-in type structure. CONSTITUTION:A surface film 3 composed of an oxide film is shaped onto the surface of an N<-> type semiconductor, substrate 1, the surface film 3 on guard rings 4a, 4b, 4c is removed through etching, etc., and concentric opening windows are formed. The semiconductor substrate 1 is etched through the opening windows, and grooves 2a, 2b, 2c are shaped first. P<+> type impurity diffusion layers are formed to dug-in each groove 2a, 2b, 2c to acquire the guard rings 4a, 4b, 4c while a P<+> type impurity diffusion layer 5 is also shaped at a central section, thus forming a main junction. Polycrystalline silicon 6a, 6b, 6c are buried into each groove 2a, 2b, 2c, and respective groove 2a, 2b, 2c is filled back, thus reducing the effect of the contamination of the guard rings 4a, 4b, 4c by a resist, etc.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a semiconductor element having a guard ring, and is applied to high-voltage diodes, transistors, thyristors, and the like.

[Prior Art] Conventionally, it has been proposed to form a guard ring to surround the main junction in order to increase the breakdown voltage of a semiconductor element (
(Special Publication No. 40-12739).

FIG. 2 is a diagram showing a cross-sectional structure of a diode having a guard ring. A P-type diffusion layer 5 is formed on an N-type semiconductor substrate 1, forming a main junction of the diode. A plurality of guard rings 4a, 4b, and 4e made of P1 type diffusion layers are formed concentrically to surround this main junction. Such guard rings 4a, 4b,
4c was formed by opening concentric diffusion windows on the surface of the semiconductor substrate 1 and performing thermal diffusion.

[Problems to be Solved by the Invention] In the above structure, in order to achieve high breakdown voltage, it is necessary to: 1) increase the resistivity of the semiconductor substrate 1, 2) guard rings 4a and 4b.
, increase the diffusion depth t of 4c, ■ guard ring 4a,
Increase the number of 4b and 4c, ■ Guard rings 4a and 4b
, 4c intervals d, , d2. It is conceivable to optimize d according to the above-mentioned items (1) and (2). However, if there are constraints such as, for example, the resistivity of the semiconductor substrate 1 cannot be changed due to the quality of the semiconductor element, or the area of the chip cannot be easily increased due to the cost of the semiconductor element, then The countermeasures are difficult to implement, and guard rings 4a and 4 of
It is conceivable to increase the diffusion depth t of b and 4c. However, when the guard rings 4m, 4b, and 4c are formed by thermal diffusion as in the past, there is a problem that the drive (diffusion) time becomes extremely long if the diffusion depth L is increased. was there. By the way, when the thermal diffusion temperature is 1150°C, the diffusion time is about 4 hours to make the diffusion depth 9μ, but the diffusion time is about 20 hours to make the diffusion depth 15μ. Diffusion depth is 20μm
To do so, the diffusion time would be approximately 45 hours, which would be difficult to implement in reality.

The present invention has been made in view of these points, and its purpose is to achieve deep diffusion of the guard ring by digging into the semiconductor substrate, and to have a guard ring that enables high breakdown voltage. The purpose of the present invention is to provide semiconductor devices.

[Means for Solving the Problems] In the present invention, in order to solve the above problems, the first
As shown in Figure (b), a semiconductor substrate 1 of a first conductivity type has a main junction in which a diffusion layer 5 of a second conductivity type is formed on one surface side, and a diffusion layer 5 of a second conductivity type is formed around this main junction. Totally surrounding the second
A plurality of guard rings 4a, 4 made of diffusion layers of a conductivity type of
b, 4c, the guard ring 4
It is characterized in that a, 4b, and 4c have a recessed structure.

Furthermore, in the above structure, the dug guard rings 4a, 4b, 4c may be backfilled with polycrystalline silicon 6a, 6b, 6c, as shown in FIG. 1(c).

[Function] In the present invention, as described above, the guard rings 4a, 4
Since b and 4c have a dug-in structure, the diffusion depth can be increased without using a long thermal diffusion process, and therefore a high breakdown voltage can be achieved. Furthermore, by backfilling the dug guard rings 4a, 4b, 4c with polycrystalline silicon 6m, 6b, 6e, contamination by resist and thermal deformation of the semiconductor substrate 1 can be prevented, and the reliability of the semiconductor device can be improved. It is expensive.

[Example] FIGS. 1(a) to 1(c) are diagrams showing the manufacturing process of a semiconductor element having a guard ring according to the present invention. After forming a surface film 3 made of an oxide film such as silicon dioxide on the surface of the N-type semiconductor substrate 1, guard rings 4a, 4b,
The surface film 3 on 4c is removed by etching or the like to form concentric opening windows.

Etching the semiconductor substrate 1 through this opening window,
First, as shown in Fig. 1(a), 2 m and 2 b.

2c is obtained. Here, the etching method may be wet etching or dry etching, and the method is not limited. Next, a P-type impurity diffusion layer is formed in each of the etched sides 2a, 2b, and 2c. In addition to forming guard rings 4a, 4b, and 4c, a P-type impurity diffusion layer 5 is also formed in the center to form a main junction, thereby obtaining the structure shown in FIG. 1(b). .

By the way, this carved guard ring 4a.

If 4b and 4c are left exposed, each groove 2a
Contaminants such as resist may be trapped in +2b and 2c, or the semiconductor substrate 1 may be deformed or warped due to thermal history in subsequent steps. Therefore, as shown in FIG. 1(e), polycrystalline silicon 6a, 6b, 6c was filled in each groove 2a, 2b, 2c, and each groove 2
It is preferable to backfill a, 2b, and 2c. If this is done, guard rings 4a,
The influence of contamination on 4b and 4c is reduced, the mechanical strength of the semiconductor substrate 1 is improved, thermal deformation is reduced, and the reliability of the semiconductor element is improved.

[Effects of the Invention] In the semiconductor device having the guard ring according to the present invention, since the guard ring has a dug-in structure, the diffusion depth can be increased without using a long thermal diffusion process. Therefore, there is an effect that it becomes possible to increase the withstand voltage.

Furthermore, if the dug-out guard ring is backfilled with polycrystalline silicon, it is possible to prevent contamination by resist and thermal deformation of the semiconductor substrate, which has the effect of increasing the reliability of the semiconductor element.

[Brief explanation of the drawing]

FIGS. 1(a) to 1(c) are cross-sectional views showing the manufacturing process of an embodiment of the present invention, and FIG. 2 is a cross-sectional view of a conventional example. 1 is a semiconductor substrate, 2 a, 2 b, 2 e are grooves, 3
4a, 4b, and 4c are guard rings; 5 is a diffusion layer; and 6a, 6b, and 6c are polycrystalline silicon.

Claims (2)

[Claims] (1) A main junction in which a diffusion layer of a second conductivity type is formed on one surface side of a semiconductor substrate of a first conductivity type, and a diffusion layer of a second conductivity type completely surrounds this main junction. In a semiconductor device having a plurality of guard rings made of diffusion layers,
A semiconductor device having a guard ring, characterized in that the guard ring has a recessed structure. (2) A semiconductor device having a guard ring according to claim 1, wherein the dug-in guard ring is backfilled with polycrystalline silicon.