JPH01266645A - Read only semiconductor storage device - Google Patents

Abstract

PURPOSE:To execute the security protection of data by making it impossible to be read out by a third person who does not know a password by containing a semiconductor storage part for storing the password and an address converting part for executing an address conversion by its data value. CONSTITUTION:First of all, a password is inputted to a writable/readable semiconductor storage part 5 for storing the password. As for an address converting part 2, a barrel shifter circuit is used, and constituted so that when the password has been inputted, there is no shift quantity, and in case of other value, it is shifted by the quantity corresponding to its value. When a correct password is set to the storage part 5, an address of a read only semiconductor storage part 4 is selected correctly as it has corresponded to an address which has been designated from the outside, and correct data can be read out of an output buffer 6. When other value than the password is set to the storage part 5, an address signal is shifted by the converting part 2 by the quantity corresponding to its value and inputted to an address decoder 3, therefore, an erroneous address is designated, and erroneous data is outputted from the buffer 6.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a read-only semiconductor memory device.

[Prior Art] FIG. 2 shows a typical structure of a conventional read-only semiconductor memory device. The method for reading data stored in the read-only semiconductor memory device is as follows:
By inputting the address signal to the address buffer of
Data can be obtained from the output buffer 6 by decoding this address signal with the address decoder 2 and selecting a designated address in the read-only semiconductor memory section 4.

[Problems to be Solved by the Invention] The above-described conventional read-only semiconductor memory device is used as a device for storing software such as microcodes and programs in a device using a microcomputer. In addition, recently as LSIs that support customization,
A logic cell array (LCA) with an architecture in which the internal connections of internal logic blocks and I10 blocks are defined by circuit function definition data recorded on a memory chip has been commercialized. It is also used for memory. Developing hardware using LCA is nothing but developing data to be stored in memory chips, that is, software.

It can be said that the value of hardware lies in the data within this memory chip.

On the other hand, if the data in this memory chip can be obtained, it is possible to easily create another device with the same functionality. However, in the memory chip of the prior art described above, the stored data can be read out as is by specifying an address from the outside, so this device can read data such as software stored internally by tel.
It is impossible to protect the information, and it is easy to allow others to create hardware with the same functionality.

Therefore, the present invention is intended to solve such problems, and its purpose is to provide a read-only semiconductor memory device in which stored data is difficult to be read out by a third party. Our goal is to provide the following.

[Means for Solving the Problems] A semiconductor memory device of the present invention includes a read-only first semiconductor memory section, a writable and readable second semiconductor memory section, and a semiconductor memory device in which data is stored in the second semiconductor memory section. The present invention is characterized in that it has an address converting section that converts the address of the first semiconductor storage section according to the value obtained.

[Operation] According to the above configuration of the present invention, an external address signal is input to the address buffer, and then manually input to the address signal converter. In the address signal converter, the address signals are converted into different values depending on the data values stored in the second writeable and readable semiconductor memory device.

However, only one of the combinations of values input to the second semiconductor memory section is configured as a circuit that does not convert the address signal. If we call the value manually entered into the second semiconductor memory at this time a password, that is, the address of the first semiconductor memory will be correctly specified only when the password is input into the second semiconductor memory. , therefore correct data is output. If something other than a password is input to the second semiconductor memory section, different addresses are designated in the first semiconductor memory section depending on the value, and different erroneous data are output.

[Example] FIG. 1 shows an example of the present invention. 1 is an address buffer, 2 is an address conversion section, 3 is an address decoder, 4 is a read-only semiconductor memory section, 5 is a writable and readable semiconductor memory section for storing passwords, and 6 is an output buffer. In the embodiment, in order to execute a read operation in the semiconductor memory device, a password is first input into the semiconductor memory section 5. For example, a barrel shifter circuit that shifts the address signal from the address buffer by the password value can be used as the address conversion section. In this case, the circuit is configured such that there is no shift amount only when a password is input, and for any other value, the shift is performed by an amount corresponding to that value.

When the correct password is set in the semiconductor memory section 5,
The address of the read-only semiconductor memory section 4 is correctly selected according to the address specified from the outside,
Correct data can be read from the output buffer of No. 6. When a value other than the password is set to 5, the address signal is shifted by the amount corresponding to that value in the address converter 2 and input to the address decoder.
Different erroneous addresses are specified, and erroneous data that makes no sense at all is output from the output buffers of 6. At this time, regardless of whether a correct password is set or an incorrect password is set, some data is output, so a third party who does not know the password will be able to determine which password is entered as the correct data. It is very difficult to determine whether this is the case, and therefore the confidentiality of the data stored in the read-only semiconductor memory device shown in this embodiment is maintained.

[Effects of the Invention] As explained above, the present invention incorporates a semiconductor storage unit for storing passwords and an address conversion unit that converts the address value of a read-only semiconductor storage device according to the value of data stored therein. It is said that the data such as software stored in the semiconductor storage device cannot be read correctly by a third party who cannot input the password, that is, who does not know the password, and therefore the confidentiality of the stored data can be maintained. Effects can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the semiconductor memory device of the present invention. FIG. 2 is a block diagram of a conventional semiconductor memory device. ...Read-only semiconductor memory section 5...Semiconductor memory section for password storage 6...Output buffer or higher Applicant: Seiko Epson Co., Ltd. Representative Patent Attorney Masaru Kamiyanagi? (1 other person) L account 2nd installment

Claims (1)

[Claims] A read-only first semiconductor memory section, a writable and readable second semiconductor memory section, and an address for converting the address of the first semiconductor memory section according to the value stored in the second semiconductor memory section. A read-only semiconductor memory device characterized by having a conversion section.