JPH01264202A - Resistance device for hybrid integrated circuit - Google Patents
Resistance device for hybrid integrated circuitInfo
- Publication number
- JPH01264202A JPH01264202A JP63093224A JP9322488A JPH01264202A JP H01264202 A JPH01264202 A JP H01264202A JP 63093224 A JP63093224 A JP 63093224A JP 9322488 A JP9322488 A JP 9322488A JP H01264202 A JPH01264202 A JP H01264202A
- Authority
- JP
- Japan
- Prior art keywords
- electrodes
- resistor
- trimming
- resistance value
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 238000009966 trimming Methods 0.000 abstract description 17
- 238000009751 slip forming Methods 0.000 abstract description 2
- 238000009413 insulation Methods 0.000 abstract 3
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000976 ink Substances 0.000 description 1
Landscapes
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Non-Adjustable Resistors (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は混成集積回路用抵抗素子に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a resistance element for a hybrid integrated circuit.
混成集積回路(ハイブリッドIC)において抵抗素子は
相対抗する電極を混成集積回路用絶縁基板上に設け、そ
の上に抵抗体を印刷し、ついで所望の抵抗値にトリミン
グすることにより形成されている。また、相対抗する一
対の電極は通常、電極の長手方向を対抗させ、かつ両電
極は平行に配置されている。また、最近においてはトリ
ミングの精度を向上させるため、両電極を平行でなく、
斜めに対抗させて抵抗素子を形成させることも提案され
ている(特開昭61−256755号公報)。In a hybrid integrated circuit (hybrid IC), a resistive element is formed by providing opposing electrodes on an insulating substrate for a hybrid integrated circuit, printing a resistor thereon, and then trimming it to a desired resistance value. Further, a pair of opposing electrodes usually have their longitudinal directions opposed to each other, and both electrodes are arranged in parallel. Recently, in order to improve the precision of trimming, both electrodes are not parallel to each other,
It has also been proposed to form resistive elements diagonally opposing each other (Japanese Patent Application Laid-Open No. 61-256755).
しかしながら、上記の抵抗素子はいずれも電極の長手方
向を対抗させて使用しているために高密度実装する場合
、支障をきたし、また、抵抗体の印刷範囲が限定されて
いる場合、広範囲な抵抗値を得るようなトリミングがで
きないという問題がある。上記の問題を解決するため、
広範囲の抵抗体の形成において、通常抵抗値の異なるイ
ンクを用い、印刷を繰返し抵抗体を形成することが行わ
れているが、印刷回数の増加によりコストアップになる
問題がある。However, all of the above resistor elements use electrodes with their longitudinal directions opposed, which poses a problem when high-density mounting is performed, and when the printing area of the resistor is limited, a wide range of resistance There is a problem in that it is not possible to perform trimming to obtain a value. To solve the above problem,
In forming resistors over a wide range of areas, the resistors are usually formed by repeating printing using inks having different resistance values, but this increases the number of times of printing, resulting in an increase in cost.
本発明の目的は、従来の問題点を解決するもので、高密
度化が可能で、コストの低下が計れ、かつ抵抗トリミン
グにより抵抗値の可変範囲を大幅に広げることが可能な
混成集積回路用抵抗素子を提供することにある。The purpose of the present invention is to solve the problems of the conventional hybrid integrated circuits. An object of the present invention is to provide a resistance element.
すなわち、本発明は絶縁基板上に複数個の電極を長手方
向が実質的に直線になるよう配置され、かつ、該両型極
上に抵抗体が形成されてなることを特徴とする混成集積
回路用抵抗素子を提供することにある。That is, the present invention provides a hybrid integrated circuit characterized in that a plurality of electrodes are arranged on an insulating substrate so that the longitudinal direction thereof is substantially straight, and a resistor is formed on both electrodes. An object of the present invention is to provide a resistance element.
以下、図面により本発明について具体的に説明する。 Hereinafter, the present invention will be specifically explained with reference to the drawings.
第5図は従来例の抵抗素子を示す、すなわち、集積回路
絶縁基板1上に電極2.3の長手方向が相対しているも
ので、電極上に抵抗4が印刷されている。また、トリミ
ングにおいてはLパターンカットトリミングパターン5
により抵抗値を所望の値にトリミングしている。FIG. 5 shows a conventional resistor element, ie, an integrated circuit insulating substrate 1 with electrodes 2.3 facing each other in the longitudinal direction, and a resistor 4 printed on the electrodes. In addition, in trimming, L pattern cut trimming pattern 5
The resistance value is trimmed to a desired value.
第1〜4図は本発明の一実施例を示すものであり、第1
図は集積回路絶縁基板l上に電極2および3が配置され
、それらの長手方向に沿って、各電極上およびその片側
の絶縁基板l上に抵抗体4が連続的に形成されている。1 to 4 show one embodiment of the present invention.
In the figure, electrodes 2 and 3 are arranged on an integrated circuit insulating substrate l, and a resistor 4 is continuously formed on each electrode and on one side of the insulating substrate l along their longitudinal direction.
これらの電極は予め別々に直線的に設けられていてもよ
いが、最初に1本の直線状の電極を設け、ついで抵抗体
4を印刷により形成し、トリミングの際に該電極を抵抗
体と共に切断して電極2および3としてもよい。These electrodes may be provided separately and linearly in advance, but first one linear electrode is provided, then the resistor 4 is formed by printing, and during trimming, the electrode is attached together with the resistor. The electrodes 2 and 3 may be made by cutting.
トリミングパターン5は第2図のように所望の抵抗値に
より片方の電極上の適当な位置からトリミングを行えば
よい。The trimming pattern 5 may be trimmed from an appropriate position on one electrode according to a desired resistance value as shown in FIG.
抵抗体4の形成においては電極上および電極の長手方向
に沿って片側または両側に設けることができるが、片側
に設けるのがトリミングが簡単であるので好ましい、第
2図は電極2.3の間隔を予めあけて設けたものである
0間隔についてはトリミングパターン5を設ける位置、
抵抗値を考慮して適宜決めることができる。In forming the resistor 4, it can be provided on the electrode and on one or both sides along the length of the electrode, but it is preferable to provide it on one side because trimming is easy. FIG. 2 shows the spacing between the electrodes 2.3. For the 0 interval, which is provided in advance, the position where the trimming pattern 5 is provided,
It can be determined appropriately by considering the resistance value.
本発明においてはトリミング位置にもよるが、抵抗値R
は1図中のβ/Wに概ね比例するのでトリミングパター
ン5を第3図のように電極1.2を設け、トリミングパ
ターンを電極に近づけると抵抗値Rは低くなり、一方、
第4図のように間隔をあけて電極1.2を設けると抵抗
値Rは高くなるので同一の印刷抵抗体でも非常に広い範
囲にわたって所望の抵抗値を有する抵抗体を得ることが
可能である。In the present invention, although it depends on the trimming position, the resistance value R
is approximately proportional to β/W in Figure 1, so if the trimming pattern 5 is provided with the electrode 1.2 as shown in Figure 3 and the trimming pattern is brought closer to the electrode, the resistance value R will be lower;
If the electrodes 1.2 are spaced apart as shown in Figure 4, the resistance value R increases, so even with the same printed resistor, it is possible to obtain a resistor having a desired resistance value over a very wide range. .
本発明の混成集積回路用抵抗素子は電極が直線的に配置
されているので抵抗体を形成する面積を小さくできるの
で高密度の混成集積回路が形成でき、かつ上記のように
広い範囲にわたり抵抗値を変化させることができるので
抵抗体の印刷回数を減らしてコストを下げることができ
る。In the resistance element for hybrid integrated circuits of the present invention, since the electrodes are arranged linearly, the area on which the resistor is formed can be reduced, allowing the formation of high-density hybrid integrated circuits. Since the resistance can be changed, the number of times the resistor is printed can be reduced and costs can be lowered.
第1〜4図は本発明の実施例の抵抗素子の平面図であり
、第5図は従来の抵抗素子の平面図を示す。
1− 絶縁基板、2.3−・−・電極、4 ・・・ 抵
抗体筒コ ロ 第 22
舅3図 第4図1 to 4 are plan views of resistance elements according to embodiments of the present invention, and FIG. 5 is a plan view of a conventional resistance element. 1- Insulating substrate, 2.3-- Electrode, 4... Resistor cylinder roller No. 22 Fig. 3 Fig. 4
Claims (1)
になるように配置し、かつ、該電極上に抵抗体が形成さ
れてなることを特徴とする混成集積回路用抵抗素子。1. A resistance element for a hybrid integrated circuit, characterized in that a plurality of electrodes are arranged on an insulating substrate so that the longitudinal direction thereof is substantially straight, and a resistor is formed on the electrodes.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63093224A JPH01264202A (en) | 1988-04-14 | 1988-04-14 | Resistance device for hybrid integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63093224A JPH01264202A (en) | 1988-04-14 | 1988-04-14 | Resistance device for hybrid integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01264202A true JPH01264202A (en) | 1989-10-20 |
Family
ID=14076580
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63093224A Pending JPH01264202A (en) | 1988-04-14 | 1988-04-14 | Resistance device for hybrid integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01264202A (en) |
-
1988
- 1988-04-14 JP JP63093224A patent/JPH01264202A/en active Pending
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