JPH01263723A - Simplified program patch system - Google Patents

Abstract

PURPOSE:To decrease the preparing quantity of an additional instruction by providing a means to shift a control from a patched program to an additional instruction to be patched by using a program interruption in a system way. CONSTITUTION:An additional instruction registering means 1, based on a patch executed address designated by an additional instruction 4, updates the pertinent instruction of a patched program 7 to an unjust instruction to generate the interruption at the time of execution. The pertinent address is registered to patch address control information 5, the patched program before updating is added to patch data 4 and registered to additional instruction information 6. When the patched program 7 is travelled and the interruption occurs by the unjust instruction, a patch discriminating means 2 compares an interruption address with a patch executed address and at the time of coincidence, is shifted to a patch data control shifting means 3. After the recovery at the time of generating the interruption of a register, etc., the control shifting is executed to the pertinent additional instruction and the pertinent patch is executed.

Description

[Detailed description of the invention] [Industrial application field] INDUSTRIAL APPLICABILITY The present invention is utilized in the field of information processing equipment.

The present invention relates to a patch method for adding instructions to a program executed in a data processing system by patching, and particularly to a simple program punch method for transferring control to the added instruction using a program interrupt.

〔overview〕

The present invention provides a patch system that includes means for adding instructions to a program executed in a data processing system by means of a patch, and a method for transferring control from a patched program to which a patch is applied to an additional instruction using a program interrupt. By using this method and providing it systemically, a simple program patching method is realized that reduces the amount of additional instructions to be created.

[Conventional technology]

Conventionally, when adding an instruction to a specific part of a program using a patch, the additional instruction includes data that modifies the instruction at the added instruction point to an instruction to transfer control to the additional instruction, and the data that is set in the added instruction makes it possible to prevent destruction. It was necessary to create additional data to execute the instructions of the patched program.

[Problem that the invention seeks to solve]

The above-described conventional patching method has the disadvantage that even if one instruction is added, the number of additional instructions is increased because several steps are required to create an instruction for transferring control to the additional instruction.

An object of the present invention is to eliminate the above-mentioned drawbacks, and to provide a simple program patching method that enables necessary patches to be realized by creating only the address of the instruction addition location in the patched program and the additional instructions. Our goal is to provide the following.

[Means for solving problems]

The present invention provides a patch method including a patch target program section storing a patch target program to be patched, and a patch address information section storing patch address management information of an additional instruction for patching, and a patch address information section storing additional instruction information. an additional instruction information section to store; a means for updating a corresponding instruction to an illegal instruction that generates an interrupt according to a patch address of the patched program; a means for registering the patch address in the patch address management information; and a target program before updating. additional instruction registration means having means for registering an additional instruction added with a patch program instruction in the additional instruction information; and an interrupt address and the patch address when an interrupt occurs due to the illegal instruction while the patched program is running. patch discriminating means having means for comparing with management information and means for transferring control to the next one when the comparison results in a match; means for restoring the state to the point at which the interrupt occurs when control is passed from the patch discriminating means; and and additional instruction control transfer means having means for transferring control to the corresponding additional instruction on the additional instruction information after recovery.

[Effect]

The additional instruction registration means updates the corresponding instruction to an illegal instruction that generates an interrupt based on the patch address of the patched program, registers the patch address in the patch address information, and generates an additional instruction to which the instruction of the patched program before the update is added. Register in the additional instruction information. Then, the patch determining means is configured to detect, when the patched program is started and running,
When an interrupt occurs due to the illegal instruction, the interrupt address is compared with the patch address registered in the patch address information, and when they match, control is transferred to additional instruction control transfer means. Then, the additional instruction control transition means restores the state of registers etc. to the time of occurrence of the interrupt,
After recovery, control is transferred to the corresponding additional command on the additional command information. This causes the specified patch to be executed.

Therefore, by simply inputting an additional command into the additional command registration means, control is automatically transferred between each means and the patch is executed, making it possible to reduce the amount of additional commands to be created.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram showing an example of an information processing system using the present invention.

According to FIG. 1, in this embodiment, a patched program section 7a in which a patched program 7 to be patched is stored.
Additional instruction 4 for patching in a patch method with
A patch address information section 5a that stores patch address management information 5, an additional instruction information section 6a that stores additional instruction information 6, and a patch address of the patched program 7 to update the corresponding instruction to an illegal instruction that generates an interrupt. means for registering the patch address in the patch address management information 5; and means for registering in the additional instruction information 6 an additional instruction added with an instruction of the patched program 7 before update; Program 7
patch determining means 2 having means for comparing the interrupt address with patch address management information 5 when an interrupt occurs due to the illegal instruction during running; and means for transferring control to the next when the comparison results in a match; The additional instruction control transfer means 3 includes a means for restoring the state to the point in time when an interrupt occurs upon receiving control from the patch determination means 2, and a means for transferring control to the corresponding additional instruction on the additional instruction information 6 after recovery. There is.

In FIG. 1, reference numeral 8a represents a running patched program section that stores the running patched program 8 that is currently running.

According to FIG. 2, the information processing system 10 used in the present invention
includes a central processing unit 11 on which programs run, a main memory 2, a data storage device 3, and an auxiliary memory 14.

The additional instruction registration means 1, the patch control means 2, and the additional instruction control transfer means 3 shown in FIG. 8a is provided in the main storage device 12 and is connected to the patched program section 7.
a is provided in the auxiliary storage device 14.

The feature of the present invention is that in FIG.
, patch determination means 2, additional command control transfer means 3,
This is because a patch address information section 5a storing patch address management information 5 and an additional command information section 6a storing additional command information 6 are provided.

Next, the operation of this embodiment will be explained with reference to the flowchart shown in FIG.

When the additional command registration means 1 is activated (step S1),
Based on the patch construction address specified in additional instruction 4,
The relevant instruction in the patched program 7 is updated to an illegal instruction that causes an interrupt during execution (step S2). Then, register the address in patch address management information 5 (
Step 33) Add the instructions of the patched program before the update to the illegal instructions in the patch data 4, and add the instructions to the additional instruction information 6.
(Step 34).

Thereafter, when the patched program 7 is started and loaded into the running patched program section 8a on the main storage device and runs as the running patched program 8 (step S5), an interrupt occurs due to the above-mentioned illegal instruction, and the patch discriminating means 2 The control shifts to (step S6).

The patch determination means 2 checks the interrupt address and the batch construction address registered in the patch address management information 5 (step S7), and if it is a patch construction location, transfers control to the patch data control transfer means 3 (step S7).
).

After restoring the registers and the like to the point of occurrence of the interrupt, the patch data control transfer means 3 transfers control to the corresponding additional instruction on the patch data information 6, and the corresponding patch is executed (step S9).
).

〔Effect of the invention〕

As described above, the present invention has the effect of reducing the amount of additional instructions to be created by systematically transferring control from the patched program to the additional instructions using program interrupts.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention. FIG. 2 is a block diagram showing an example of an information processing system using the present invention. FIG. 3 is a flowchart showing the operation of this embodiment. DESCRIPTION OF SYMBOLS 1... Patch data registration means, 2... Patch discrimination means, 3... Patch data control transfer means, 4... Additional command, 5... Patch address management information, 5a... Patch address management Information department, 6...patch data information,
6a... patch data information section, 7... patched program, 7a... patched program section, death... running patched program, 8a... running patched program section, 10... information processing System, 11... Central processing unit, 12... Main storage device, 13... Human power device,
14...Auxiliary storage device, 81-S9...Step.

Claims (1)

[Claims] 1. In a patch method including a patch target program section (7a) storing a patch target program (7) to be patched, patch address management information (5) of an additional instruction to perform patching.
a patch address information section (5a) that stores the information, and an additional instruction information section (6a) that stores the additional instruction information (6).
and means for updating the corresponding instruction to an illegal instruction that generates an interrupt based on the patch address of the patched program, means for registering the patch address in the patch address management information, and addition of an instruction of the patched program before updating. additional instruction registration means (1) having means for registering an instruction in the additional instruction information; and when an interrupt occurs due to the illegal instruction while the patched program is running, the interrupt address is compared with the patch address management information. patch discriminating means (2) having means for transferring the control to the next one when the result of comparison matches, means for restoring the state to the point in time when the interrupt occurs when control is passed from the patch discriminating means, and A simple program patch method characterized by comprising an additional instruction control transfer means (3) having means for transferring control to a corresponding additional instruction on additional instruction information.