JPH01256157A - Compound pin grid array - Google Patents
Compound pin grid arrayInfo
- Publication number
- JPH01256157A JPH01256157A JP8311988A JP8311988A JPH01256157A JP H01256157 A JPH01256157 A JP H01256157A JP 8311988 A JP8311988 A JP 8311988A JP 8311988 A JP8311988 A JP 8311988A JP H01256157 A JPH01256157 A JP H01256157A
- Authority
- JP
- Japan
- Prior art keywords
- copper
- aluminum laminated
- laminated foil
- grid array
- pin grid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 150000001875 compounds Chemical class 0.000 title 1
- 239000000758 substrate Substances 0.000 claims abstract description 7
- 239000000919 ceramic Substances 0.000 claims abstract description 3
- JRBRVDCKNXZZGH-UHFFFAOYSA-N alumane;copper Chemical compound [AlH3].[Cu] JRBRVDCKNXZZGH-UHFFFAOYSA-N 0.000 claims abstract 6
- 239000011888 foil Substances 0.000 claims abstract 6
- 239000011347 resin Substances 0.000 claims abstract 3
- 229920005989 resin Polymers 0.000 claims abstract 3
- 239000002131 composite material Substances 0.000 claims description 5
- 229910000679 solder Inorganic materials 0.000 abstract description 2
- 238000000034 method Methods 0.000 abstract 3
- 238000007789 sealing Methods 0.000 abstract 1
- 238000005476 soldering Methods 0.000 description 3
- 229910000906 Bronze Inorganic materials 0.000 description 2
- 239000010974 bronze Substances 0.000 description 2
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical compound [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- MSNOMDLPLDYDME-UHFFFAOYSA-N gold nickel Chemical compound [Ni].[Au] MSNOMDLPLDYDME-UHFFFAOYSA-N 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、多数の半導体パッケージ（以下ＩＣパッケー
ジという）に使用する複合ピングリッドアレーに関する
ものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a composite pin grid array used in multiple semiconductor packages (hereinafter referred to as IC packages).
（従来の技術）
従来より、多数のピン全般けたＩＣパッケージの基板と
して、ピングリッドアレー（以下ＰＧＡトいう）が、一
般に用いられておジ、導電体をグリッドする基板の基材
としては、アルミナセラミックスやエポキシ樹脂及びポ
リイミド樹脂全ベースとしたいわゆるプラスチックＰＧ
Ａなどが使われている。(Prior Art) Conventionally, a pin grid array (hereinafter referred to as PGA) has been generally used as a substrate for an IC package with a large number of pins. So-called plastic PG based entirely on ceramics, epoxy resin, and polyimide resin
A etc. are used.
又最近では、放熱特性と低熱抵抗及び低誘電率による高
速性全ねらったセラミックス−プリント基板の複合ＰＧ
Ａや高生産性をねらった樹脂−プリント基板のＰＧＡの
利用が始まっている（特開昭５９−５５８９４号公報、
特開昭６１−２８４９９１号公報）。Also, recently, composite PG of ceramics-printed circuit board, which has heat dissipation characteristics, low thermal resistance, and high speed due to low dielectric constant, has been developed.
The use of PGA in resin-printed circuit boards aiming at A and high productivity has begun (Japanese Unexamined Patent Publication No. 59-55894,
(Japanese Patent Application Laid-Open No. 61-284991).
しかしながら、このような複合パッケージでグリッド基
板６が単層として用いられているものは、第４図に示さ
れているような構造金有している。However, such a composite package in which the grid substrate 6 is used as a single layer has a structure as shown in FIG.
このプリント基板３は第５図に示すように、プリント基
板３には、半導体との結合のため金メツキ１２（通常は
ニッケルー金金示す）をしたワイヤーメンディングボス
ト５及びピン４とプリント基板３とをハンダ付けする際
に必要となるノ・ンダレジスト６が必要であった。As shown in FIG. 5, the printed circuit board 3 includes wire mending bosses 5 and pins 4 plated with gold 12 (usually nickel-gold) for bonding with semiconductors, and the printed circuit board 3. A soldering resist 6 was required when soldering the parts.
さらにピン４をプリント基板３にハンダ付けする際には
、ワイヤーピンディングポスト５′ｆｔハンダ７から守
るため、マスキングする必要もあった。Furthermore, when soldering the pin 4 to the printed circuit board 3, it was necessary to mask the wire pinning post 5'ft to protect it from the solder 7.
］２．千ノー／へ
手続補正書
昭和６３年５月１８日
特許庁長官 小 川 邦 夫 殿
１、事件の表示
昭和６３年特許願第８３１１９号
２、発明の名称
複合ピングリッドアレー
３、補正をする者
事件との関係 特許出願人
住所 ■１００ 東京都千代田区有楽町１丁目４番１号
（１）明細書の発明の詳細な説明の欄
（２）図面
５、補正の内容
（１）明細書第５頁第２行目の「ピン青銅」を「リン青
銅」と訂正する。]2. Procedural amendment to Chino/May 18, 1988 Director General of the Patent Office Kunio Ogawa 1. Indication of the case Patent Application No. 83119 of 1983 2. Name of the invention Composite pin grid array 3. Person making the amendment Relationship to the case Patent applicant address ■100 1-4-1 Yurakucho, Chiyoda-ku, Tokyo (1) Detailed description of the invention in the specification (2) Drawing 5, content of amendments (1) Specification No. 5 Correct "pin bronze" in the second line of the page to "phosphor bronze."
Claims (1)
リント配線を設けたプリント基板を接合してなるピング
リッドアレーにおいて、前記プリント配線が銅−アルミ
ニウム重ね合わせ箔よりなることを特徴とする複合ピン
グリッドアレー。1. A composite pin grid array formed by bonding a printed circuit board having printed wiring on a ceramic or resin substrate having a large number of pins, wherein the printed wiring is made of copper-aluminum laminated foil.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8311988A JPH01256157A (en) | 1988-04-06 | 1988-04-06 | Compound pin grid array |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8311988A JPH01256157A (en) | 1988-04-06 | 1988-04-06 | Compound pin grid array |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01256157A true JPH01256157A (en) | 1989-10-12 |
Family
ID=13793316
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8311988A Pending JPH01256157A (en) | 1988-04-06 | 1988-04-06 | Compound pin grid array |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01256157A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6214490A (en) * | 1985-07-11 | 1987-01-23 | 日立電線株式会社 | Substrate for pga |
| JPS62271442A (en) * | 1987-04-02 | 1987-11-25 | Denki Kagaku Kogyo Kk | Hybrid integrated circuit |
-
1988
- 1988-04-06 JP JP8311988A patent/JPH01256157A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6214490A (en) * | 1985-07-11 | 1987-01-23 | 日立電線株式会社 | Substrate for pga |
| JPS62271442A (en) * | 1987-04-02 | 1987-11-25 | Denki Kagaku Kogyo Kk | Hybrid integrated circuit |
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