JPH01255263A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To extend the dynamic range of a signal based on input/output terminals by supplying an operation voltage and/or a circuit ground potential from an exterior through a unidirectional element, and providing a unidirectional element directed from an inner ground potential to the input/output terminals and a unidirectional element directed from the terminals to the inner operation voltage. CONSTITUTION:A unidirectional element D1 provided to transmit a ground potential GND and/or an operation voltage Vcc to be supplied from an outer terminal to the ground potential GND' or the operation voltage of an inner circuit, a unidirectional element D2 provided to supply a current directed from the ground potential GND' toward an input and/or output terminal OUT and/or a unidirectional element provided to supply a current directed from an input and/or output terminal toward the operation voltage of the circuit are provided. For example, the ground potential GND' of the inner circuit is applied through a diode D1. In order that an output MOSFETQ1 is not again turned ON by a reverse electromotive force of a load L, a diode D2 directed from the ground potential GND' of the circuit to the output terminal OUT is provided.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor integrated circuit device, and can be effectively applied to an output circuit that drives an inductive load using, for example, a source follower type output MOS FET. It's about technology.

(Prior Art) As an example of a power output circuit that drives an inductive load, for example, the magazine "Electronic Technology J November 1987 issue, pages 22 to 2
There are 5. This power MO3FET has a source grounded and a drain connected to an inductive load such as a motor.

[Problem to be solved by the invention]

Power output circuits installed in automobiles, such as electronic fuel injection solenoids, have power output elements on the power supply voltage side.
It is desirable to use a high-side drive circuit (source follower circuit) in which the load is placed on the ground potential side of the circuit. because,
This is because if the load is connected to the power supply voltage side and the load is grounded due to a collision or the like, there is a risk that an overcurrent will flow there and cause a fire.

However, in the source follower output circuit as shown in FIG. 9, when the drive MO3FETQ2 is turned on,
By setting the gate of the output MO3FETQI to a low level such as the ground potential of the circuit, the output MOSFETQ1 can be turned from the on state to the off state. However, since a back electromotive force is generated in the load, as shown in Figure 1O,
The source potential of the output MO3FETQI becomes a negative potential, which becomes the effective threshold voltage vt of the output MO3FETQI.
When the voltage reaches h, the output MO3FETQI turns on again and clamps the potential of the output terminal OUT.

Since the threshold voltage vth is a relatively small voltage in absolute value, it takes time to release the energy stored in the load, and the actual output MOS F
Slows down the switching of the ET to the off state. This means that
When the load is driven by a pulse width modulation signal, the back electromotive voltage period, in other words, the output MOS
As the switching time of the FET to the substantially OFF state becomes longer, the pulse width duty of the pulse width modulation signal is restricted accordingly, and the control range becomes narrower.

In addition to the above output circuit, a PN as shown in Figure 11
In an input circuit using a P-type transistor TI, when the input signal supplied to the input terminal IN becomes a negative polarity voltage, the diode D3, which exists in the structure of the PNP transistor, turns on and clamps the input signal. At the same time, the current causes the internal circuit to malfunction. For example, in a television receiver circuit, a signal formed by a flyback transformer or the like has a negative polarity voltage, so if the above-described input circuit is used, malfunctions will occur.

In other words, in conventional semiconductor integrated circuit devices, the operating voltage and ground potential of the circuit are uniquely determined by a low impedance power supply external or internal to the circuit, so when viewed from the input or output terminal, the voltage is the operating voltage. There is a problem in that operation is not guaranteed when the voltage drops below the ground potential of the circuit.

An object of the present invention is to provide a semiconductor integrated circuit device that can expand the dynamic range of signals viewed from input/output terminals.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means to solve the problem]

A brief overview of typical inventions disclosed in this application is as follows.

That is, the operating voltage and/or circuit ground potential is supplied from the outside to the semiconductor integrated circuit via the unidirectional element, and the unidirectional element and/or input/output terminal is supplied from the internal ground potential to the input/output terminal. A unidirectional element is provided from the terminal to the internal operating voltage.

[For production]

According to the above means, the signal at the input and/or output terminal can be expanded by the switching operation of the unidirectional element without being restricted by the internal operating voltage and/or ground potential.

〔Example〕

FIG. 1 shows a circuit diagram of an embodiment in which the power output circuit according to the present invention is used in a high-side drive circuit (source follower circuit) that drives an inductive load such as a motor or a solenoid. has been done.

The power output circuit of this embodiment is formed as one integrated circuit IC as shown by the broken line in the same figure. Although not particularly limited, the power MO3FETQI uses a substrate as its drain region as described later, and The structure is such that a drain electrode is provided on the back side of the device.

The drain of the power MO3FET QI is connected to the power supply voltage Vcc
is combined with The source of the MO3FET QI is coupled to an external terminal OUT, to which an M conductive load such as the motor or solenoid is provided. Therefore,
The power output MO3FET Q1 is the source follower output M
Operates as an OS FET.

The gate of the above power MO3FETQI has a drive MOSFET.
A drive circuit consisting of ETQ2 and a load resistor RL is provided. As the operating voltage of the drive circuit, a voltage Vcc+V obtained by boosting the power supply voltage Vcc by a booster circuit BST is used.

Although not particularly limited, a control signal in is applied to the gate of the drive MOS F BTQ2 through an inverter circuit N1.
is supplied.

Although not particularly limited, the operating voltage of the inverter circuit N1 is set to a voltage in the 5-inch range, which is relatively lower than the power supply voltage Vcc. Accordingly, the control signal in has a high level of 5■, which is a relatively low logic level such as the ground potential of a low L/bell circuit. Therefore, the drive circuit consisting of the inverter circuit N1, MO3FET Q2, and resistor R performs a type of level conversion operation.

This embodiment has the following configuration in order to increase the substantial switching speed of the output MO3FET QI to the off state. That is, the ground potential GND' of the internal circuit such as the source of the drive MO3FET Q2 is applied through the diode DI. In other words, the ground potential GND' of the IC internal circuit becomes a higher voltage level-shifted by the forward voltage of the diode D1 with respect to the external ground potential GND. This ground potential GND' is also used as the ground potential of the inverter circuit N1 and booster circuit BST. In order to expand the dynamic range on the negative polarity side at the output terminal OUT, in other words, to prevent the output MO5FET Q1 from turning on again due to the back electromotive force of the load, from the ground potential GND of the circuit to A diode D2 is provided towards the output terminal OUT.

For example, when the control signal in is at a high level, the output signal of the inverter circuit Nl becomes a low level such as the ground potential of the circuit. Drive MOS according to the low level of this output signal.
F BTQ 2 is turned off and power MO3FE
A boosted operating voltage Vcc+V is supplied to the gate of the TQI through a resistor R. The boosted voltage +■ formed by the booster circuit BST is set to be equal to or higher than the substantial threshold voltage of MO3FETQI. Therefore, as shown in the waveform diagram of FIG. 2, when the MO3FET QI is in the on state, the power supply voltage Vcc is directly outputted from its source, so that a high output voltage without voltage loss can be obtained. Under such steady-state operating conditions, diode D2
is in an off state because it is reverse biased, and the above output signal can be obtained.

When the control signal in changes from high level to low level, the output signal of the inverter circuit N1 becomes high level and turns on the driving MO3FET Q2. As a result, the gate and source of the power MO3FETQI are short-circuited, so that the power MO3FETQI is switched from the on state to the off state. At this time, a back electromotive force is generated in the load, lowering the output terminal OUT to which the source of the power MO3FET QI is connected to a negative potential. Diode D2 turns on in response to this back electromotive force, and also lowers the ground potential GND inside the IC. Therefore, even if the back electromotive force occurs, MOS FETQ 2 does not control the output of the inverter circuit Nl. Since the ON state is maintained by the high level of the signal, the output MO3FET QI remains in the OFF state.In other words, the voltage at the output terminal OUT is not clamped by the internal circuit, and the operation of the internal circuit is guaranteed. Become something that will be loved.

In this embodiment, a voltage clamp circuit consisting of a diode D3 and a Zener diode ZD is provided for the above load. Therefore, as shown in the waveform diagram of FIG.
) becomes a large voltage with negative polarity. Here, VD3 is the forward voltage of diode D3, and VZD is the Zener voltage of Zener diode ZD. By setting the clamp voltage to a high absolute value, the energy stored in the inductive load can be released in a short time. This makes it possible to expand the control range when controlling the output MO3F ETQ 1 with a pulse width modulation signal.

FIG. 3 shows a circuit diagram of an embodiment in which the present invention is applied to an input circuit using a PNP l-transistor.

In this embodiment as well, the ground potential is applied to the IC internal circuit via the diode D1. In order to expand the dynamic range on the negative polarity side of the input terminal TN, the input terminal I
A diode D3 towards N is added. In this configuration, when the signal supplied to the input terminal IN becomes negative, the diode D3 turns on and the internal ground potential G
ND' is lowered according to the signal at input terminal IN.

As a result, the signal at the input terminal IN is not voltage clamped by a diode or the like in the internal circuit, and the input dynamic range can be expanded to below the ground potential.

In this case, since the ground potential GND' of the internal circuit is also lowered in accordance with the input signal, the operation of the internal circuit is guaranteed.

FIG. 4 is a block diagram showing the general concept of the invention.

In this example, an amplifier circuit AMP configured in a semiconductor integrated circuit is used as an example, and a general method is used to expand the dynamic range of its input and output to the negative polarity side below the ground potential and the positive polarity side above the power supply voltage VCC. It is shown.

That is, the circuit ground potential GND' and the operating voltage VCC
' are supplied through diodes DI and D4, respectively. Therefore, as described above, the level of the ground potential GND' is made higher than the external ground potential GND by the forward voltage of the diode D1.

The operating voltage Vcc' is made lower than the external power supply voltage Vcc by the forward voltage of the diode D4.

In order to expand the negative dynamic range below the ground potential GND, the input terminal IN and the output terminal O
Between UT and the ground potential GND', the input terminal IN and the output terminal 0t are connected from the ground potential GND' side as described above.
Diodes D3 and D2 are provided respectively facing JT.

On the other hand, in order to expand the dynamic range on the positive polarity side above the power supply voltage VC, the input terminal IN is connected between the input terminal IN and output terminal OUT and the operating voltage VCC'
and diodes D6 and D5 respectively directed from the output terminal to the operating voltage Vcc'.

In this configuration, when the potential of the input terminal IN or the output terminal OUT becomes negative as described above, the diode D3 or D
2, the ground potential GND' also decreases accordingly. Conversely, when the potential of the input terminal IN or output terminal OUT becomes higher than the power supply voltage Vcc, the diode D6 or D5
Accordingly, the operating voltage cc' also increases accordingly.

In this way, the MP to the amplifier circuit of this embodiment follows when either the input terminal IN or the output terminal OUT increases in absolute value beyond the range of the ground potential GND and voltage VCC given above. Since the internal ground potential and operating voltage also change, it is possible to expand the dynamic range of the signal and guarantee the operation of the internal circuit.

FIG. 5 shows a circuit diagram of the main part of another embodiment. In the same figure, the semiconductor integrated circuit IC is connected via the base and emitter of the transistor T2 instead of the diode DI as described above. The internal ground potential GND'' is supplied.Furthermore, the base and emitter of the transistor T3 are used in place of the diode D3 provided between the input terminal IN and the ground potential GND'.In this configuration, the base and emitter of the transistor T3 are used. collector current T S 2 and transistor T3
By using the collector current ISI as a sense current, it is possible to detect the terminal at the lowest potential. For example, the collector current IS of transistor T2
2 is flowing, the terminal that supplies the ground potential GND is at the lowest potential, and the collector current of the transistor T3 is
When Sl is flowing, the ground potential GND' indicates that the input terminal IN is at its lowest potential. By providing a transistor such as the transistor T3 at each terminal, it is possible to detect the terminal that is set to the lowest potential among the plurality of terminals. By adopting such a configuration, it can also be used for return, etc.

FIG. 6 shows a block diagram of still another embodiment of the invention.

In this embodiment, a circuit configured in a semiconductor integrated circuit IC is divided into a plurality of blocks CBI, CB2, and CB3. Then, a ground potential GND is applied to each circuit block CBI to CB3 from an external terminal via diodes D1'', DI', and DI.An input terminal IN that supplies an input signal to the circuit block CBI and its corresponding ground The diode D3 as described above is provided between the output terminal OUT which sends an output signal to the circuit block CB3 and the corresponding ground potential.

In this configuration, when the input terminal IN is set to a negative polarity potential, the ground potential of the corresponding circuit block CBI follows it, and the other circuit blocks CB2 and CB3 are connected to the ground potential via the diodes Di' and DI. It can be done. Conversely, when the output terminal OUT is set to a negative potential, the ground potential of the corresponding circuit block CB3 follows it, and the other circuit blocks CBI and CB2 are set to the ground potential via the diodes D1'' and DI''. It can be done. By adopting such a configuration, it is possible to obtain a semiconductor integrated circuit having circuit blocks that are not affected by input voltage or output voltage.

FIG. 7 shows the MO3FETQ of the embodiment circuit of FIG.
1 and a structural cross-sectional view of an embodiment of the diodes DI, D2.

The power MO5FET QI has an N-type substrate in its drain region σ region. Therefore, the drain electrode is provided on the back side of the substrate. The power supply voltage VCC is applied to the drain electrode above.
is given. A P-type channel region constituting the power MO5FET Q1 is formed in a ring shape on the surface of the substrate. Similarly, a ring-shaped N-type source region is formed on the surface of this P-type channel region. A gate electrode G is formed on the surface of the channel region sandwiched between the source region and the substrate serving as the drain region, with a gate insulating film interposed therebetween. The source region and the channel region are commonly connected to form a source electrode S.

As a result, the drive current of MO3FETQI flows in the vertical direction of the substrate.

Such power MO3FETQI and each of the circuit elements described above are formed on the same substrate. Therefore, P
A type isolation region (150) is formed, and each of the circuit elements described above is formed via this P type isolation region #i region ISO. For example, as the diode D1, a diode-connected transistor is used. That is, the P-type bone HH region IS
An N-type collector region is formed in the O, a P-type base region is formed in the collector region, and an N-type emitter region is formed in the base region, thereby forming an NPN-type transistor. Then, the P-type head region as the base and the N-type region as the collector are connected to form a diode connection. The N-type emitter region, which acts as a cathode, is supplied with the ground potential GND of the circuit via an external terminal. The base and collector regions, which are commonly connected as an anode, are connected to the bias voltage to the P-type isolation region ISO and the ground potential point GND' of the circuit. Further, the base and collector regions commonly connected as the anode are connected to the anode side of the diode D2. Diode D2
A transistor having a structure similar to that described above is also used, and its base and collector are commonly connected to form a diode configuration. And its base and collector are the diode D
The base as an anode electrode of I is connected to the collector.

The emitter of the transistor constituting this diode D2 is connected to the source S of MO3FETQI as a cathode electrode.

In such a semiconductor structure, the isolation region ISO
A large parasitic diode exists between the Therefore, even if the power supply voltage Vcc and the circuit ground potential point GND are reversely connected, in other words, even if the ground potential is applied to the terminal Vcc and the voltage ↓12■ is applied to the terminal GND, the diode Since Di is inserted, an excessive current that would destroy the element will not flow. Therefore, the semiconductor integrated circuit device of this embodiment is suitable for a power switch circuit mounted on an automobile. This is because in automobiles, when the engine cannot be started due to discharge of the battery, it is often necessary to connect the battery of another automobile to start the engine. This is because in this case, there is a very high possibility that the batteries will be connected in reverse by the cable. Even if such a reverse connection is made, the elements of the semiconductor integrated circuit device described above will not be destroyed.

FIG. 8 shows a structural sectional view of another embodiment. In this embodiment, a plurality of blocks are provided in the semiconductor integrated circuit as in the embodiment shown in FIG. That is, two isolation regions rsO1 and lSO2 are provided on the semiconductor substrate. For example, when the input terminal IN is provided in the isolation region 1soi as in the circuit block CB1 of FIG.
3 and Di" to supply the ground potential and connect the ground potential to the input terminal IN. The other isolation region lSO2 has an output terminal OU like the circuit block CB3 in FIG.
When T is provided, diodes D1 and D2 having a similar structure are configured to supply the ground potential and connect the ground potential to the output terminal OUT.

A ground potential is applied to the isolation regions l5OI and lSO2 through diodes DI and Dl'', respectively. In this configuration, the potentials of the isolation regions 1301 and lSO2 are as follows.
They change in accordance with the lowest potential of the terminals IN and OUT, respectively, and can be maintained at the lowest potential of the circuit. Therefore, the operation of the vertical parasitic transistor (T4) based on the isolation region 1301 (lSO2) can be suppressed. Furthermore, since the electric voltage Vcc is applied to the substrate, it is possible to suppress the generation of lateral parasitic transistors in which the two isolation regions rsO1 and 1302 are used as emitters and collectors, and the substrate between them is used as a paste.

In addition, in a system in which the operating voltage is also supplied through the diode as in the embodiment shown in FIG. 4, the voltage is also supplied to the substrate through the diode.

The effects obtained from the above examples are as follows. That is, (1) The operating voltage and/or circuit ground potential is supplied from the outside to the semiconductor integrated circuit via the unidirectional element, and the unidirectional element and/or circuit is supplied from the internal ground potential to the input/output terminal. Alternatively, by providing a unidirectional element that goes from the input/output terminal to the internal operating voltage, the switching operation of the unidirectional element allows the signal at the input and/or output terminal to overcome the constraints of the internal operating voltage and/or ground potential. You can get the effect of being able to expand without receiving it.

(2) By supplying ground potential via a diode to the semiconductor integrated circuit that constitutes the high-side drive circuit, and by inserting a diode between the ground potential and the source follower output terminal, the output MOS F
The time during which the ET is substantially turned off can be shortened.

This has the effect of making it possible to drive an inductive load with a pulse width modulated signal.

(3) By employing a configuration in which the ground potential is supplied through a diode as in the above fil or (2), it is possible to achieve the effect of improving the breakdown strength when the power supply is reversely connected.

(4) A configuration in which the circuit configured in a semiconductor integrated circuit is divided into multiple blocks, each block is supplied with a ground potential or operating voltage via a diode, and a diode is provided between the block and the external terminal for transmitting and receiving signals. By taking this, the lowest potential below the ground potential and the highest potential above the operating voltage can be determined for each block in accordance with the voltage of the external terminal. This configuration has the advantage that it is possible to obtain a semiconductor integrated circuit having circuit blocks that are not affected by input voltage or output voltage.

Although the invention made by the present inventor has been specifically explained based on Examples above, the present invention is not limited to the above-mentioned Examples, and modifications can be made without departing from the gist thereof. For example, in the embodiment of FIG.
Depending on the voltage of N or OUT, add diode D1
- D6 can be selected from various combinations. Further, a plurality of power MO3FETs may be provided on one semiconductor substrate. In this case, in a power MO3FET whose drain is the substrate, it is inevitably used as a high-side drive circuit (source follower circuit) with a common drain. Above power MO
3FETs are used not only to drive inductance loads such as motors and solenoids as shown in Figure 1, but also to electronic power switches that can replace conventional mechanical switching elements, such as drive circuits that drive lamps such as automobile headlamps. This makes it suitable for switch circuits.

In addition, when configuring a low side drive circuit, the output M
A P-channel MOS FET may be used as the O3FET and the drive MOS FET. In this configuration, the ground potential of the circuit is applied to the drain of the P-channel MO3FET, so the load is connected to the power supply voltage Vcc.
A low-side drive circuit can be configured for the low-side drive circuit.

The present invention can be widely used in semiconductor integrated circuit devices.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows. That is, the operating voltage and/or circuit ground potential is supplied from the outside to the semiconductor integrated circuit via the unidirectional element, and the unidirectional element and/or input/output terminal is supplied from the internal ground potential to the input/output terminal. By providing a unidirectional element that goes from the terminal to the internal operating voltage, the switching action of the unidirectional element causes the signal at the input and/or output terminal to be free from the constraints of the internal operating voltage and/or ground potential. Can be expanded.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing one embodiment of this invention, FIG. 2 is a waveform diagram for explaining its operation, and FIG. 3 is a circuit diagram showing another embodiment of this invention. FIG. 4 is a block diagram of one embodiment showing the general concept of this invention, FIG. 5 is a circuit diagram of a main part showing another embodiment of this invention, and FIG. 6 is a block diagram of another embodiment of this invention. A block diagram showing one embodiment of the circuit, FIG. 7 is a structural sectional view showing an embodiment of the circuit shown in FIG. 1 above, and FIG. 8 is a sectional view showing an embodiment corresponding to the circuit shown in FIG. 6 above. , FIG. 9 is a circuit diagram showing an example of a source follower output circuit, FIG. 10 is a waveform diagram for explaining an example of its operation, and FIG. 11 is a circuit diagram for explaining an example of an input circuit. It is. IC: Semiconductor integrated circuit, L: Load (inductive), BS
T: Boost circuit, N1: Inverter circuit, AMP...
Amplifier circuit, CBI~CB3...Circuit block, To...
constant current source

Claims (1)

[Claims] 1. A unidirectional element provided to transmit a ground potential and/or operating voltage supplied from an external terminal to a ground potential or operating voltage of an internal circuit; and/or a unidirectional element arranged to flow a current toward the output terminal and/or a unidirectional element arranged to flow a current toward the operating voltage of the circuit from the input and/or output terminal. A semiconductor integrated circuit device characterized by: 2. The semiconductor integrated circuit device according to claim 1, wherein the unidirectional element is a diode-type transistor. 3. The semiconductor integrated circuit device according to claim 1 or 2, wherein the ground potential of the circuit is also supplied to an isolation region that separates elements.