JPH01245298A - Speech signal processor - Google Patents

Abstract

PURPOSE:To enable exact processing of speech signals by successively inputting the blocks of the speech signals to coders(decoders) of numbers in prescribed order, simultaneously coding(decoding) the signals by the plural coders(decoders), successively selecting the coders (decoders) in prescribed order and outputting the same. CONSTITUTION:The speech signals incoming at the speech signal processor used in case of compression, expansion, etc., of the speech signals are successively applied by each block in prescribed order to the plural coders(decoders) 1a-1c by a 1st selector switch 2a and the processing progresses simultaneously in the coders(decoders) 1a-1c. The blocks of the speech signals after the processing are successively taken out in prescribed order from the plural coders(decoders) 1a-1c by the 2nd selector switch 2b and are converted to the speech signals of the original time series which are transmitted. The exact processing of the speech signals is thereby executed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to an audio signal processing device that can be used to compress, expand, etc. an audio signal.

(Prior art) In recent years, from the perspective of increasing transmission efficiency for audio signals,
Nowadays, signals are encoded and compressed for transmission, and then the transmitted signals are decoded and expanded.

On the other hand, voice signals need to be transmitted in real time, otherwise unnatural calls will occur.

Therefore, in the case of encoding compression or decoding expansion, it is necessary to perform high-speed processing within a predetermined time, and for this reason, conventional audio signal processing apparatuses have been configured as follows.

That is, as shown in FIG. 4, an input audio signal is received by a signal processing processor 4a, and then sent via a bus 5 to signal processing processors 4b and 4C.

4d, . . . according to the processing status of each processor, and cause them to perform predetermined processing. The processors db, 4C, and 4d that have completed this processing send the processed audio signals to the processor 4a, and the processor 4a receives the processed audio signals, arranges them, and outputs them.

According to this audio signal processing device, a plurality of processors 4
Since audio signals a, 4b, 4c, ad, .

However, according to the above-mentioned audio signal processing device, in addition to encoding and compressing (or decoding and decompressing) the audio signal, the processor also performs processing to split the audio signal so that the load is evenly distributed, and to process the audio signal. Various processes such as division and combination processing, input/output processing related to audio signal (data) transfer, etc. need to be executed by a program, resulting in a problem that the program becomes complicated and sophisticated.

(Problem to be Solved by the Invention) As described above, the conventional audio signal processing device performs load distribution so that multiple processors perform audio signal processing, so the processing signal for this load distribution is Decomposition of
There has been a problem in that the number of processes associated with signal encoding/compression (or decoding/expansion), such as assembly processing and signal transfer processing, has increased, resulting in programs becoming more complex, larger, and more sophisticated.

The present invention was made to solve the problems of such conventional audio signal processing devices, and its purpose is to process audio signals accurately while having a simple configuration without using multiple processors. This is necessary by providing an audio signal processing device that can perform the following steps.

[Structure of the Invention] (Means for Solving the Problems) In the present invention, a synchronization signal corresponding to the boundary of the blocks is sent to an audio signal processing device that processes an incoming audio signal by dividing it into blocks of a predetermined length. A synchronization signal sending means and a plurality of codes (decoders) for encoding (or decoding) audio signals.
a first selection switch that provides blocks of audio signals to the plurality of encoders (decoders) in a predetermined order in synchronization with the synchronization signal sent out from the synchronization signal sending means; and the synchronization signal sending means. and a second selection switch for extracting blocks of encoded (de)coded audio signals from the plurality of encoders (decoders) in a predetermined order in synchronization with the synchronization signal sent from the means for audio signal processing. Configured the device.

(Operation) According to the above configuration, the incoming audio signal has multiple codes (duplicates).
Each block is sequentially given to the encoder in a predetermined order, and processing proceeds simultaneously in the encoder (de)coder, and the blocks of the processed audio signal are sequentially given to the encoder (decoder) in a predetermined order. The signal can then be extracted, converted into the original time-series audio signal, and sent out.

(Example) Hereinafter, the present invention will be described in detail with reference to the drawings. Fig. 1 is a block diagram of an audio signal processing device according to an embodiment of the present invention. In the figure, 10 is a pre-processing An audio signal arrives at this preprocessing/synchronization transmission unit 10. When this audio signal processing device performs encoding compression, this audio signal is an analog signal sent from a telephone. In addition, when the present audio signal processing device performs decoding and decompression, it is a digital signal related to encoding and compression sent from an exchange.

In the case of encoding compression, the preprocessing/synchronization sending section 10 includes an A/D conversion circuit 21, a frame creation circuit 22, and a synchronization signal generation circuit 23, as shown in FIG. The analog audio signal is digitized by the A/D conversion circuit 21 and sent to the frame creation circuit 22. The synchronization signal generation circuit 23 sends a synchronization signal for dividing the digitized audio signal into blocks of a predetermined length to the frame creation circuit 22, and selects a synchronization signal corresponding to the boundary of this block via the signal line 3. Send to switches 2a and 2b. The frame creation circuit 22 inserts a predetermined length of the digitized audio signal into one block based on the synchronization signal given from the synchronization signal generation circuit 23, and sends it to the selection switch 2a via the signal line 6.

Further, in the case of decoding and decompression, the preprocessing/synchronization sending section 10 is composed of a synchronization detection circuit 31, as shown in FIG. In this case, since the incoming audio signal has been encoded and compressed into a frame, the synchronization detection circuit 31 detects the frame synchronization bit added to the frame and synchronizes the frame (block) boundary. Create a signal 1. This is sent out via the signal line 3. On the other hand, the incoming audio signal is directly transmitted via the signal line 6 to the selection switch 2a.
sent to.

On the other hand, the selection switch 2a receives a synchronizing signal via the signal line 3, and every time a pulse corresponding to a block boundary is given, the audio signal on the signal line 6 is decoded from the encoder 1a to the encoder 1a.
encoder 1b → code (de)coder 1C → code (arrogant) encoder 1a →...
・Select and send in this order. Further, the selection switch 2b receives a synchronizing signal via the signal line 3, and every time a pulse corresponding to a block boundary is given, the encoder (de)coder 1b→
Code (de)coder 1C → code (de)coder 1a → code (de)coder 1
b→... to obtain the encoded (de)coded audio signal and send it to the signal line 7.

The encoders (de)coders 1a to 1C have the same configuration and require time equivalent to the length of two blocks for decoding, compression (expansion). Therefore, the audio signal of the first block is fed to the encoder (de)coder 1a, and the audio signal of the second block is further fed to the encoder (de)coder 1b. When starting to be supplied to the code (de)coder 1C, the code (de)coder 1
Transmission of the first block of encoded (de)coded and compressed (expanded) audio signals starts from point a. In other words, the number of code/decoders is determined from the processing speed of the code/decoder and the transmission speed of the transmitted audio signal, and the block length is determined.
The timing of switching the selection switches 2a and 2b is determined.

The operation of the audio signal processing device configured as described above will be explained below. Here, encoding compression will be taken as an example, and since similar operations are performed for decoding and expansion, the explanation thereof will be omitted.

The incoming analog audio signal is sent to the preprocessing/synchronization sending unit 10.
The signals are digitized by the A/D conversion circuit 21 of the frame generator 20, and are divided into blocks by the frame generation circuit 22, and are connected to the signal lines 6 blocks a, b, and c as shown in FIG.

d, e, f, . . . are transmitted. Then, by the first pulse of the synchronization signal applied via the signal line 3, the selection switch 2a selects the encoder 1a, and the selection switch 2b selects the encoder 1b. In synchronization with this, the audio signal of block a arrives at the selection switch 2a and is sent to the encoder 1a. At the next pulse of the synchronization signal, selection switch 2a selects encoder 1b, and selection switch 2b selects encoder 1C. As a result, the audio signal of block b is sent to encoder 1b. Until now, the encoding and compression of the audio signals of blocks a, b, c, . . . by the encoders 18 to 1C has not been completed, so the selection switch 2b
The output signal from is not significant. Next, the third pulse of the synchronization signal causes the selection switch 2a to select the encoder 1C, and the selection switch 2b to select the encoder 1a. At this time, the audio signal of block C is encoded by encoder 1.
Block a that is sent to C and encoded and compressed
The audio signal (a') is now output from the encoder 1a.Furthermore, with the fourth pulse of the synchronization signal, the selection switch 2a selects the encoder 1a, and the selection switch 2b selects the encoder 1b. At this time, the audio signal of block d is sent to the encoder 1a, and the encoding of the audio signal of block a is completed, while the encoded and compressed audio signal (b') of block b is sent to the encoder 1a. The signal line 7 is outputted from the encoder 1b and sent to the signal line 7 via the selection switch 2b.Hereinafter, similarly, the distribution of the incoming blocked audio signals to the encoders 1a to 1C is determined by the selection switch 2a.
At the same time, the selection switch 2b takes in and aligns the encoded and compressed audio signals. As a result, blocks a, b, c, d, e, f.

The audio signals that arrive in chronological order are encoded and compressed into a'', b-, C'', d-, e'', f-.

... will be output in the same chronological order.

[Effects of the Invention] As explained above, according to the present invention, a block of an incoming audio signal is sequentially given to a plurality of encoders (decoders) in a predetermined order, and simultaneously processed by a plurality of encoders (decoders). As encoding (de)coding progresses, multiple encoders (decoders) can be sequentially selected in a predetermined order to obtain a block of processed audio signals and sent out as the original time-series signal, with a simple configuration. This enables accurate processing of audio signals.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention, FIG.
The figure is a block diagram of a main part in the embodiment shown in FIG. 1, and FIG. 4 is a block diagram of a conventional voice signal @ processing device. 1a to 1C... code (decoder) 2a, 2b... selection switch 10... preprocessing/synchronization sending unit 21... A/D conversion circuit 22... frame creation circuit 23... Synchronous signal generation circuit 31... Synchronous detection circuit agent Patent attorney Nori Chika Nori Sokuma Sanno −

Claims (1)

[Claims] An audio signal processing device that processes an incoming audio signal by dividing it into blocks of a predetermined length, comprising: synchronization signal sending means for sending out a synchronization signal corresponding to the boundaries of the blocks; or decoding) multiple codes (decoding)
a first selection switch that provides blocks of audio signals to the plurality of encoders (decoders) in a predetermined order in synchronization with the synchronization signal sent out from the synchronization signal sending means; and the synchronization signal sending means. and a second selection switch for extracting blocks of encoded (de)coded audio signals from the plurality of encoders (decoders) in a predetermined order in synchronization with the periodic signal sent out from the means. An audio signal processing device characterized by: