JPH01241907A - Demodulator for angular modulated signal - Google Patents

Abstract

PURPOSE:To demodulate, asynchronously with a carrier a modulation signal from an angular modulated signal by means of a band-pass filter of comparatively simple constitution by using a phase change per unit time of a filtered modulated signal so as to demodulate the modulation signal by means of the band- pass filter. CONSTITUTION:The angular modulated signal is given to filter means 38, 39 from an orthogonal conversion means 37 and the modulated signal is filtered. A phase change DELTAtheta per predetermined unit time DELTAt is detected from the filtered modulated signal by a detection means 40, and in the case of demodulating the modulation signal, the band-pass filter 51 eliminated the component of the modulated signal below the predetermined lower limit frequency and integrates the component over the lower limit frequency. Thus, the modulation signal is demodulated from the angular modulated signal, asynchronously with a carrier, by using the phase change DELTAtheta detected by the detection means 40 by means of the band-pass filter 51 of comparatively simple constitution.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a device for demodulating a signal subjected to negative modulation such as frequency modulation or phase modulation.

Prior Art FIG. 6 shows a typical prior art phase modulated signal receiver 1.
FIG. 2 is a block diagram showing a simplified electrical configuration of FIG. The phase modulated signals input from input terminal 2 are respectively given to multipliers 3.4. In association with the multiplier 3.4, a local oscillation circuit 5 is provided which oscillates at a frequency near the carrier wave of the phase modulation signal inputted from the input terminal 2. Signal and local oscillator circuit 5
The multiplier 3 multiplies the input phase modulation signal by the oscillation signal from the local oscillation circuit 5 whose phase is advanced by 90 degrees by the phase shifter 6. These multiplier 3.4, local oscillation circuit 5, and phase shifter 6 constitute orthogonal transformation circuit 7.

The output from the multiplier 3.4 has a cutoff frequency commensurate with the modulation frequency, and is applied to the detection circuit 10 through low-pass filters (hereinafter abbreviated as LPF) 8.9, which are filtering means. . In the detection circuit 10, the L
The output from the PF 8 is directly applied to the multiplier 11 and is also applied to the multiplier 11 after being delayed by a predetermined time Δt via the delay circuit 13 . Similarly, the output from the LPF 9 is applied directly to the multiplier 12 and also to the multiplier 12 via the delay circuit 14.

The outputs from these multipliers 11 and 12 are added together in an adder 15 and provided to a divider 16.

Further, the output from the LPF 8 is directly applied to a multiplier 17, and the output from the LPF 9 is delayed by a delay circuit 14 and applied to the multiplier 17. Further, the output from the LPF 8 via the delay circuit 13 is given to a multiplier 18, and the output from the LPF 9 is also directly given to this multiplier 18. The output from the multiplier 18 is given to the divider 16 after subtracting the output from the multiplier 17 in one subtracter.

The divider 16 divides the output from the adder 15 and the output from one subtracter, and the division result is sent to the phase detection circuit 20.
The phase detection circuit 20 calculates the phase difference between the output of the adder 15 and the output of the subtracter 19 per time Δt, and outputs Δ representing the calculation result.
θ is a bypass filter (hereinafter abbreviated as HP F) 2
1, the HPF 21 removes a DC component corresponding to the phase difference or frequency caused by the difference between the oscillation output from the local oscillation circuit 5 and the carrier wave, and passes through the integration circuit 22 to the I-I P F Given to 23. This HP F 23 removes the DC component generated by the integral constant of the integrating circuit 22, and the signal demodulated into, for example, an acoustic signal is supplied from an output terminal 24 to, for example, a power amplifier circuit.

The cutoff frequencies of the PFs 21 and 23 are selected to be lower than the lowest reproduction frequency of the demodulated signal, such as an audio signal, which is derived to the output terminal 24, and the oscillation frequency of the local oscillation circuit is input to the input terminal 2. The difference between the phase modulated signal and the carrier wave is selected so that it is less than or equal to the cutoff frequency of the above-mentioned IP F21.23.The signal thus phase modulated is demodulated asynchronously to the carrier wave. It's coming.

[Problem to be solved by the invention] In the receiver configured as described above, the I-1PF
The transfer functions of 21 and 23 are both expressed as Sτ, /<1+τ,), where S is the Laplace operator and τ1 is the time constant, and the transfer function of the integrating circuit 22 is expressed as
2, it is expressed as 1/Sτ2. therefore](
I) F2], , 23 and the integration circuit 22 can be expressed as the transfer function H(S), where the numerator and denominator are S.
By dividing by r1, it can be expressed as.

On the other hand, the linear delivery function H1(S) of the -th order bandpass filter (hereinafter abbreviated as BPF) is expressed as, and therefore, from the second and third equations, the time constant τ3. τ
It is understood that it is possible to replace the PFs 21 and 23 and the integrating circuit 22 with BPFs depending on the selection of .

Further, as described above, the output of the detection circuit 10 is
, the integrating circuit 22, and the HP F 23, errors are accumulated at each stage, and it is necessary to take into consideration so-called overflow and underflow. Furthermore, m 3S is complex in this way,
There was a considerable phase lag in the output signal with respect to the input signal.

SUMMARY OF THE INVENTION An object of the present invention is to provide an angle modulation signal demodulation device that can simplify the structure, suppress phase delays between input and output signals, and reduce errors.

Means for Solving the Problems The present invention provides orthogonal transformation means for orthogonally transforming an angular modulation signal; r-wave means for filtering a modulation signal from the output of the orthogonal transformation means; and a predetermined unit time of the modulation signal. a detecting means for detecting a phase change Δθ per Δt; and when demodulating the modulated signal using the phase change Δθ, removes components of the modulated signal below a predetermined lower limit frequency; 1. A demodulating device for an angular modulation signal, characterized in that it includes a bandpass filter that integrates a component of a lower limit frequency.

Operation According to the present invention, the angularly modulated signal is applied from the orthogonal transform means to the r-wave means, and the modulated signal is filtered.

In the filtered modulated signal, a phase change Δθ per predetermined unit time Δt is detected by the detection means, and using this phase change Δθ, the bandpass filter demodulates the modulated signal. Components of the modulated signal below a predetermined lower limit frequency are removed, and components above the lower limit frequency are integrated.

Therefore, the phase change Δ detected by the detection means at
Using θ, a modulated signal can be demodulated from an angular modulated signal asynchronously to a carrier wave by a bandpass filter realized with a simple configuration.

Embodiment FIG. 1 shows a phase modulation signal receiver 3 according to an embodiment of the present invention.
FIG. 1 is a block diagram showing a simplified electrical configuration of FIG. The phase modulation signal input from the input terminal 32 is sent to the multiplier 33
．． 34 respectively. In association with the multipliers 33 and 34, a local oscillation circuit 35 is provided which oscillates at a frequency near the carrier wave of the phase modulation signal inputted from the input terminal 32. The multiplier 33 multiplies the input phase modulation signal by the oscillation signal from the local oscillation circuit 35, and the multiplier 33 multiplies the input phase modulation signal and the oscillation signal from the local oscillation circuit 35 whose phase is advanced by 90 degrees by the phase shifter 36. Perform multiplication with the signal. These multipliers 3
3.34, the local oscillation circuit 35, and the phase shifter 36 constitute an orthogonal transformation circuit 37.

The output from the multiplier 33.34 has a cutoff frequency exactly equal to the modulation frequency and is filtered by L PFB8.39, which is a filtering means.
are applied to the detection circuit 40 via the respective signals. In the detection circuit 40, the output from the LPF 38 is directly applied to a multiplier 41, and is also applied to the multiplier 41 after being delayed by a predetermined time Δt via a delay circuit 43.

Similarly, the output from the LPF 39 is applied directly to the multiplier 42 and also to the multiplier 42 via the delay circuit 44. The outputs from these multipliers 41 and 42 are added together in an adder 45 and then provided to a divider 46.

Further, the output from the LPF 38 is directly applied to a multiplier 47, and the output from the LPF 39 is delayed by a delay circuit 44 and applied to the multiplier 47.

Further, the output from the LPF 38 via the delay circuit 43 is given to a multiplier 48, and this multiplier 48 also has an LPF
The output from 39 is given directly. The output from the multiplier 48 is subtracted from the output from the multiplier 47 by four subtracters, and the result is given to the divider 46.

The divider 46 divides the output from the adder 45 and the output from the four subtracters, and the division result is sent to the phase detection circuit 50.
The phase detection circuit 50 calculates the phase shift between the output of the adder 45 and the output of the four subtracters per time Δt, and outputs the result of the calculation, that is, an output Δθ representing the phase change. is applied to the BPF 51, and the signal demodulated into, for example, an acoustic signal is applied from the output terminal 54 to a power amplifier circuit or the like.

In the above-mentioned detection circuit 40, the output △ representing the phase change amount
θ is obtained as follows. The phase modulation signal input from the input terminal 32 is input to the orthogonal transform circuit 37,
Near the carrier wave, the signal is orthogonally transformed by the oscillation output from the local oscillation circuit 35 that generates an asynchronous signal.
Unnecessary bands are removed by PF38 and 39, and are provided to the detection circuit 40. The detection circuit 40 performs arithmetic operations on the input signal in a solid manner, and an output Δθ representing a phase change per unit time Δt is calculated as follows. That is, the value of the input signal at a certain time is A =
When R + 1 J
Ij U4- R2+°X2 R1-°XIA R
++jX+ (RijX+>(R+-jXi), and thus the output Δθ representing the phase change can be obtained.

FIG. 2 is a block diagram that does not show a specific configuration when the BPF 51 is realized by a digital circuit. The output Δθ from the phase detection circuit 50 is provided to an adder 62 via a coefficient multiplier 61 having a coefficient Fω. Also, this output Δθ is
The signal is delayed by one sampling period by a delay circuit 63 and is applied to an adder 62 via a coefficient multiplier 64 having a coefficient F1. The output Δθ delayed by one sampling period in the delay circuit 63 is further delayed by one sampling period in the delay circuit 65, and is applied to the adder 62 via a coefficient multiplier 66 having a coefficient F2.

The output from the adder 62 is delayed by one sampling period by a delay circuit 67 and output from the coefficient multiplier 6 having a coefficient of 01.
8 to the adder 62. The output of adder 62, which has been delayed by one sampling period by delay circuit 67, is further delayed by one sampling period by delay circuit 69, and is fed back to adder 62 via coefficient multiplier 70 having coefficient G2.

In the BPF 51 configured in this way, when the desired transfer function H(S) is expressed by the sixth formula, each of the coefficients F
ω, Fl, F2. Ql and G2 are each determined as follows.

Convert this into 2, however, vinegar.

Therefore, each coefficient multiplier 61.64, 66.68.70
The coefficients Fω, Fl, P2. Gl and G2 can be calculated as follows. Therefore, here, for example, the cutoff frequency fc is set to 101-1z, and the sampling period T is set to 25X.
10-7sec, ao=0, a,=1.59X10
-2, a2=0, bo=1, b+=1.59X
10-2, b2=2.533xlO-', B
The transfer function H8 of the PF51 is obtained as follows.

At this time, each Z-transformed coefficient is A, = 12732.4,
A1=0, A2--12732.4, B.

=1.6213xlO", B, =-3,2423x10
8, B2 = 1.62101xlO', therefore, the coefficients of each coefficient multiplier 61, 64.66.68.70 are Fω-7, 8534x 10-5, Fl-0, F
2=-7,8534xlO-5, G1-1.99984
, G2--0.99984. The frequency characteristics of the BPF 51 constructed using these coefficients are shown in FIG.

As is clear from FIG. 3, components in the frequency band below 10 Hz, which is the cut-off frequency IC, are removed, thereby realizing the HPF function, and reducing the deviation between the oscillation output from the local oscillation circuit 35 and the carrier wave. DC components corresponding to the phase difference or frequency difference caused by this can be removed. Further, it is understood that above the cutoff frequency fc of 10 Hz or more, the logarithmic level of the output has a linear relationship with the change in the logarithmic level of the frequency characteristic, and thus the integral function is realized. Furthermore, by doubling the frequency, the transmission level drops by 6 dB, which makes it clear that the BPF 51 has a first-order transfer function, as shown by the above-mentioned equation 19.

FIG. 4 is an electrical circuit diagram of a B P F 51a which realizes the same function as the B F' F 51 described above using an analog circuit. The output Δθ of the phase detection circuit 50 is determined by the resistor R1,
It is applied to the non-inverting input terminal of operational amplifier 71 via R4, capacitors CI and C2, and resistor R3. The output of the operational amplifier 71 is led out to the output terminal 54, divided by resistors R5 and R6, and applied to the inverting input terminal (JM yN). The output from the operational amplifier 71 is also connected via a resistor R2 to a connection point 72 between resistors R1, R4.
will be returned to.

The gain A(ω) of the BPF 51a configured in this way is expressed by Equation 20.

However, if the resistance values of the respective resistors R1 to R6 are R1 to R, and the capacitance of the capacitor (:l, C2 is 01°C2), then the following equation is obtained.

Tatashi Ao is the finished gain of the amplifier.

Also, the design calculation formula for this BPF51a is C1-C2-C,
R3=Ro=R and the deviation is Rs = 2 Rs...
(26) is required. Therefore, the cutoff frequency fc is H
When it is on the order of z, the capacitance C is on the order of μF,
The resistance R is on the order of Ω, and the cutoff frequency fc is K.
When it is on the order of Hz, the capacitance C is on the order of nF, and the resistance R is on the order of I×Ω.

For example, when fc=lOHz and Q=1.5, R1
-100I × Ω, then from the above formula 23, R2~28
KΩ, and R1 = 331 (Ω, the 25th
From the formula, C'v0.48μF, and from the 24th formula, R
，? 12 becomes Ω. Furthermore, when Ra=10 and Ω, it becomes Rs-20KΩ from Equation 26. B set for each of these resistance values R1 to R6 and capacitance C,,C2
The frequency characteristics of P P 51 a are shown in FIG.

As is clear from Fig. 5, this B F' F 51
Similarly to the above-mentioned BPF51, a also has a cutoff frequency fc-10
It is understood that below Hz, it functions as the HPF 21 in the prior art, and above this cutoff frequency fc=10 Hz, it functions as the integrating circuit 22 in the prior art.

In this way, it is possible to realize the present receiver 31 which demodulates the angle modulated signal asynchronously to the carrier wave. Furthermore, as described above, the receiver 31 of the present invention using the PFs 51 and 51a can have a simpler configuration than the receiver 1 of the prior art, thereby reducing the phase delay between input and output signals. In addition, as shown in FIG. 2, digital processing is also possible, which facilitates integration.

Effects of the Invention As described above, according to the present invention, the angular modulation signal is given to the filtering means, the modulation signal is passed through, and the phase change Δθ per unit time Δt of the filtered modulation signal is used to calculate the angle modulation signal. The modulated signal is demodulated by a band-pass filter, and the band-pass filter removes components of the modulated signal below a predetermined lower limit frequency and integrates components above the lower limit frequency. Therefore, from the phase change Δθ detected by the detection means, it is possible to demodulate the modulated signal from the angular modulated signal asynchronously to the carrier wave using a bandpass filter realized with a relatively simple configuration, and also to It is possible to suppress the phase delay and reduce the error.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a simplified electrical configuration of a receiver 31 according to an embodiment of the present invention, FIG. 2 is a block diagram showing a specific configuration of a BPF 51 used in the receiver 31, and FIG.
The figure is a graph showing the frequency characteristics of the BPF 51 shown in FIG. 2, FIG. FIG. 6 is a block diagram showing a simplified electrical configuration of the receiver 1 of the prior art. 31...Receiver, 33.34, 41, 42, 47°4
8... Multiplier, 35... Local oscillation circuit, 36...
Phase shifter, 37...Orthogonal conversion circuit, 38.39...L
PF, 40...detection circuit, 45.62...adder,
46... Divider, 49... Subtractor, 50... Phase detection circuit, 51° 51 a-B P F, 61, 64,
66.68.70...Coefficient unit, 63,65,67.69
...Delay circuit, 71...Operation amplifier agent Patent attorney Keiichi Nishikyo -) IR included →'s °C Old PΔ (→'s, p

Claims (1)

[Scope of Claims] Orthogonal transformation means for orthogonally transforming an angular modulation signal, filtering means for filtering a modulation signal from the output of the orthogonal transformation means, and a phase change of the modulation signal per predetermined unit time Δt. a detection means for detecting a phase change Δθ, and when demodulating the modulated signal using the phase change Δθ, removes a component of the modulated signal below a predetermined lower limit frequency, and removes a component above the lower limit frequency. 1. A demodulating device for an angular modulation signal, comprising: a bandpass filter that performs integration.