JPH01239859A - Method of mounting semiconductor element - Google Patents

Abstract

PURPOSE:To improve alignment accuracy, to improve alignment work, and to confirm the alignment accuracy after adhering by aligning a semiconductor element while observing one or both of a wiring pattern and a boundary of layers via a through hole opened in advance in a mounting board. CONSTITUTION:In order to couple a semiconductor element 1 to a mounting board 2 through a salient electrode 4, a through hole 5 capable of observing the wiring pattern of the element 1 and/or a layer of the element 1 through a boundary is formed in advance at the board 2, and the element 1 is aligned while observing at least one of the wiring pattern of the element 1 and the boundary of the layer via the through hole 5. For example, the element 1 is held at a bonding head 6, and the wiring pattern of the face of the element 1 to be coupled is observed via the hole 5 by a TV camera 7. An image observed by the camera 7 is transmitted to a pattern recognition unit 8 to be displayed on a TV monitor 9, while the head 6 is operated in cooperation with the unit 8.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for mounting a semiconductor element on a mounting substrate.

[Conventional technology]

Conventionally, in order to mount a semiconductor element on a mounting substrate, for example, the electrodes of the semiconductor element are bonded all at once to the electrodes on the substrate using protruding electrodes (also called bumps) provided on the semiconductor element or the substrate. This is done by so-called Guyang bonding.

In gigantic bonding, the alignment accuracy between a semiconductor element and a substrate is required to be, for example, 10 μm or less. In order to achieve such alignment accuracy, positioning is performed after pattern recognition is performed on the electrode positions of the semiconductor element and the electrode positions on the substrate side using separate cameras, etc., and calculations are performed.

[Problem to be solved by the invention]

When positioning in this way, after pattern recognition, the camera must be moved, or the semiconductor element on the camera must be moved by a certain amount and set on the substrate. In any case, since the electrode position is not moved while observing the electrode position through a camera, but is moved only by calculation processing after pattern recognition, there is a problem that alignment accuracy is adversely affected.

Furthermore, it is necessary to confirm whether the semiconductor elements that have been aligned and bonded in this manner are actually aligned correctly. If a protruding electrode is provided on the semiconductor element side, this can be confirmed by X-ray fluoroscopy. but,
When a protruding electrode is provided on the substrate side, the electrode of the semiconductor element is usually an AI electrode, so X-rays pass through it.
It was not possible to confirm alignment.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a semiconductor element mounting method that can improve alignment accuracy, improve alignment work, and confirm alignment accuracy after bonding.

[Means to solve the problem]

In order to solve the above-mentioned problems, this invention pre-drills a through-hole in a mounting substrate through which the wiring pattern of a semiconductor element and/or the layer boundary of the semiconductor element can be observed, and allows the wiring pattern to be formed through the through-hole. The semiconductor element is aligned while observing one or both of the layer boundaries and the layer boundaries.

[For production]

Since the wiring pattern and/or layer boundaries of the semiconductor element to be mounted can be seen through the through-hole, it is easy to correct the misalignment of the semiconductor element so that the wiring pattern and/or layer boundary is in the correct position. Positioning can be performed with high precision. Moreover, the position after joining can be easily confirmed through the through hole.

〔Example〕

FIG. 1 and FIG. 2 show the state of implementation of one embodiment of the semiconductor element mounting method according to the present invention. Here, an IC is used as the semiconductor element 1, and a pin grid array (PGA) substrate is used as the substrate 2 on which it is mounted. Protruding electrodes 4 are provided on the central tips of mounted circuits 3 formed on the substrate 2. A through hole 5 penetrating the substrate 2 is formed in a portion of the substrate 2 surrounded by the central end portions of the mounted circuits 3 . The protruding electrodes 4 and their inner parts are the mounting portion.

The semiconductor element 1 is held by the bonding head 6 from the back side of the bonding surface, and the bonding surface of the semiconductor element 1 is directed toward the mounting portion of the substrate 2. A wiring pattern and electrodes are formed on this bonding surface of the semiconductor element 1. The wiring pattern on the bonding surface of the semiconductor element 1 is observed through the through hole 5. This observation is performed, for example, with a TV camera 7 placed on the side of the through hole 5 of the substrate 2 opposite to the semiconductor element 1. TV camera 7
The captured image is sent to a pattern recognition device 8 and displayed on a TV monitor 9 connected to this device 8.

On the other hand, the bonding head 6 operates in conjunction with the pattern recognition device 8. The wiring pattern of the semiconductor element 1 observed through the through hole 5 with the TV camera 7 is as follows.
The wiring pattern of the semiconductor element must always be the same as the exact mounting state. If they are not the same, the through hole 5
While observing through, make sure that both patterns match.
The pounding head 6 is moved to align the semiconductor element 1. This movement may be various, such as parallel movement or rotation, depending on the mismatch situation.

Next, one example of alignment will be explained in more detail. Third
As shown in figure (a), protruding electrodes 4 on the surface of the substrate 2...
is displayed on the screen 9a of the TV monitor 9 as viewed from the back side of the board 2. Furthermore, as shown in FIG. 3(b), the wiring pattern (
20 (indicated by a thin line in FIG. 3+bl) are displayed in an overlapping manner and used as a reference for positioning. This wiring pattern 20 only needs to be recognized once even when a plurality (including a large number) of semiconductor elements having the same wiring pattern are mounted.

The wiring pattern (indicated by thick lines inside the through hole 5 in FIG. 3(C)) of the semiconductor element 1 to be mounted is photographed and observed with the TV camera 7 through the through hole 5.
It will be displayed on the TV monitor 9 as you can see. In this figure, the reference wiring pattern 20 and the wiring pattern 10 of the semiconductor element 1 to be mounted are misaligned. Figure 3 (d
As shown in FIG. 1, the bonding head 6 is moved so that the wiring pattern 10 photographed by the TV camera 7 exactly matches the reference wiring pattern 20 on the screen 9a of the TV monitor, and the position of the semiconductor element 1 is adjusted. Correct the deviation. Then, the bonding head 6 is lowered with both patterns 10 and 20 exactly aligned, and the semiconductor element 1 and the substrate 2 are bonded.

The alignment and/or bonding is done on the TV monitor 9.
This may be done manually while looking at the image, or it may be done automatically under computer control without visualization, and there are no particular limitations on the method.

As mentioned above, if the wiring pattern of the semiconductor element at the correct bonding position is recognized and memorized in advance, and the positional deviation between the wiring pattern of the semiconductor element observed through the through hole and the memorized wiring pattern is corrected. , alignment can be easily performed. Even if the positions where the through holes are provided are shifted from one substrate to another, the only difference is that the wiring pattern of the semiconductor element visible through the through holes differs from substrate to substrate, and alignment will not be hindered.

Even after bonding, the wiring pattern of the semiconductor element 1 can be seen through the through hole 5, so even if no protruding electrodes are provided on the semiconductor element side, alignment can be easily confirmed. Even if no protruding electrodes are provided on the substrate side, alignment can be easily confirmed.

If expensive equipment investment cannot be made in the trial manufacturing process, positioning is performed as shown in FIG. 4, for example. A glass mask 11 used to manufacture the semiconductor element 1 to be mounted is prepared. For example, the electrodes of the wiring pattern of the glass mask 11 are connected to the electrodes of the substrate 2 to be bonded so that the wiring pattern of the glass mask 11 matches the wiring pattern on the semiconductor element when set at the correct bonding position. The glass mask 11 is set and fixed accordingly. Next, through the through hole 5 of the substrate 2,
While viewing the wiring pattern of the semiconductor element 1 to be mounted with a microscope or TV camera 17, etc., position the semiconductor element 1 and the substrate 2 so that the pattern of the mask 11 matches the wiring pattern of the semiconductor element 1. If alignment is performed, alignment can be done at low cost.

Note that this invention is not limited to the above embodiments. Although the illustrated substrate is a PGA substrate with protruding electrodes, the mounting substrate used in the present invention is not limited to this, and may be any substrate for mounting semiconductor elements that performs bonding via the protruding electrodes such as gigantic bonding. It can be anything like that. The semiconductor element to be mounted is not limited to an IC. Also,
The shape of the through hole formed in the substrate for observing the wiring pattern of the semiconductor element is not limited to a circular shape either.

The number of holes is not limited to one, but may be two or more. In order to recognize the wiring pattern of the semiconductor element in the correct position, in the above embodiment, the protruding electrodes on the board were seen through with an X-ray, but it is also possible to see through the mounted circuit on the board.
It may also be done by other methods.

Furthermore, the wiring pattern of the semiconductor element at the correct position visible through the through-hole of the substrate can also be made clear on a TV screen or the like by measuring the position of the through-hole with respect to the electrode or protruding electrode on the substrate. Although the protruding electrodes were provided only on the substrate side in the above embodiments, they may be provided only on the semiconductor element side or on both sides. On the mounting board,
It is not necessarily necessary to provide through holes, terminal pins, etc.

The wiring patterns 10°20 shown in FIGS. 3(b) to 3(d) do not faithfully represent the actual wiring patterns;
The figures are simplified and schematically shown for convenience of illustration.

In the above description, the wiring pattern of the semiconductor element is viewed through the through hole of the substrate. However, depending on the way the light is applied, the layer boundaries in the semiconductor element can also be seen through the through-holes, so alignment can be performed using these layer boundaries in the same way as when viewing the wiring pattern. Alternatively, alignment may be performed while looking at both layer boundaries and wiring patterns. Note that the layer boundaries in a semiconductor element include, for example, a PN junction boundary, a boundary between N layers, a boundary between P layers, etc., and is not particularly limited.

After the semiconductor element is mounted, the semiconductor element can be sealed by injecting resin not only from the top surface of the semiconductor element but also from the through-hole side of the substrate using a normal resin sealing method, for example. The semiconductor element may be sealed by other methods.

〔Effect of the invention〕

As described above, in the semiconductor device mounting method according to the present invention, since the semiconductor device is aligned while observing the wiring pattern and/or layer boundaries of the semiconductor device through the through hole, the alignment accuracy is improved. The alignment work can be improved. After bonding the semiconductor elements, alignment accuracy can be checked through the through holes.

[Brief explanation of the drawing]

Fig. 1 is a partial cross-sectional schematic diagram showing one implementation state of the semiconductor element mounting method according to the present invention, Fig. 2 is a perspective view of a part thereof, and Fig. 3 fa) to (d) are examples of alignment. FIG. 4 is a partially cross-sectional schematic diagram showing another implementation state. 1... Semiconductor element 2... Mounting board 4... Protruding electrode 5... Through hole 10... Wiring back of semiconductor element - Agent Patent attorney Takehiko Matsumoto

Claims (1)

[Claims] 1. When bonding a semiconductor element to a mounting substrate via a protruding electrode, a through hole is formed in the mounting substrate in advance through which the wiring pattern of the semiconductor element and/or the layer boundary of the semiconductor element can be observed. 1. A method for mounting a semiconductor device, wherein the semiconductor device is aligned while observing at least one of a wiring pattern and a layer boundary of the semiconductor device through the through-hole.