JPH01236693A - Manufacture of printed wiring board - Google Patents
Manufacture of printed wiring boardInfo
- Publication number
- JPH01236693A JPH01236693A JP6399188A JP6399188A JPH01236693A JP H01236693 A JPH01236693 A JP H01236693A JP 6399188 A JP6399188 A JP 6399188A JP 6399188 A JP6399188 A JP 6399188A JP H01236693 A JPH01236693 A JP H01236693A
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- wiring board
- boards
- soldering
- electronic components
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 4
- 238000005476 soldering Methods 0.000 claims abstract description 18
- 238000000034 method Methods 0.000 claims abstract description 13
- 239000004840 adhesive resin Substances 0.000 claims abstract description 8
- 229920006223 adhesive resin Polymers 0.000 claims abstract description 8
- 239000012808 vapor phase Substances 0.000 claims abstract description 7
- 238000010438 heat treatment Methods 0.000 claims description 5
- 239000004020 conductor Substances 0.000 abstract description 3
- 230000000694 effects Effects 0.000 abstract description 2
- 230000000717 retained effect Effects 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 13
- 229910000679 solder Inorganic materials 0.000 description 10
- 239000000853 adhesive Substances 0.000 description 8
- 230000001070 adhesive effect Effects 0.000 description 8
- 239000002131 composite material Substances 0.000 description 7
- 229920005989 resin Polymers 0.000 description 6
- 239000011347 resin Substances 0.000 description 6
- 239000000463 material Substances 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 238000009833 condensation Methods 0.000 description 2
- 230000005494 condensation Effects 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 239000003973 paint Substances 0.000 description 2
- 239000012071 phase Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 239000004568 cement Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- RVZRBWKZFJCCIB-UHFFFAOYSA-N perfluorotributylamine Chemical compound FC(F)(F)C(F)(F)C(F)(F)C(F)(F)N(C(F)(F)C(F)(F)C(F)(F)C(F)(F)F)C(F)(F)C(F)(F)C(F)(F)C(F)(F)F RVZRBWKZFJCCIB-UHFFFAOYSA-N 0.000 description 1
- 229920001225 polyester resin Polymers 0.000 description 1
- 239000004645 polyester resin Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 230000029058 respiratory gaseous exchange Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Combinations Of Printed Boards (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明はエレクトロニクス機器に使用するプリント配線
板の製造方法に関し、とりわけ二枚の両面プリント板を
複層に形成したのち、最表両面に、リフロウはんだ付け
法による表面装着部品を形成するハイブリッド回路板に
関する。[Detailed Description of the Invention] Industrial Application Field The present invention relates to a method of manufacturing a printed wiring board used in electronic equipment, and in particular, after forming two double-sided printed boards into a multilayer, reflow soldering is applied to both outermost surfaces. The present invention relates to a hybrid circuit board that forms a surface-mounted component using a mounting method.
従来の技術
従来、セラミック板とセラミック板、ガラスエポキシと
ポリイミド等の貼り合わせをおこなった複合ハイブリッ
ド回路板は存在していた。しかし、貼り合わせ後に表面
装着部品のリフロウはんだ付けを行うと、互いの貼り合
わせ部が、共に加熱され、その接着機能を失なうかある
いはその接着機能を著しく損う。Conventional Technology Conventionally, composite hybrid circuit boards have existed in which ceramic boards are bonded to ceramic boards, glass epoxy boards are bonded to polyimide, and the like. However, when reflow soldering of surface-mounted components is performed after bonding, the mutually bonded parts are heated together, and the bonding function is lost or significantly impaired.
発明が解決しようとする課題
本発明の目的は、予め、一方の面に電子部品の実装され
たプリント配線板の他方の面に対して、別の電子部品を
実装する際に、先に実装されている電子部品への熱的影
響が実質的に無視できる状況下で、効率的に、はんだ付
け処理を行うことができる手段を提供することにある。Problems to be Solved by the Invention An object of the present invention is to first mount another electronic component on the other side of a printed wiring board with electronic components mounted on one side. An object of the present invention is to provide a means for efficiently performing soldering processing under conditions where the thermal influence on electronic components can be substantially ignored.
課題を解決するための手段
本発明は、複数のプリント配線板を着脱可能な介在物を
挾み込んで重ね合わせ、前記プリント配線板の最表部の
上下両面に対して、気相加熱はんだ付け工程の処理を行
うものである。このとき、介在物は着脱可能な粘着性樹
脂を用いることによリ、この発明の工程が好適に実行可
能である。Means for Solving the Problems The present invention involves stacking a plurality of printed wiring boards with removable inclusions in between, and applying vapor phase heat soldering to both upper and lower surfaces of the outermost part of the printed wiring boards. It is used to process processes. At this time, the process of the present invention can be carried out suitably by using a removable adhesive resin as the inclusion.
作用
本発明によると、予め、電子部品の装着されたプリント
配線板を、複数で、互いに向き合わせて、その間に介在
物を挟み込んだ状態で気相加熱はんだ付け処理を行う場
合、介在物で封じられた面の温度上昇を抑えることがで
き、最表面側が所望の加熱温度に達した段階でも、その
プリント配線板の内面側の温度は相当の低い温度を保持
することができる。According to the present invention, when a plurality of printed wiring boards on which electronic components are mounted are placed facing each other and subjected to a vapor phase heating soldering process with inclusions sandwiched between them, the soldering process is performed in advance by sealing the printed wiring boards with the inclusions. The temperature rise on the heated surface can be suppressed, and even when the outermost surface reaches the desired heating temperature, the temperature on the inner surface of the printed wiring board can be maintained at a considerably low temperature.
実施例
本発明では、はんだ耐熱性の低い、前記貼り合わせ部の
状態を改善するため次の手段をとる。すなわち、貼り合
わされる配線板の孔又はスルーホール接続孔は前もって
、有機樹脂又は無機セメントの熱伝導の低いもので閉鎖
する。その後、エポキシ樹脂、ポリエステル樹脂などの
接着層を用いて貼り合わせを、全面に対しておこなう。Embodiment In the present invention, the following measures are taken to improve the condition of the bonded portion, which has low solder heat resistance. That is, the holes or through-hole connection holes in the wiring boards to be bonded are closed in advance with organic resin or inorganic cement that has low thermal conductivity. Thereafter, the entire surface is bonded using an adhesive layer such as epoxy resin or polyester resin.
この際対向する、スルーホールめっき部分で、電気的接
続を、相互の配線板として必要とする箇所に対しては、
はんだペーストの印刷をおこない、前記、樹脂の熱硬化
接着工程と兼用して、215℃、30秒のリフロウはん
だ付けを赤外熱源、上下加熱、すなわち頂部及び底部か
らの両面加熱をおこなう。こうして一体化した配線板の
貼り合わせ部分が、外気との対流や、空気の呼吸作用を
おこさないようにする。At this time, for the opposing through-hole plated parts that require electrical connection as mutual wiring boards,
The solder paste is printed, and reflow soldering is performed at 215° C. for 30 seconds using an infrared heat source, in combination with the resin thermosetting bonding step, using vertical heating, that is, double-sided heating from the top and bottom. The bonded portion of the integrated circuit board is thus prevented from causing convection with outside air or breathing action of air.
ついで、複合板全体を1枚としてその片面又は両面には
んだペーストの印刷と表面装着部品の搭載をおこなう。Next, the entire composite board is made into one sheet, and solder paste is printed on one or both sides of the composite board and surface-mounted parts are mounted.
この複合板をペーパーフェイズ槽に投入すれば、フレオ
ン系溶剤蒸気の凝結は、前記片面又は両面に対しておこ
り、粘着面にはおこらない。従って、外面が215℃の
時、粘着面は150℃以下に保たれる事が可能となる。When this composite plate is placed in a paper phase tank, condensation of Freon solvent vapor occurs on one or both sides, but not on the adhesive side. Therefore, when the outer surface is at 215°C, the adhesive surface can be kept at 150°C or lower.
従って、粘着面を同種のけんだ(183℃の融点)。Therefore, the adhesive surface is a homogeneous binder (melting point of 183° C.).
熱軟化温度160℃の樹脂でおこなってあったとしても
複合の接着部が破壊されたり、接着強度が低下する恐れ
が全くないので、コストの安い汎用性の高い接着素材を
用いる事ができる。Even if a resin with a heat softening temperature of 160° C. is used, there is no risk of the composite bonding part being destroyed or the adhesive strength decreasing, so a low-cost and highly versatile adhesive material can be used.
つぎに、図面を参照して、具体例をのべる。Next, specific examples will be described with reference to the drawings.
図面は本発明実施例を説明するための工程要部の展開断
面図である。第1のプリント配線板1は、その両面に銅
箔による配線層3が所定のパターンで形成されており、
その一方の面の配線層3には、錫−鉛系のはんだペース
ト9を付着させている。そして、このはんだペースト9
は、表面実装型の電子部品8をその端部の電極部ではん
だ接合するためのものである。また、このプリント配線
板lは、たとえば、厚さ1.0mmのガラス布基材樹脂
基板で構成され、両面の配線層3に対して、直径約0.
6mmの穴、いわゆる、スルーホールが形成されている
が、このスルーホールは、両面配線層接続の必要のある
ときは導電性材、たとえば、導電ペイントで、導電接続
の不要のときには樹脂ペイントで、それぞれを充填材6
として塞ぐ。第2のプリント配線板2は、内面の必要部
分にはんだ層7が形成されていることを除くと、第1の
プリント配線板1と同等構成であり、配線層4も、配線
層3と同等のものが用いられる。The drawings are developed cross-sectional views of main process parts for explaining embodiments of the present invention. The first printed wiring board 1 has a wiring layer 3 made of copper foil formed on both sides thereof in a predetermined pattern.
A tin-lead based solder paste 9 is adhered to the wiring layer 3 on one side. And this solder paste 9
is for soldering the surface-mounted electronic component 8 at its end electrode portion. Further, this printed wiring board l is made of a glass cloth base resin substrate with a thickness of 1.0 mm, for example, and has a diameter of about 0.0 mm with respect to the wiring layers 3 on both sides.
A 6 mm hole, a so-called through hole, is formed, and this through hole is filled with a conductive material such as conductive paint when a double-sided wiring layer connection is required, and with resin paint when a conductive connection is not required. filler 6 each
Close as. The second printed wiring board 2 has the same structure as the first printed wiring board 1, except that the solder layer 7 is formed on the necessary parts of the inner surface, and the wiring layer 4 is also the same as the wiring layer 3. are used.
第1のプリント配線板1と第2のプリント配線板2との
それぞれの外面に表面実装型電子部品8をはんだ付けで
接合するに先立ち、まず、一方の配線板、たとえば、第
2のプリント配線板2の内面側に、粘着性樹脂層5を貼
り付ける。そして、この粘着性樹脂層5を介在物として
、第1のプリント配線板1の内面側をこれに貼り付ける
。なお、この粘着性樹脂層5は、たとえば、無溶剤型の
エポキシ系樹脂を、150℃以下の硬化処理で完全硬化
または仮硬化した状態で用いられる。Prior to joining the surface-mounted electronic components 8 to the outer surfaces of the first printed wiring board 1 and the second printed wiring board 2 by soldering, first, one of the wiring boards, for example, the second printed wiring board An adhesive resin layer 5 is attached to the inner surface of the plate 2. Then, the inner surface of the first printed wiring board 1 is attached to the adhesive resin layer 5 as an intervening material. The adhesive resin layer 5 is made of, for example, a solvent-free epoxy resin that is completely cured or temporarily cured by a curing treatment at 150° C. or lower.
両前線板を粘着又は接着後、その表面導体3゜4に、錫
−鉛60−40のはんだペースト9の印刷と表面装着部
品8の載置をおこなう。下面に対しては、別に接着剤も
用いる。こうして得た複合配線板を70リナートのペー
パーフェイズ(気相)リフロウ装置に30秒投入する。After adhesion or adhesion of both front plates, a tin-lead 60-40 solder paste 9 is printed on the surface conductor 3.4 and a surface mounting component 8 is placed. A separate adhesive is also used for the bottom surface. The thus obtained composite wiring board was placed in a 70 linate paper phase (vapor phase) reflow apparatus for 30 seconds.
表面は215℃の温度で、リフロウはんだの条件に達す
るが、粘着又は接合面は、フロリナート蒸気の凝結がな
いので、105℃の温度上昇にとどまる。従って接着面
の、樹脂の軟化、はんだの融解等がおこらない。なお、
表面をデイツプはんだ付けしたのでは、表面装着部品の
はんだ付けはできない外面に付着しているだけである。The surface reaches the conditions for reflow soldering at a temperature of 215°C, but the adhesive or bonding surface remains at a temperature increase of 105°C because there is no condensation of Fluorinert vapor. Therefore, softening of the resin and melting of the solder on the adhesive surface do not occur. In addition,
If the surface is dip-soldered, the soldering of surface-mounted parts will only be attached to the outer surface, which cannot be soldered.
発明の効果
以上のように本発明によれば、成用の材料を用いて2枚
の配線板を貼り合わせたのち、リフロウはんだ付けに供
することができ、疑似的な電層配線板として、配線密度
の高い、配線径路の短かい複合配線板を得る。Effects of the Invention As described above, according to the present invention, two wiring boards can be bonded together using commercially available materials and then subjected to reflow soldering, and can be used as a pseudo electrical layer wiring board. To obtain a composite wiring board with high density and short wiring paths.
図面は本発明実施例に用いたプリント配線板の展開断面
図である。
1.2・・・・・・プリント配線板、3,4・・・・・
・配線層、5・・・・・・粘着性樹脂、6・・・・・・
充填材、7・・・・・・はんだ層、8・・・・・・電子
部品、9・・・・・・はんだペースト。
代理人の氏名 弁理士 中尾敏男 ほか1名/ −−一
才1 l(’簾版
2−f2fL嬢版
J−一一霞稗1
4−−一配誂1
5− 霜着尉腸
6−a盾充填財
q −−−1,J tJ八へX−ヌト
手続補正書(方式)
l事件の表示
昭和63年特許願第63991 号
2発明の名称
プリント配線板の製造方法
3補正をする者
事件との関係 特 許 出 願
人任 所 大阪府門真市大字門真1006番地名
称 (582)松下電器産業株式会社代表者 谷
井 昭 雄
4代理人 〒571
住 所 大阪府門真rlr大字門真1006番地松下
電器産業株式会社内
7、補正の内容
(1)明細書第7頁第10行目の「図面」を「第1図」
に補正します。
@)図面を別紙のとおりに補正します。The drawing is a developed cross-sectional view of a printed wiring board used in an embodiment of the present invention. 1.2...Printed wiring board, 3,4...
・Wiring layer, 5... Adhesive resin, 6...
Filler, 7...Solder layer, 8...Electronic component, 9...Solder paste. Name of agent: Patent attorney Toshio Nakao and 1 other person/--Issai 1 l ('Sen version 2-f2fL's version J-Iichi Kasumi 1 4--Issuance 1 5-Shimotsuki Ucho 6-a Shield filling goods q ---1, J tJ8 to Relationship with Patent application
Appointment Address: 1006 Kadoma, Kadoma City, Osaka Prefecture
Name (582) Matsushita Electric Industrial Co., Ltd. Representative Akio Tanii 4 Agent Address 7, Matsushita Electric Industrial Co., Ltd. 1006 Oaza Kadoma, Kadoma rlr, Osaka Prefecture Contents of amendment (1) Specification page 7 Change “Drawing” in line 10 to “Figure 1”
will be corrected. @) Correct the drawing as shown in the attached sheet.
Claims (2)
込んで重ね合わせ、前記プリント配線板の最表部の上下
両面に対して、気相加熱はんだ付け工程の処理を行うこ
とを特徴とするプリント配線板の製造方法。(1) A plurality of printed wiring boards are stacked with removable inclusions in between, and both upper and lower surfaces of the outermost part of the printed wiring boards are subjected to a vapor phase heating soldering process. A method for manufacturing printed wiring boards.
第1項に記載のプリント配線板の製造方法。(2) The method for manufacturing a printed wiring board according to claim 1, wherein the inclusion is composed of an adhesive resin layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63063991A JP2502663B2 (en) | 1988-03-17 | 1988-03-17 | Manufacturing method of printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63063991A JP2502663B2 (en) | 1988-03-17 | 1988-03-17 | Manufacturing method of printed wiring board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01236693A true JPH01236693A (en) | 1989-09-21 |
JP2502663B2 JP2502663B2 (en) | 1996-05-29 |
Family
ID=13245255
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63063991A Expired - Lifetime JP2502663B2 (en) | 1988-03-17 | 1988-03-17 | Manufacturing method of printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2502663B2 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6553660B2 (en) * | 2000-08-31 | 2003-04-29 | Hitachi, Ltd. | Electronic device and a method of manufacturing the same |
JP2020065029A (en) * | 2018-10-19 | 2020-04-23 | 株式会社ソニー・インタラクティブエンタテインメント | Method of manufacturing semiconductor device, and screen |
US11824429B2 (en) | 2018-10-19 | 2023-11-21 | Sony Interactive Entertainment Inc. | Multi-phase step-down DC/DC power source device |
US12009750B2 (en) | 2018-10-19 | 2024-06-11 | Sony Interactive Entertainment Inc. | Power source device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5629392A (en) * | 1979-08-15 | 1981-03-24 | Matsushita Electric Works Ltd | Printed board |
JPS5775492A (en) * | 1980-10-29 | 1982-05-12 | Alps Electric Co Ltd | Method of fabricating printed circuit board |
-
1988
- 1988-03-17 JP JP63063991A patent/JP2502663B2/en not_active Expired - Lifetime
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5629392A (en) * | 1979-08-15 | 1981-03-24 | Matsushita Electric Works Ltd | Printed board |
JPS5775492A (en) * | 1980-10-29 | 1982-05-12 | Alps Electric Co Ltd | Method of fabricating printed circuit board |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6553660B2 (en) * | 2000-08-31 | 2003-04-29 | Hitachi, Ltd. | Electronic device and a method of manufacturing the same |
US6722028B2 (en) | 2000-08-31 | 2004-04-20 | Renesas Technology Corp. | Method of making electronic device |
US7015070B2 (en) | 2000-08-31 | 2006-03-21 | Renesas Technology Corp. | Electronic device and a method of manufacturing the same |
JP2020065029A (en) * | 2018-10-19 | 2020-04-23 | 株式会社ソニー・インタラクティブエンタテインメント | Method of manufacturing semiconductor device, and screen |
US11647593B2 (en) | 2018-10-19 | 2023-05-09 | Sony Interactive Entertainment Inc. | Semiconductor device manufacturing method |
US11824429B2 (en) | 2018-10-19 | 2023-11-21 | Sony Interactive Entertainment Inc. | Multi-phase step-down DC/DC power source device |
US12009750B2 (en) | 2018-10-19 | 2024-06-11 | Sony Interactive Entertainment Inc. | Power source device |
Also Published As
Publication number | Publication date |
---|---|
JP2502663B2 (en) | 1996-05-29 |
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