JPH057878B2 - - Google Patents
Info
- Publication number
- JPH057878B2 JPH057878B2 JP60123773A JP12377385A JPH057878B2 JP H057878 B2 JPH057878 B2 JP H057878B2 JP 60123773 A JP60123773 A JP 60123773A JP 12377385 A JP12377385 A JP 12377385A JP H057878 B2 JPH057878 B2 JP H057878B2
- Authority
- JP
- Japan
- Prior art keywords
- printed circuit
- flexible printed
- film
- adhesive
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000853 adhesive Substances 0.000 claims description 19
- 230000001070 adhesive effect Effects 0.000 claims description 19
- 238000000034 method Methods 0.000 claims description 11
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 239000010408 film Substances 0.000 description 12
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 8
- 239000011889 copper foil Substances 0.000 description 8
- 229920001721 polyimide Polymers 0.000 description 8
- 239000012787 coverlay film Substances 0.000 description 7
- 238000009832 plasma treatment Methods 0.000 description 7
- 239000003822 epoxy resin Substances 0.000 description 6
- 229920000647 polyepoxide Polymers 0.000 description 6
- 239000011888 foil Substances 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 229920002050 silicone resin Polymers 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 239000003973 paint Substances 0.000 description 4
- 229920006267 polyester film Polymers 0.000 description 4
- 238000007789 sealing Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000004913 activation Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 229920001296 polysiloxane Polymers 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 239000000565 sealant Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 229920006332 epoxy adhesive Polymers 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 239000002985 plastic film Substances 0.000 description 2
- 229920006255 plastic film Polymers 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- 239000004698 Polyethylene Substances 0.000 description 1
- 229920001646 UPILEX Polymers 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000007733 ion plating Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000011101 paper laminate Substances 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N phenol group Chemical group C1(=CC=CC=C1)O ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- -1 polyethylene Polymers 0.000 description 1
- 229920000573 polyethylene Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 239000013464 silicone adhesive Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Die Bonding (AREA)
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明はLSI、IC、トランジスター、コンデン
サ、抵抗等の電子部品付きフレキシブルプリント
回路板の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for manufacturing a flexible printed circuit board with electronic components such as LSI, IC, transistor, capacitor, and resistor.
近年、電子機器の薄形化、軽量化が進むにした
がつて、電子部品をフレキシブルプリント回路板
に直接設ける要求が出るようになつた。本発明は
この要求に応えうる電子部品付きフレキシブルプ
リント回路板の製造方法を提供することを目的と
するものである。 In recent years, as electronic devices have become thinner and lighter, there has been a demand for electronic components to be directly mounted on flexible printed circuit boards. An object of the present invention is to provide a method for manufacturing a flexible printed circuit board with electronic components that can meet this demand.
（従来技術と問題点）
従来LSI、IC、トランジスター、コンデンサ
ー、抵抗等の電子部品は、硬質プリント回路板に
搭載されるのが普通であり、一般には接続ピンが
用いられていた。(Prior Art and Problems) Conventionally, electronic components such as LSIs, ICs, transistors, capacitors, and resistors were usually mounted on rigid printed circuit boards, and connection pins were generally used.
硬質プリント回路板の場合は、フエノール樹脂
含浸紙積層板、エポキシ樹脂含浸ガラス繊維布板
などであるため、接続ピンの代りに接着剤を使用
しても電子部品を封止するエポキシ樹脂、シリコ
ーン樹脂、セラミツク、ガラス等との接着が比較
的容易で、エポキシ系あるいはシリコーン系接着
剤等で強固に接着させることができる。 In the case of rigid printed circuit boards, they are phenolic resin-impregnated paper laminates, epoxy resin-impregnated glass fiber cloth boards, etc. Epoxy resins and silicone resins can seal electronic components even if adhesive is used instead of connecting pins. It is relatively easy to adhere to ceramics, glass, etc., and can be firmly adhered with epoxy or silicone adhesives.
しかしながら、フレキシブルプリント回路板の
場合には、これに使用される絶縁性フイルムは、
主にポリイミドフイルム、ポリエステルフイルム
であつて、これらはエポキシ樹脂、シリコーン樹
脂との接着性が悪く、表面処理をしない場合には
実用できる程度の接着強度は得られないという問
題点がある。 However, in the case of flexible printed circuit boards, the insulating film used for this is
They are mainly polyimide films and polyester films, and these have a problem in that they have poor adhesion to epoxy resins and silicone resins, and that practical adhesive strength cannot be obtained unless surface treatment is applied.
（発明の構成）
本発明者らは、このような従来の問題点を解消
すべく鋭意研究の結果、本発明に至つたのであ
り、本発明によればポリイミドフイルムおよびポ
リエステルフイルムを絶縁基材とするフレキシブ
ルプリント回路板とIC、トランジスター等の電
子部品との強固な接合が可能となり、十分実用に
供し得る製品が得られる。(Structure of the Invention) The present inventors have arrived at the present invention as a result of intensive research to solve such conventional problems.According to the present invention, polyimide film and polyester film are used as an insulating base material. This enables strong bonding between flexible printed circuit boards and electronic components such as ICs and transistors, resulting in products that can be used in practical applications.
本発明は活性化処理表面と導電回路とを有する
フレキシブルプリント回路板の少なくとも片面
に、接着剤を介して電子部品を直接接合したの
ち、前記導電回路に該電子部品のリード部を接続
することを特徴とする電子部品付きフレキシブル
プリント回路板の製造方法に関するものである。 The present invention includes directly bonding an electronic component to at least one side of a flexible printed circuit board having an activated surface and a conductive circuit via an adhesive, and then connecting a lead portion of the electronic component to the conductive circuit. The present invention relates to a method for manufacturing a flexible printed circuit board with electronic components.
以下これについて詳しく説明する。 This will be explained in detail below.
本発明のフレキシブルプリント回路板は、耐熱
性のポリイミドフイルム、ポリエステルフイルム
を絶縁基材とし、その片面または両面が低温プラ
ズマ、スパツタリング、イオンプレーテイング等
によつて活性化処理されたものである。 The flexible printed circuit board of the present invention uses a heat-resistant polyimide film or polyester film as an insulating base material, and one or both sides of the board are activated by low-temperature plasma, sputtering, ion plating, or the like.
本発明において低温プラズマ処理する場合は、
すぐれた接着強度を得るために内部電極型低温プ
ラズマ発生装置に該プラスチツクフイルムを入
れ、減圧下に無機ガスまたは有機ガスを流通させ
ながら電極間に4000ボルト以上の放電電圧を与え
てグロー放電を行わせることにより低温プラズマ
処理する。かかる低温プラズマ処理によりプラス
チツクフイルムに短時間の処理で顕著な接着性改
良効果がもたらされる。低温プラズマ発生装置と
しては、内部電極型であることが好ましいが、場
合によつて外部電極型であつてもよいし、またコ
イル型などの容量結合、誘導結合のいずれであつ
てもよい。 In the case of low temperature plasma treatment in the present invention,
In order to obtain excellent adhesive strength, the plastic film is placed in an internal electrode type low-temperature plasma generator, and glow discharge is performed by applying a discharge voltage of 4000 volts or more between the electrodes while circulating an inorganic or organic gas under reduced pressure. Low-temperature plasma treatment is performed by Such low-temperature plasma treatment provides plastic films with a remarkable adhesion improvement effect in a short period of time. The low-temperature plasma generator is preferably of an internal electrode type, but may be of an external electrode type depending on the case, or may be of either a capacitive coupling type or an inductive coupling type such as a coil type.
低温プラズマ処理においては、例えば0.1トル
の真空中に酸素を導入し、電極に110KHz、2.5kv
の交流電圧を印加して発生するグロー放電により
連続的に行なうことが好ましい。 In low-temperature plasma treatment, for example, oxygen is introduced into a vacuum of 0.1 Torr, and the electrode is heated at 110 KHz and 2.5 kV.
It is preferable to perform this continuously using a glow discharge generated by applying an alternating current voltage of .
表面活性化処理されたフイルムには電解銅箔な
どの金属箔がラミネートされ、この金属箔から導
電回路が形成され、必要に応じてスルーホール加
工を行なつた後、さらに回路面にカバーレイフイ
ルムが設けられる。 A metal foil such as electrolytic copper foil is laminated onto the surface-activated film, and a conductive circuit is formed from this metal foil. After through-hole processing is performed as necessary, a coverlay film is further applied to the circuit surface. will be provided.
絶縁基材フイルムの表面活性化処理は、金属箔
をラミネートする前、金属箔をラミネートした後
または導電回路形成後に行なうこともできる。 The surface activation treatment of the insulating base film can also be performed before laminating the metal foil, after laminating the metal foil, or after forming the conductive circuit.
さらに、必要に応じてカバーレイフイルムの表
面活性化処理についても、接着剤を設ける前、接
着剤を設けた後、またはフレキシブルプリント回
路板の回路面にカバーレイフイルムを貼り合わせ
た後に行つてもよい。 Furthermore, if necessary, surface activation treatment of the coverlay film can be performed before applying the adhesive, after applying the adhesive, or after bonding the coverlay film to the circuit surface of the flexible printed circuit board. good.
導電回路は、基材フイルム上にラミネートした
金属箔のエツチングによつて形成されるが、導電
性塗料、導電性ペースト等を用いて基材に回路を
印刷して形成させることもできる。 The conductive circuit is formed by etching a metal foil laminated onto the base film, but it can also be formed by printing the circuit on the base using a conductive paint, conductive paste, or the like.
本発明はこのようにして得られた活性化処理面
と導電回路を有するフレキシブルプリント回路板
に、ICチツプ、トランジスターなどの電子部品
を直接接合するのであるが、このための接着剤と
してはエポキシ樹脂、シリコーン樹脂、ポリイミ
ド樹脂等の接着剤が適当であるがICチツプを封
止するのと同じ接着剤を使用しても良く、導電回
路またはその端子にICチツプのリード部分をハ
ンダ付けした後、接合部分を接着剤で封止する。 In the present invention, electronic components such as IC chips and transistors are directly bonded to the thus obtained flexible printed circuit board having an activated surface and a conductive circuit, and epoxy resin is used as an adhesive for this purpose. Adhesives such as silicone resin, polyimide resin, etc. are suitable, but the same adhesive used to seal the IC chip may also be used. After soldering the lead part of the IC chip to the conductive circuit or its terminal, Seal the joint with adhesive.
本発明の方法では、ICチツプと導電回路の接
続方法としてフレキシブルプリン回路板にICチ
ツプを乗せた後、ICのリード線と導電性塗料で
作成した回路とを導電性ペーストで接続し、さら
に必要に応じ樹脂封止剤でこの部分を封止するこ
ともできる。 In the method of the present invention, as a method for connecting an IC chip and a conductive circuit, the IC chip is mounted on a flexible printed circuit board, and then the lead wires of the IC and a circuit made of conductive paint are connected with conductive paste. Depending on the situation, this part can also be sealed with a resin sealant.
しかも、活性化処理されたフイルム面との接着
であるためより強固な接合が達成され、従来の問
題点を解消しさらに工程を簡素化し、かつ加工費
用を節約しうる電子部品付きフレキシブルプリン
ｆ回路板が得られる。 Moreover, since it is bonded to the activated film surface, a stronger bond is achieved, which solves the problems of conventional methods, further simplifies the process, and saves processing costs.Flexible printed f circuit with electronic components A board is obtained.
実施例 １（第１図参照）
厚さ25μｍのポリイミドフイルム（Du、Pont
社商品名カプトン）を基材フイルム２として、連
続プラズマ処理後にて両国プラズマ処理した後、
その片面１にアクリル系樹脂接着剤３を塗布し、
この上に電解銅箔をラミネートし、170℃、５Kg
ｆ／cm2で加熱圧着し150℃、１時間アフタキユア
して片面銅張りフレキシブル基板を作つた。この
表面の水接触角は、プラズマ処理しないときの78
度に比べて37度となつておりプラズマ処理によつ
て表面活性度が非常に上がつていた。この片面銅
張りフレキシブル基板にスルーホールをあけた後
スルーホール表面を無電解メツキおよび電解メツ
キにてメツキ層を形成した。Example 1 (see Figure 1) Polyimide film (Du, Pont) with a thickness of 25 μm
After continuous plasma treatment and Ryogoku plasma treatment,
Apply acrylic resin adhesive 3 to one side 1,
Laminate electrolytic copper foil on top of this and heat it at 170℃ with a weight of 5 kg.
A single-sided copper-clad flexible board was produced by heat-pressing at f/cm 2 and after-curing at 150°C for 1 hour. The water contact angle of this surface is 78
The temperature was 37 degrees compared to the average temperature, indicating that the surface activity was greatly increased by the plasma treatment. After a through hole was formed in this single-sided copper-clad flexible substrate, a plating layer was formed on the surface of the through hole by electroless plating and electrolytic plating.
引続きメツキしたスルーホール表面をフオトレ
ジスト等でテンテイング法により保護処理し、銅
箔をエツチングしてサブトラクテイブ法により導
電回路４を作製した。さらにこの回路面に接着剤
５を介してポリイミドフイルムからなるカバーレ
イフイルム６を重ね180℃、10分間、20Kg／cm2で
加熱圧着した。 Subsequently, the surface of the plated through hole was protected by a tenting method using a photoresist or the like, and the copper foil was etched to produce a conductive circuit 4 by a subtractive method. Furthermore, a coverlay film 6 made of a polyimide film was layered on this circuit surface via an adhesive 5, and was heat-pressed at 180° C. for 10 minutes at 20 kg/cm 2 .
このようにして得られたプリント回路板は、一
方の面はプラズマ処理されたポリイミドフイルム
面であり、他の面はカバーレイのポリイミドフイ
ルム面である。 The thus obtained printed circuit board has one side made of a plasma-treated polyimide film and the other side made of a coverlay polyimide film.
このプラズマ処理された面に無溶剤タイプの常
温硬化型エポキシ系接着剤７を用いて、エポキシ
樹脂で封止したシリコンICチツプ８を接着し、
ハンダ９によつて、前記チツプ８のリード部材１
０を銅箔ランド１１に接合した。この銅箔ランド
１１はスルーホールメツキ部を通じて導電回路４
に至る。 A silicon IC chip 8 sealed with epoxy resin is adhered to this plasma-treated surface using a solvent-free room temperature curing epoxy adhesive 7.
The lead member 1 of the chip 8 is bonded by the solder 9.
0 was joined to the copper foil land 11. This copper foil land 11 is connected to the conductive circuit 4 through the through-hole plating part.
leading to.
このようにして得られたフレキシブルプリント
回路板についてJISC−6481の90剥離試験に準じ
た測定方法で、ICチツプと基材フイルムとの接
着力を測定した結果２Kgｆ／cmであつた。 The adhesion force between the IC chip and the base film was measured for the flexible printed circuit board thus obtained using a measuring method according to the 90 peel test of JISC-6481, and the result was 2 kgf/cm.
実施例 ２（第２図参照）
実施例１と同じ方法で両側を活性化処理した基
材フイルム２の片面に接着剤３で銅箔をラミネー
トし、スルーホール加工とメツキを実施例１と同
様に行なつた後銅箔をエツチングし導電回路４を
形成させた。次に、片面を低温プラズマ処理し、
必要なスルーホール部を打ち抜いたポリエチレン
フイルムからなるカバーレイフイルム６を導電回
路面４に接着剤５を介して加熱圧着した。その後
カバーレイフイルム貫通部のスルーホールを前記
と同様にメツキした。Example 2 (See Figure 2) Copper foil was laminated with adhesive 3 on one side of the base film 2, which had been activated on both sides in the same manner as in Example 1, and through-hole processing and plating were performed in the same manner as in Example 1. After that, the copper foil was etched to form a conductive circuit 4. Next, one side is treated with low temperature plasma,
A coverlay film 6 made of a polyethylene film with necessary through-holes punched out was hot-pressed onto the conductive circuit surface 4 via an adhesive 5. Thereafter, the through holes of the cover lay film penetration portion were plated in the same manner as above.
このようにして得られたプリント回路板は両国
がプラズマ処理面である。この両面にシリコン
ICチツプ８を無溶剤タイプの常温硬化型エポキ
シ接着剤７を用いて接合させた後、ICチツプの
リード線１０′を、導電回路４に至る導電性通孔
１２を介して回路部分にハンダづけした後、さら
に封止部１３、同様の無溶剤タイプの常温硬化型
エポキシ樹脂を用いてシリコンICチツプ８、リ
ード線１０′および回路部分４を封止することに
よつて、両面にICチツプを設けたフレキシブル
プリント回路板を得た。これについて基材フイル
ムとチツプとの接着試験を行つたところ実施例１
と同様の結果であつた。 The printed circuit boards thus obtained were plasma treated in both countries. silicone on both sides
After bonding the IC chip 8 using a solvent-free room temperature curing epoxy adhesive 7, the lead wire 10' of the IC chip is soldered to the circuit part through the conductive hole 12 leading to the conductive circuit 4. After that, the silicon IC chip 8, lead wire 10', and circuit part 4 are further sealed using the sealing part 13, a similar solvent-free room temperature curing epoxy resin, and the IC chip is mounted on both sides. A flexible printed circuit board was obtained. Regarding this, we conducted an adhesion test between the base film and the chip and found that Example 1
The results were similar.
実施例 ３（第３図参照）
実施例１と同様にしてフレキシブルプリント回
路板のプラズマ処理を施したフイルム側に導電圧
シリコーン塗料を、回路状に印刷して導電回路１
４を形成させ、フレキシブルプリント回路板を得
た。この回路板にシリコンICチツプ８を乗せた
後、チツプのリード部１０と導電回路１４とを回
路と同質の接着性導電性シリコーンペースト１５
で接続した。最後に封止部１３にシリコーン樹脂
封止剤を用いてICチツプの接着と同時に封止を
行なない、ICチツプを設けたフレキシブルプリ
ント回路板を得た。このものも実施例１と同様の
剥離試験を行つたところ1.5Kgｆ／cmであつた。Example 3 (See Figure 3) Conductive voltage silicone paint was printed in a circuit shape on the plasma-treated film side of a flexible printed circuit board in the same manner as in Example 1 to form conductive circuit 1.
4 to obtain a flexible printed circuit board. After placing the silicon IC chip 8 on this circuit board, the lead portion 10 of the chip and the conductive circuit 14 are bonded with an adhesive conductive silicone paste 15 of the same quality as the circuit.
Connected with. Finally, a silicone resin sealant was used in the sealing portion 13 to perform sealing at the same time as adhering the IC chip, thereby obtaining a flexible printed circuit board provided with the IC chip. This material was also subjected to the same peel test as in Example 1, and the peel strength was 1.5 Kgf/cm.
（発明の効果）
上記実施例からも明らかなように、本発明によ
ればポリイミドフイルム、およびポリエステルフ
イルムは絶縁基材とするフレキシブルプリント回
路板に電子部品を強固に接合できるため、電子機
器の軽薄化が容易となり、しかもエポキシ樹脂、
シリコーン樹脂、ガラス等の封止剤そのもので電
子部品を直接基板フイルムに接合できるため、工
程の簡略化によるコスト削減の目的が達成され
る。(Effects of the Invention) As is clear from the above examples, according to the present invention, polyimide films and polyester films can firmly bond electronic components to flexible printed circuit boards that serve as insulating base materials. epoxy resin,
Since electronic components can be directly bonded to the substrate film using a sealant such as silicone resin or glass, the objective of cost reduction by simplifying the process can be achieved.
図は本発明による電子部品付きフレキシブルプ
リント回路板の部分断面図であつて、第１図は実
施例１、第２図は実施例２、第３図は実施例３の
回路板を示すものである。
１……活性化処理面、２……基材フイルム、３
……接着剤、４……導電回路、５……接着剤、６
……カバーレイフイルム、７……接着剤、８……
ICチツプ、９……ハンダ、１０……リード部材、
１０′……リード線、１１……銅箔ランド、１２
……通孔、１３……封止部、１４……導電性塗料
による導電回路、１５……導電性ペースト。
The figures are partial sectional views of flexible printed circuit boards with electronic components according to the present invention, in which FIG. 1 shows the circuit board of Example 1, FIG. 2 shows the circuit board of Example 2, and FIG. 3 shows the circuit board of Example 3. be. 1...Activation treatment surface, 2...Base film, 3
... Adhesive, 4 ... Conductive circuit, 5 ... Adhesive, 6
...Cover lay film, 7...Adhesive, 8...
IC chip, 9...Solder, 10...Lead member,
10'... Lead wire, 11... Copper foil land, 12
...Through hole, 13... Sealing part, 14... Conductive circuit made of conductive paint, 15... Conductive paste.
Claims (1)
シブルプリント回路板の少なくとも片面に、接着
剤を介して電子部品を直接接合した後、前記導電
回路に該電子部品のリード部を接続することを特
徴とする電子部品付きフレキシブルプリント回路
板の製造方法。1. An electronic component is directly bonded to at least one side of a flexible printed circuit board having an activated surface and a conductive circuit via an adhesive, and then a lead portion of the electronic component is connected to the conductive circuit. A method for manufacturing a flexible printed circuit board with electronic components.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12377385A JPS61281580A (en) | 1985-06-07 | 1985-06-07 | Flexible printed circuit board with electronic component andmanufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12377385A JPS61281580A (en) | 1985-06-07 | 1985-06-07 | Flexible printed circuit board with electronic component andmanufacture thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61281580A JPS61281580A (en) | 1986-12-11 |
| JPH057878B2 true JPH057878B2 (en) | 1993-01-29 |
Family
ID=14868921
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12377385A Granted JPS61281580A (en) | 1985-06-07 | 1985-06-07 | Flexible printed circuit board with electronic component andmanufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61281580A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0729257U (en) * | 1993-10-29 | 1995-06-02 | ニチハ株式会社 | Door hinge |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5313672A (en) * | 1976-07-23 | 1978-02-07 | Fuji Photo Film Co Ltd | Method of surface treatment and apparatus thereof |
| JPS5840886A (en) * | 1981-09-03 | 1983-03-09 | 株式会社東芝 | Method of producing electric circuit board |
| JPS59218789A (en) * | 1983-05-06 | 1984-12-10 | 信越化学工業株式会社 | Flexible printed circuit board and method of producing same |
| JPS6031248A (en) * | 1983-07-29 | 1985-02-18 | Matsushita Electric Works Ltd | Mounting package |
-
1985
- 1985-06-07 JP JP12377385A patent/JPS61281580A/en active Granted
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5313672A (en) * | 1976-07-23 | 1978-02-07 | Fuji Photo Film Co Ltd | Method of surface treatment and apparatus thereof |
| JPS5840886A (en) * | 1981-09-03 | 1983-03-09 | 株式会社東芝 | Method of producing electric circuit board |
| JPS59218789A (en) * | 1983-05-06 | 1984-12-10 | 信越化学工業株式会社 | Flexible printed circuit board and method of producing same |
| JPS6031248A (en) * | 1983-07-29 | 1985-02-18 | Matsushita Electric Works Ltd | Mounting package |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0729257U (en) * | 1993-10-29 | 1995-06-02 | ニチハ株式会社 | Door hinge |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61281580A (en) | 1986-12-11 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |