JPH01230254A - Flattening method - Google Patents

Flattening method

Info

Publication number
JPH01230254A
JPH01230254A JP5693788A JP5693788A JPH01230254A JP H01230254 A JPH01230254 A JP H01230254A JP 5693788 A JP5693788 A JP 5693788A JP 5693788 A JP5693788 A JP 5693788A JP H01230254 A JPH01230254 A JP H01230254A
Authority
JP
Japan
Prior art keywords
resist
insulating film
film
angle
ion beam
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5693788A
Other languages
Japanese (ja)
Other versions
JP2944082B2 (en
Inventor
Shoji Shudo
祥司 周藤
Kazunobu Mameno
和延 豆野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP63056937A priority Critical patent/JP2944082B2/en
Publication of JPH01230254A publication Critical patent/JPH01230254A/en
Application granted granted Critical
Publication of JP2944082B2 publication Critical patent/JP2944082B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To suppress the yield of coarse parts on the surface due to damage of resist and to flatten an insulating film, by projecting ion beams on the surface of the resist at a specified angle, and performing etching. CONSTITUTION:A wiring 1a that is a protruding part is formed on a substrate 1 on which a semiconductor element is formed. An SiO2 film 2 as an interlayer insulating film is deposited on a substrate 1. Resist 3 is applied on the film 2 and baked. At this time, the surface of the resist 3 is flattened. Ion beams are projected on the surface of the resist 3 at an angle of 15-50 deg.C, and the resist 3 and the film 2 are etched. In this way, the interlayer insulating film can be flattened without the yield of coarse parts on the resist. When the ion beams are projected on the side surface of the protruding part of the insulating film at 15-90 deg.C without using the resist and on the upper surface of the insulating film at an angle less than 10 deg., the protruding part is selectively etched, and the insulating film can be flattened.

Description

【発明の詳細な説明】 イ)産業上の利用分野 本発明は、半導体装置の製造方法であり、層間絶縁膜等
の膜表面を平坦にする平坦化方法に関する。
DETAILED DESCRIPTION OF THE INVENTION A) Field of Industrial Application The present invention is a method for manufacturing a semiconductor device, and relates to a planarization method for flattening the surface of a film such as an interlayer insulating film.

口)従来の技術 多層配線技術は半導体集積回路装置における配線の占有
面積を低減させる上でなくてはならない技術である。そ
して多層配線では配線の断線や短絡を避けるために、層
間絶縁膜の平坦化が重要である。
2. Description of the Related Art Multilayer wiring technology is an indispensable technology for reducing the area occupied by wiring in semiconductor integrated circuit devices. In multilayer wiring, it is important to planarize the interlayer insulating film in order to avoid disconnections and short circuits in the wiring.

層間絶縁膜の平坦化方法には、例えば有機シリコン化合
物を溶かした液体を回転塗布した後、熱処理してガラス
化してその表面を平坦化するガラス塗布法(スピンオン
グラス法)や、配線間溝を完全に埋めるように絶縁膜を
堆積し、その上にフォトレジストのような平坦性犠牲膜
を回転塗布して表面を平坦にした後、この平坦性犠牲膜
と絶縁膜がほぼ等しいエツチング速度となる条件で全面
をエツチングして平坦化するエッチバック法がある。ま
だ特開昭61−285737号公報ではこの2方法を組
合わせた平坦化方法を提案している。
Methods for flattening interlayer insulating films include, for example, a glass coating method (spin-on glass method) in which a liquid containing an organic silicon compound is spin-coated and then heat-treated to make it vitrified to flatten its surface, and a method for forming grooves between wirings is used. After depositing an insulating film to completely fill the area and flattening the surface by spin-coating a planarization sacrificial film such as photoresist on top of it, the planarization sacrificial film and the insulating film have approximately the same etching rate. There is an etch-back method in which the entire surface is etched and flattened under certain conditions. However, Japanese Patent Laid-Open No. 61-285737 proposes a flattening method that combines these two methods.

ハ) 発明が解決しようとする課題 エッチバック法における平坦性犠牲膜と絶縁膜がほぼ等
しいエツチング速度でエツチングされるエツチング方法
にイオンビームエツチング方法がある。イオンビームエ
ツチングでエツチングレートを上げるには、イオンの加
速エネルギー及び電流密度を大きくすれば良い、しかし
、加速エネルギーや電流密度を大きくすると、平坦性犠
牲膜として用いるレジストが耐熱性が悪いので、ダメー
ジを受けその表面が荒れて十分な平坦化がされない、ダ
メージを低mきせるべく加速エネルギーや電流密度を小
さくすると、エンチングレートが下がりエッチバックに
時間がかかって効率が悪くなる。
C) Problems to be Solved by the Invention Flatness in Etch-back Method An ion beam etching method is an etching method in which the sacrificial film and the insulating film are etched at approximately the same etching speed. In order to increase the etching rate in ion beam etching, it is sufficient to increase the ion acceleration energy and current density.However, if the acceleration energy and current density are increased, the resist used as the planarity sacrificial film has poor heat resistance, so damage may occur. If the acceleration energy and current density are reduced in order to minimize the damage, the etching rate decreases and etching back takes time, resulting in poor efficiency.

本発明は斯様な点に留意して為されたもので、レジスト
の荒れを発生させることなく、またはレジストを用いる
ことなく、イオンビームによって層間絶a膜を平坦化さ
せるものである。
The present invention has been made with these points in mind, and is intended to flatten an interlayer dielectric film using an ion beam without causing resist roughening or without using a resist.

二) 課題を解決するための手段 本発明は、凸部を有する基板上に形成された絶縁膜の表
面を平坦化する平坦化方法であって、絶縁膜上に表面が
平坦となるようにレジストを形成し、該レジストの表面
に対し15°乃至50°の角度でイオンビームを照射し
て前記レジスト及び絶縁膜をエツチングするものであり
、または絶縁膜の凸部の側面に対して15”乃至90#
且つ該絶縁膜の上面に対して10°以下の角度でイオン
ビームを照射して絶縁膜をエツチングするものである。
2) Means for Solving the Problems The present invention is a planarization method for planarizing the surface of an insulating film formed on a substrate having a convex portion, in which a resist is placed on the insulating film so that the surface becomes flat. The resist and the insulating film are etched by irradiating the surface of the resist with an ion beam at an angle of 15° to 50°, or the side surface of the convex part of the insulating film is etched with an ion beam of 15” to 50°. 90#
Further, the insulating film is etched by irradiating the ion beam at an angle of 10° or less with respect to the upper surface of the insulating film.

ホ)作用 イオンビームの入射角度によってビームの被照射物(レ
ジストあるいは絶縁膜)の受けるダメージやエツチング
レートは異なる。そこで、レジストの表面に対し151
乃至50°の角度でイオンビームを照射することで、エ
ツチングレートを下げることなく、しりストの受けるダ
メージを抑えて、絶縁膜の平坦化が良好に行なえる。ま
た、レジストを用いることなく、絶縁膜の凸部の側面に
対して15@乃至90’且つ該絶縁膜の上面に対して1
0”以下の角度でイオンビームを照射して、凸部に対す
るエツチングレートを他の部分より大きく設定すること
で絶縁膜の平坦化が行なえる。
e) Effect Damage to the beam irradiated object (resist or insulating film) and etching rate vary depending on the incident angle of the ion beam. Therefore, 151
By irradiating the ion beam at an angle of 50° to 50°, the insulating film can be planarized without lowering the etching rate, while suppressing damage to the bottom. In addition, without using a resist, it is possible to apply a coating film of 15 to 90' to the side surface of the convex part of the insulating film and 15 to 90' to the top surface of the insulating film.
The insulating film can be flattened by irradiating the ion beam at an angle of 0'' or less and setting the etching rate for the convex portions higher than for other portions.

へ) 実施例 第1図は本発明方法の一実施例を示す工程説明図である
。(1)は半導体素子が形成されてい゛る基板で、該基
板(1〉上には、凸部である配線(la)が形成されて
いる(第1図A)、この配線(ig)は例えば巾が53
1111.高さ0.64m1である。
Example 1 FIG. 1 is a process explanatory diagram showing an example of the method of the present invention. (1) is a substrate on which a semiconductor element is formed, and on the substrate (1), a convex wiring (la) is formed (Fig. 1A), and this wiring (ig) is For example, the width is 53
1111. The height is 0.64m1.

この基板(1)上に層間絶縁膜としての5iOz膜(2
)をCVD法(常IECVDやプラズマCVD等〉で1
.2陣堆積させる(第1図B)、更にこの5i02膜(
2)上にレジス)(3)(例えば東京応化部’OMR」
>を5HOr、 p、 m、で30秒間回転塗布し、そ
の後140℃で30分間ベークする(第1図C)、この
時、配:Ii<la)による5iOz膜(2)の凹凸に
関係なくレジスト(3)表面は平坦になる。
On this substrate (1), a 5iOz film (2
) by CVD method (usually IECVD, plasma CVD, etc.)
.. This 5i02 film (Fig. 1B) is deposited in two layers (Fig. 1B).
2) Regis above) (3) (For example, Tokyo Ohkabu 'OMR'
> is spin-coated for 30 seconds at 5HOr, p, m, and then baked at 140°C for 30 minutes (Fig. 1C). At this time, regardless of the unevenness of the 5iOz film (2) due to the arrangement: The resist (3) surface becomes flat.

このレジスト(3)表面に対して角度0の方向がイオン
ビームを照射してレジスト(3)及び5i02膜(2)
をエツチングする(第1図D)。
The resist (3) and the 5i02 film (2) are irradiated with an ion beam in a direction at an angle of 0 to the resist (3) surface.
(Fig. 1D).

第1褒にArガスを用いたイオンビームの入射角度θに
おけるレジスト(3)のエツチング後の表面状態を示す
The first image shows the surface state of the resist (3) after etching at the incident angle θ of the ion beam using Ar gas.

(以下、余白) 第  1  表 ここで、イオンビームA、B、Cは加速電圧・イオン電
流密度が夫k 500 V −0,7mA/am2.5
00V−1,4mA/cm2.100OV ・1.4m
A/cyn’の場合を示し、Oは表面状態が良いもの、
△は表面状態がやや悪い°もの、×は表面状態が悪いも
のを示す1表面状態が悪いというのは、イオンビームの
ダメージにより、表面が焦げて荒れ(凹凸し)た状態で
ある。
(Hereinafter, blank spaces) Table 1 Here, the accelerating voltage and ion current density of ion beams A, B, and C are 500 V -0.7 mA/am2.5
00V-1.4mA/cm2.100OV ・1.4m
Indicates the case of A/cyn', O indicates good surface condition,
△ indicates that the surface condition is somewhat poor, and × indicates that the surface condition is poor. 1. Poor surface condition means that the surface is scorched and roughened (uneven) due to damage from the ion beam.

第1表かられかる様に0が50@以下の場合にはレジス
ト(3)の受けるダメージは小さく、その表面を荒らす
ことなくイオンビームエツチングが行なわれる。
As shown in Table 1, when 0 is 50@ or less, the damage to the resist (3) is small and ion beam etching can be performed without roughening the surface.

しかし、角度θが小さすぎるとエツチングレートが極端
に小さくなってしまう、第3図にイオンビームの入射角
θとエツチングレートの相関を示す、この図でエツチン
グレートは正規化しである。基板(レジスト)表面に対
して垂直方向(90” )から角度を/JSさくしてい
くに従い徐々にエツチングレートが上がるが、35°前
後をピークにエツチングレートが下がり始め、15°を
過ぎると急激にエツチングレートは落ち、最後(09)
にはエツチングされなくなる。
However, if the angle .theta. is too small, the etching rate becomes extremely small. FIG. 3 shows the correlation between the incident angle .theta. of the ion beam and the etching rate. In this figure, the etching rate is normalized. The etching rate gradually increases as the angle decreases from the perpendicular direction (90") to the substrate (resist) surface, but after peaking around 35 degrees, the etching rate begins to decrease, and after 15 degrees, it suddenly decreases. Etching rate drops, last (09)
will no longer be etched.

即ち、入射角θが15°以上であればエツチングレート
を小さくすることなくエツチングが行えることになる。
That is, if the incident angle θ is 15° or more, etching can be performed without reducing the etching rate.

従ってイオンビームは入射角が15′乃至50°の間に
設定されて基板くレジスト)へと照射される。而して、
イオンビームによりレジスト(3)及びSiO2膜(2
)が同じエツチングレートでエツチングされ、表面が平
坦化されたSiO2膜(2)が露出きれる(第1!l:
IE)。
Therefore, the ion beam is irradiated onto the substrate (resist) with an incident angle set between 15' and 50°. Then,
Resist (3) and SiO2 film (2) are removed by ion beam.
) is etched at the same etching rate, and the SiO2 film (2) with a flattened surface is completely exposed (1st!l:
IE).

次にレジストを用いず、イオンビームによるレジストの
ダメージを考慮する必要のない平坦化方法について説明
する。第3図に示す如く、エツチングレートは入射角1
5″以上では、90”の場合と同等あるいはそれ以上の
ものとなる。しかし、15°以下ではエツチングレート
は非常に小さいものとなる。そこで、凸部に対しては大
きいエツチングレートに、その他の部分に対しては小さ
いエツチングレートとなるように角度を設定してイオン
ビームエツチングを行う。
Next, a planarization method that does not use a resist and does not require consideration of damage to the resist caused by an ion beam will be described. As shown in Figure 3, the etching rate is
If it is 5" or more, it will be equivalent to or more than 90". However, below 15°, the etching rate becomes extremely small. Therefore, ion beam etching is performed by setting the angle so that a high etching rate is applied to the convex portions and a low etching rate is applied to other parts.

第2図にその一実施例の工程説明図を示す、第1図A、
Bと同様に、まず、凸部として配線(1a)が形成され
た基板(1)上に(第2図A)、5iOz膜(2〉を堆
積する(第2130 B )。
FIG. 2 shows a process explanatory diagram of one embodiment, FIG. 1A,
Similarly to B, first, a 5iOz film (2>) is deposited on the substrate (1) on which the wiring (1a) is formed as a convex portion (FIG. 2A) (2130 B).

このSiO2膜〈2)の配線(1a)による凸部(2a
)の巾を2とし、基板面と平行な面を!、凸部の側面を
■とする。そして、基板面■に対して入射角θが10”
以下で且つ凸部の側面■に対して入射角グが15°乃至
90°となる角度でイオンビームを照射する(第2図C
)0例えばθ−5.a−50°とすると側面■のエツチ
ングレートは基板面■のエンチングレートの約12倍と
なり、基板面Iにおける5iOz膜(2〉の厚さがff
i/12エツチングされると凸部(2a〉が除去された
平坦なSi02g(2>が得られる(第2図D)、平坦
化きれた5iOz膜(2)を所望の膜厚とする場合には
、膜減りの分く例えば、上述の場合t!−m5呻ならば
約4200熱酸)で予め余分に堆積させておけば良い。
Convex portions (2a) due to wiring (1a) of this SiO2 film (2)
) is 2, and the surface parallel to the board surface! , the side surface of the convex portion is marked as ■. Then, the incident angle θ with respect to the substrate surface ■ is 10"
The ion beam is irradiated at the angle below and at an angle where the incident angle G is 15° to 90° with respect to the side surface
) 0 for example θ-5. If a-50°, the etching rate of the side surface (■) is about 12 times that of the substrate surface (■), and the thickness of the 5iOz film (2〉) on the substrate surface I is ff.
When i/12 etching is performed, a flat Si02g (2>) with the protrusion (2a> removed) is obtained (Fig. 2D). In order to reduce the film thickness, for example, in the above case, if the film is t!-m5, an extra amount may be deposited in advance using a hot acid solution of about 4,200 degrees Celsius.

而して、レジストのダメージを考慮する必要なく、Si
O2膜の平坦化ができ、更にレジストを用いないので工
程数やコストの削減がされる。
Therefore, there is no need to consider resist damage.
The O2 film can be flattened, and since no resist is used, the number of steps and cost can be reduced.

尚、イオンビームを凸部の両側から均等に照射すれば、
更に良好に平坦化が可能となり、膜減りも%にすること
ができる。
In addition, if the ion beam is irradiated evenly from both sides of the convex part,
Even better planarization can be achieved, and the reduction in film thickness can be reduced to 50%.

また、第4図の如く配線パターン〈40)が2方向の直
交する配線であるとき、α−45°とすればどうらの配
線に対しても比較的高い同等のエツチングレートが得ら
れ、やはり良好に5iOz膜を平坦化できる。
In addition, when the wiring pattern (40) is two orthogonal wiring lines as shown in Fig. 4, if α-45° is set, a relatively high equivalent etching rate can be obtained for any wiring line. A 5iOz film can be flattened well.

ト)発明の効果 本発明は以上の説明から明らかな如く、レジストに対し
て15°乃至50@の角度でイオンビームを照射するこ
とでエツチングレートを下げることなく、レジストのダ
メージによる表面の荒れが発生するのを抑えて絶RMK
の平坦化が良好に行なえ、またはレジストを用いずに、
絶縁膜の凸部の側面に対して15″乃至90゜旦つ絶縁
膜の上面に対して10°以下の角度でイオンビームを照
射することで凸部の選択的なエツチングがされて、絶縁
膜の平坦化ができる。
G) Effects of the Invention As is clear from the above description, the present invention can eliminate surface roughness due to resist damage without lowering the etching rate by irradiating the resist with an ion beam at an angle of 15° to 50°. Suppress the occurrence of RMK
can be flattened well or without using resist.
By irradiating the side surface of the convex part of the insulating film with an ion beam at an angle of 15" to 90° and at an angle of 10° or less to the top surface of the insulating film, the convex part is selectively etched, and the insulating film is etched. can be flattened.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明一実施例の工程説明図、第2図は他の実
施例の工程説明図、第3図はイオンビーム入射角度とエ
ツチングレートの相関図、第4図は第2図の他の実施例
の説明図である。
Fig. 1 is a process explanatory diagram of one embodiment of the present invention, Fig. 2 is a process explanatory diagram of another embodiment, Fig. 3 is a correlation diagram of the ion beam incident angle and etching rate, and Fig. 4 is a diagram of the relationship between the ion beam incident angle and the etching rate. It is an explanatory view of another example.

Claims (2)

【特許請求の範囲】[Claims] (1)凸部を有する基板上に絶縁膜を形成し、該絶縁膜
上に表面が平坦となるようにレジストを形成し、該レジ
ストの表面に対し15゜乃至50゜の角度でイオンビー
ムを照射して前記レジスト及び絶縁膜をエッチングし、
前記絶縁膜の表面を平坦化することを特徴とする平坦化
方法。
(1) An insulating film is formed on a substrate having a convex portion, a resist is formed on the insulating film so that the surface is flat, and an ion beam is irradiated at an angle of 15° to 50° with respect to the surface of the resist. etching the resist and insulating film by irradiating;
A planarization method comprising planarizing the surface of the insulating film.
(2)凸部を有する基板上に形成された絶縁膜の表面を
平坦化する平坦化方法において、絶縁膜の凸部の側面に
対して15゜乃至90゜旦つ該絶縁膜の上面に対して1
0゜以下の角度でイオンビームを照射して絶縁膜をエッ
チングし、該絶縁膜を平坦化することを特徴とする平坦
化方法。
(2) In a planarization method for flattening the surface of an insulating film formed on a substrate having a convex portion, the angle is 15° to 90° with respect to the side surface of the convex portion of the insulating film and with respect to the top surface of the insulating film. te1
A planarization method characterized by etching an insulating film by irradiating an ion beam at an angle of 0° or less to planarize the insulating film.
JP63056937A 1988-03-10 1988-03-10 Flattening method Expired - Fee Related JP2944082B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63056937A JP2944082B2 (en) 1988-03-10 1988-03-10 Flattening method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63056937A JP2944082B2 (en) 1988-03-10 1988-03-10 Flattening method

Publications (2)

Publication Number Publication Date
JPH01230254A true JPH01230254A (en) 1989-09-13
JP2944082B2 JP2944082B2 (en) 1999-08-30

Family

ID=13041439

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63056937A Expired - Fee Related JP2944082B2 (en) 1988-03-10 1988-03-10 Flattening method

Country Status (1)

Country Link
JP (1) JP2944082B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5574310A (en) * 1991-05-17 1996-11-12 Fujitsu Limited Semiconductor package for surface mounting with reinforcing members on support legs
US5831332A (en) * 1991-05-17 1998-11-03 Fujitsu Limited Semiconductor package for surface mounting

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JPS5717148A (en) * 1980-07-04 1982-01-28 Sony Corp Manufacture of semiconductor device
JPS5750436A (en) * 1980-09-12 1982-03-24 Fujitsu Ltd Manufacture of semiconductor device
JPS61183943A (en) * 1985-02-12 1986-08-16 Hitachi Ltd Electrode wiring method
JPS61222010A (en) * 1985-03-27 1986-10-02 Fuji Photo Film Co Ltd Flattening method

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