JPH01216571A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To stably form a semiconductor region having a desired junction depth without respect to its width by diffusing an impurity deposited or doped in the surface or the vicinity of the surface of a semiconductor substrate directly in the substrate. CONSTITUTION:As deposited or doped directly in the surface or the vicinity of the surface of an Si epitaxial layer 4 exposed in the opening 10a of an insulating film 10 is diffused in the layer 4 thereby to form an emitter region 13. The junction depth of the region 13 is determined by the depositing or doping condition of the impurity and the heat-treating condition of the diffusion. Thus, a junction depth is not varied by the emitter width as by the case of employing a conventional method of forming the emitter region by the impurity diffusion from a polycrystalline Si film doped with the impurity, and the region 13 having a desired junction depth can be stably and uniformly formed without respect to its width.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method for manufacturing a semiconductor device, and is particularly suitable for application to forming a semiconductor region with a fine width.

[Summary of the invention]

A method for manufacturing a semiconductor device according to the present invention includes the steps of: forming an insulating film having an opening on a semiconductor substrate; depositing or doping impurities on or near the surface of the semiconductor substrate exposed in the opening; and a step of diffusing the impurity into the semiconductor substrate by performing heat treatment to form a semiconductor region. As a result, a semiconductor region having a desired junction and depth can be stably formed regardless of its width, and the electrode of the semiconductor region can have a polycrystalline silicon electrode structure.

[Conventional technology]

Conventionally, many attempts have been made to miniaturize bipolar transistors as elements constituting bipolar LSIs. As a result, a technique has been developed in which an emitter region is formed by impurity diffusion from a polycrystalline Si film doped with impurities, and an emitter width WE of sub-half micron of less than 0.2 μm has already been achieved using this technique.

Incidentally, in a bipolar LSI, it is usually necessary to integrate bipolar transistors having different emitter widths Wt on the same substrate. Such emitter width W
. The above-mentioned polycrystalline Si
In the case of manufacturing using impurity diffusion from a film, the following method has been used.

That is, as shown in FIG. 5, base extraction electrodes 22, 23 and 23 made of a p-type polycrystalline St film are formed on, for example, an n-type silicon (Si) epitaxial layer 21 formed on a semiconductor substrate (not shown). An insulating film 24 is formed.

This insulating film 24 has a fine-diameter opening 24 in a portion where an emitter region with a fine width of sub-half micron is to be formed, for example.
a, and a zero-order one having a large-diameter opening 24b in a portion where an emitter region with a width of, for example, several μm is to be formed.
Forming a polycrystalline Si film 25 over the entire surface Next, the polycrystalline Si film 25 is doped with, for example, arsenic (As) by ion implantation, and then heat treatment (annealing) is performed to form the polycrystalline Si film 25. As in the polycrystalline Si film 25 is diffused into the Si epitaxial layer 21 in contact with the Si epitaxial layer 21 to form n-type emitter regions (not shown). Note that boron (B) is added to the polycrystalline Si film 25 in addition to As.
) may be doped in advance to form the emitter region and the P-type intrinsic base region at the same time.

In addition, as a prior art document related to the present invention, Japanese Unexamined Patent Publication No. 6
1-14757 is mentioned. According to this technique, B is ion-implanted into the Si layer, a polycrystalline Si film is then formed on the Si layer, and then a heat treatment is performed to diffuse the B into the Si layer. A portion of B is diffused into the polycrystalline Si film, thereby narrowing the base width Wm of the bipolar transistor.

[Problem that the invention seeks to solve]

Polycrystalline Si film 2 is used to form emitter regions with widely different widths.
The above-mentioned conventional technique in which impurity diffusion from No. 5 is simultaneously formed has the following problems. That is, as shown in FIG.
The film thickness of the i film 25 is considerably thicker than the film thickness of the polycrystalline Si film 25 inside the large diameter opening 24b.
Therefore, the effective diffusion length required for the impurity in the polycrystalline Si film 25 inside the opening 24a to reach the surface of the Si epitaxial layer 21 is as follows. As a result, the junction depth xj of the emitter regions having different widths formed by this impurity diffusion is considerably longer than the effective diffusion length of
, are not only different from each other, but also the junction depth Xjs cannot be stably obtained.

This problem becomes more noticeable as the heat treatment temperature is lowered and the heat treatment time is shortened.

Therefore, an object of the present invention is to provide a method for manufacturing a semiconductor device that can stably form a semiconductor region having a desired junction depth regardless of its width.

Another object of the present invention is to provide a method for manufacturing a semiconductor device in which an electrode in a semiconductor region can have a polycrystalline silicon electrode structure.

[Means for solving problems]

The present invention has an opening (10a) on the semiconductor substrate (4). (10) and depositing or doping impurities on or near the surface of the semiconductor substrate (4) exposed in the opening (10a);
a step of forming a polycrystalline silicon film (11) inside the
This method of manufacturing a semiconductor device includes a step of diffusing impurities into a semiconductor substrate (4) by performing heat treatment to form a semiconductor region (13).

[Effect]

According to the above-mentioned means, since the impurity deposited or doped on the surface or near the surface of the semiconductor substrate is directly diffused into the semiconductor substrate, there is a limited time for this impurity to diffuse into the polycrystalline St peritoneum doped with the impurity. It is possible to solve the above-mentioned problems of the conventional technology caused by the time required, and thereby it is possible to stably form a semiconductor region having a desired junction depth regardless of its width. .

Further, by using the polycrystalline Si film formed after depositing or doping impurities as the electrode of the semiconductor region as it is, the electrode of the semiconductor region can have a polycrystalline silicon electrode structure.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. This embodiment is an example in which the present invention is applied to manufacturing a bipolar LSI.

In this embodiment, as shown in FIG. 1, first, for example, an N3 type buried layer 2 and a P1 type channel stopper region 3 are formed in a semiconductor substrate l such as a P type Si substrate. For example, an n-type Si epitaxial layer 4 is formed on the semiconductor substrate Fi, 1. Next, by selectively thermally oxidizing the surface of this Si epitaxial layer 4, a field insulation layer 1 such as a SiOg film is formed.
! Next, ions of, for example, phosphorus (P) are selectively implanted into a predetermined portion of the Si epitaxial layer 4 surrounded by the field insulating film 5, and then heat treatment is performed. By performing this step, this P is diffused to form, for example, an n'' type collector extraction region 6.

Next, a polycrystalline Si film, for example, is formed on the entire surface, and this polycrystalline S1 film is doped with, for example, B at a high concentration by ion implantation to make it p° type, and then this p type polycrystalline Si film is etched. Then, after forming an insulating film such as a Si0g film on the entire surface, this insulating film and a predetermined portion of the p° type polycrystalline Si film are removed by etching to form an open lower a. Next, a p-type impurity such as B is ion-implanted into the Si epitaxial layer 4 through the open lower a of the base extraction electrode 7, and then a heat treatment is performed to form the base extraction electrode 7. For example, a p-type intrinsic base region 8 is formed by electrically activating the implanted impurity. During this heat treatment, p-type impurities are diffused into the Si epitaxial layer 4 from the p-type polycrystalline St film constituting the base lead-out electrode 7, so that, for example, the p1-type graft base region 9 is It is formed continuous with the base region 8.

Next, after forming an insulating film such as a SiOg film on the entire surface, this insulating film is etched by reactive ion etching (R).
By anisotropic etching with IE), a side wall (
side walls). As a result, the opening 10
An insulating film 10 having a thickness of a is formed. This frontage 10a can have a diameter of about 1,000 sub-half microns, for example.

Next, for example, As is introduced into the opening 10a by a plasma CVD method (plasma doping method) using, for example, arsine (As) (s) as a reaction gas or by ion implantation using a low acceleration energy of, for example, about 10 keV or less. It is deposited or doped on or near the surface of the Si epitaxial layer 4 (As is represented by .).

Next, as shown in FIG. 2, a polycrystalline Si film 11 for forming a polycrystalline Si emitter electrode is formed over the entire surface.

Next, as shown in FIG. 3', after forming an insulating film 12 such as Stow- on the entire surface of this polycrystal 5illll, heat treatment is performed to form a Si epitaxial layer 4.
The above deposited or doped on or near the surface of
S is diffused into the intrinsic base region 8 and electrically activated. This heat treatment may be carried out using aninyl in a normal electric furnace, or may be carried out by rapid annealing such as infrared annealing.
A type emitter region 13 is formed. This emitter region 13, the intrinsic base region 8, and the collector region made of the Si epitaxial layer 4 constitute an npn type bipolar transistor. During the heat treatment, ^S is also diffused into the polycrystalline St film 11, and as a result, the resistance of the polycrystalline Si film 11 is reduced, and the junction depth Xj+a of the emitter region 13 can be made shallow. .

Note that the insulation JI 112 serves to prevent As from evaporating during the heat treatment.

After that, the same steps as conventional methods are performed, such as removing the insulating film 12, forming contact holes for wiring contact to the base lead-out electrode 7 and the collector lead-out region 6, and forming metal wiring such as aluminum (AI). , complete the desired bipolar LSI.

This embodiment I has the following advantages.

That is, as described above, the emitter region 13 is formed by directly depositing or doping As on or near the surface of the Si epitaxial layer 4 exposed in the opening 10a of the insulating film 10 and diffusing into the Si epitaxial layer 4. Therefore, the junction depth Xj of this emitter region 13
s is determined by the deposition or doping conditions of this impurity and the heat treatment conditions for diffusion. For this reason, as mentioned above, the junction depth xj differs depending on the emitter width W, unlike when using the conventional method of forming an emitter region by impurity diffusion from a polycrystalline Si film doped with impurities. This problem is solved, and the emitter region 13 having the desired junction depth Xjs can be stably and uniformly formed regardless of its width. As a result, even when bipolar transistors having different emitter widths Wt are integrated on the same substrate, a uniform junction depth Xj can be obtained regardless of the emitter width WE. Further, the junction depth XJ of the emitter region 13 can be made extremely shallow by selecting the above-mentioned impurity deposition or doping conditions and heat treatment conditions. Since the opening 10a can have an extremely small diameter,
An emitter width WE of sub-half micron can be easily achieved. That is, according to this embodiment, it is possible to easily form a shallow emitter region 13 having an extremely fine width and a junction depth of XJ. As a result, the bipolar transistor can be miniaturized, and a highly integrated bipolar LSI can be realized.

Further, according to this embodiment (2), by using the polycrystalline Si film 11, the electrode of the emitter region 13 can have a polycrystalline Si emitter electrode structure. This has the following advantages: That is, there are many crystal defects such as grain boundaries in the polycrystalline Si film 11.
Since it has the effect of gettering crystal defects and metal ions, ultimately there are no crystal defects or metal ions in the emitter region 13 or the intrinsic base region 8, and therefore the characteristics of the transistor are deteriorated due to these. can be prevented. Further, the electrode of the emitter region 13 is made of polycrystalline S.
If the i-emitter electrode structure is not used, the concentration of holes injected from the intrinsic base region 8 into the emitter region 13 during operation of the transistor must become zero at the surface of this emitter region 13. When using a polycrystalline Si emitter electrode structure, this polycrystalline S
It is sufficient that the hole concentration becomes zero at the surface of the i-emitter electrode, and as a result, the hole injection efficiency becomes high. For this reason,
Base current of bipolar transistor! , can be made small, and therefore the DC current amplification factor hrt can be made large, so that the performance of the transistor can be improved.

Although the embodiments of the present invention have been specifically described above, the present invention is not limited to the above-described embodiments, and various modifications can be made based on the technical idea of the present invention.

For example, in the process shown in FIG.
The entire surface of the polycrystalline Sil! is doped with Qs, for example, by ion implantation, and then heat treated. 11
Therefore, this polycrystalline Si
Emitter resistance R determined by the resistance of the polycrystalline St emitter electrode formed using the film 11 and the resistance of the emitter region 13
It is possible to achieve a reduction of 1. Further, in the above embodiment, the intrinsic base region 8 is formed by ion implantation, but the intrinsic base region 8 can also be formed, for example, as follows. That is, as shown in FIG. 4, for example, after forming a polycrystalline film 5illll, this polycrystalline Si film 11 is doped with, for example, B in addition to A3.Next, heat treatment is performed with the insulating film 12 formed. By doing this, 20B is diffused into the 31-Si epitaxial layer 4 to form the intrinsic base region 8, and at the same time, A3 deposited or doped in advance on or near the surface of the Si epitaxial layer 4 is diffused to form the emitter*. 'JI
i113 is formed. Furthermore, the Si epitaxial layer 4
It is also possible to form the emitter region 13 and the intrinsic base region 8 at the same time by depositing or doping, for example, As and B on the surface or near the surface and diffusing these As and B into this Si epitaxial layer 4. .

In this case, in order to reliably connect the intrinsic base region 8 and the graft base region 9, ions of, for example, B may be implanted in advance into the Si epitaxial layer 4 below the side wall portion of the insulating film 10. .

In addition, in the above-described embodiment, the present invention is applied to a bipolar L
Although the case where the present invention is applied to the manufacture of SI has been described, the present invention can also be applied to the manufacture of semiconductor devices such as bipolar CMOS LSI.

〔Effect of the invention〕

According to the present invention, the semiconductor region is formed by directly diffusing the impurity deposited or doped on the surface or near the surface of the semiconductor substrate into the semiconductor substrate. It is possible to eliminate the problem caused by the finite time required for this impurity to diffuse, thereby stably forming a semiconductor region with a desired junction depth regardless of its width. be able to. Further, by using the polycrystalline silicon film formed after depositing or doping impurities as it is as a conductive layer in the semiconductor region, the electrode in the semiconductor region can have a polycrystalline silicon electrode structure.

[Brief explanation of the drawing]

1 to 3 show a bipolar L according to an embodiment of the present invention.
FIG. 4 is a cross-sectional view for explaining the present invention in detail, and FIG. 5 is a cross-sectional view for explaining the conventional bipolar LSI manufacturing method. Explanation of main symbols in the drawings 1: Semiconductor substrate, 4: Si epitaxial layer, 5: Field insulating film, 7: Base extraction electrode, 8: Intrinsic base region, 9 Niger raft base region, 1O1
12: Insulating film, 11: Polycrystalline 5ill, 13:
emitter area. Agent Patent Attorney Masatomo Sugiura Commissioner of the Patent Office Kunio Ogawa 1. Display of the case 1986 Patent Application No. 41665 2, Title of the invention Method for manufacturing semiconductor devices 3, Person making the amendment Relationship to the case Patent applicant address 6-7-35, Kitashina-yo, Tokyo Parts Ward Name ( 21
B) Sony Corporation Representative Director Norio Ohga 4, Agent 170 Address No. 6, 1-48 Higashiikebukuro, Toshima-ku, Tokyo, Claims column of the specification to be amended and detailed description of the invention Column 7, Contents of amendment (1) The scope of claims will be amended as shown in the attached sheet. (2) "Polycrystalline silicon film" on page 2, line 5 of the specification tube, page 6, line 7, and page 16, line 9 will be corrected to "semiconductor film." (3) “Polycrystalline silicon” in line 11 on page 2, lines 19 to 200 on page 5, lines 5 to 6 on page 7, and line 11 on page 16 is referred to as “semiconductor”. I will correct it. (4) Page 2, lines 16 to 199 “Impurities...
・Delete the statement "Due to technology." (5) "Realized." in the first line of page 3 will be amended as follows. "This has been realized. In addition, a technology has been developed in which an emitter region is formed by impurity diffusion from a polycrystalline Si film doped with impurities, and shallow junk silane can be achieved using this technology." (6) Ibid. Correct "polycrystalline Si film" in the 4th line of page 7 to "semiconductor film". λ Patent Claims A step of forming an insulating film having an opening on a semiconductor substrate, depositing or doping impurities on or near the surface of the semiconductor substrate exposed in the opening, and doping W into at least the inside of the opening. 1. A method of manufacturing a semiconductor device, comprising: forming a semiconductor region; and diffusing the impurity into the semiconductor substrate by performing heat treatment to form a semiconductor region.

Claims (1)

[Claims] A step of forming an insulating film having an opening on a semiconductor substrate, depositing or doping an impurity on or near the surface of the semiconductor substrate exposed in the opening, and forming a polycrystalline film in at least the inside of the opening. A method for manufacturing a semiconductor device, comprising: forming a silicon film; and diffusing the impurity into the semiconductor substrate by performing heat treatment to form a semiconductor region.