JPH01209194A - Integrated circuit device - Google Patents

Integrated circuit device

Info

Publication number
JPH01209194A
JPH01209194A JP63034260A JP3426088A JPH01209194A JP H01209194 A JPH01209194 A JP H01209194A JP 63034260 A JP63034260 A JP 63034260A JP 3426088 A JP3426088 A JP 3426088A JP H01209194 A JPH01209194 A JP H01209194A
Authority
JP
Japan
Prior art keywords
lead frame
integrated circuit
circuit device
projection parts
sealing resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63034260A
Other languages
Japanese (ja)
Inventor
Tatsuo Kikuchi
菊池 立郎
Mitsuaki Uenishi
上西 光明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP63034260A priority Critical patent/JPH01209194A/en
Publication of JPH01209194A publication Critical patent/JPH01209194A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/27011Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
    • H01L2224/27013Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
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    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205Shape
    • H01L2224/32057Shape in side view
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    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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    • H01L2924/181Encapsulation

Landscapes

  • Credit Cards Or The Like (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To obtain a thin-type integrated circuit (IC) device with high dimensional accuracy and high efficiency, by using a part of a lead frame as an external connection terminal, mounting and connecting an IC element on the other side, providing projection parts on the other side, electrically connecting input and output electrodes of the IC element to the projection parts, and covering the connection parts and the IC element with a sealing resin. CONSTITUTION:A belt-shaped sheet is provided with a plurality of projection parts 11a, followed by shaping into a desired shape to obtain a lead frame 11. The lead frame 11 is plated with gold, and an IC element 12 is mounted on and connected to the side of the projection parts 11a of the lead frame 11, with an insulating adhesive 13 therebetween, by die bonding. By using metallic wires 14, input and output electrodes 12a of the IC element 12 are electrically connected to the projection parts 11a by a wire bonding method. One side 11b to be an external connection terminal of the lead frame 11 is brought into contact with a transfer mold, and a resin is poured and molded to provide a sealing resin 15 for moldingly protecting the entire surface of the lead frame 11, except the IC element 12, the metallic wires 14 and the side 11b.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、ICカード等に用いられる集積回路装置に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an integrated circuit device used in IC cards and the like.

従来の技術 近年は、マイクロコンピュータ、メモリ等の集積回路素
子をプラスチック製カードに搭載または21\−/′ 内蔵したいわゆるICカードが実用に供されつつある。
2. Description of the Related Art In recent years, so-called IC cards, in which integrated circuit elements such as microcomputers and memories are mounted or built into plastic cards, have been put into practical use.

このICカードは、すでに多量に使用されている磁気ス
トライプカードに比して、記憶容量が大きく防犯性に優
れていることから、従来の磁気ストライプカードの用途
ばかシでなく身分証明書等多様な用途に使用することが
考えられている。
This IC card has a larger storage capacity and better security than the magnetic stripe cards that are already widely used, so it can be used for a variety of purposes such as identification cards, rather than the traditional magnetic stripe cards. It is considered to be used for this purpose.

ところで、ICカードは、塩化ビニル樹脂等のプラスチ
ックカードに、リーダー・ライター等の外部装置との接
続用端子を有する集積回路装置が搭載された構成であり
、この集積回路装置は、極めて薄型に構成することが必
要とされる。このため、従来の集積回路装置は、第3図
に示すように、フィルム状の絶縁基板31に外部接続用
端子パターン32、回路パターン33およびスルーホー
ル34等の配線導体を形成した薄型配線基板に、集積回
路素子35をダイスポンディングし、集積回路素子35
の入出力電極と回路パターン33とをワイヤーボンディ
ング方式等によυ金属線36で接続する。捷た樹脂封止
時の樹脂流れ止め用の封3・\−7 止枠37を配線基板に接着して設け、エポキシ樹脂等の
封止材38によシ封止している。(特開昭55−566
47号公報、特開昭58−92597号公報) 発明が解決しようとする課題 ICカードに搭載される集積回路装置においては、薄型
化と同時に、高信頼性、高寸法精度さらに低コストであ
ることが求められている。しかしながら、前述したよう
な集積回路装置においては、用いられる配線基板が、絶
縁基板31の両面に配線導体を形成しスルーホール34
によって接続したスルーホール付両面配線基板であるの
で次のような問題を有している。(1)配線基板が高価
である。
By the way, an IC card is a plastic card made of vinyl chloride resin or the like, and has an integrated circuit device mounted thereon that has a terminal for connecting to an external device such as a reader/writer, and this integrated circuit device has an extremely thin structure. It is necessary to do so. Therefore, as shown in FIG. 3, conventional integrated circuit devices are manufactured using thin wiring boards in which wiring conductors such as external connection terminal patterns 32, circuit patterns 33, and through holes 34 are formed on a film-like insulating substrate 31. , die-bonding the integrated circuit device 35 and forming the integrated circuit device 35
The input/output electrodes and the circuit pattern 33 are connected by a metal wire 36 using a wire bonding method or the like. A sealing frame 37 for preventing resin flow during sealing with broken resin is provided by adhering it to the wiring board, and the sealing frame 37 is sealed with a sealing material 38 such as epoxy resin. (Unexamined Japanese Patent Publication No. 55-566
(No. 47, Japanese Patent Application Laid-Open No. 58-92597) Problems to be Solved by the Invention In the integrated circuit device mounted on an IC card, it is desirable to achieve thinness, high reliability, high dimensional accuracy, and low cost. is required. However, in the integrated circuit device described above, the wiring board used has wiring conductors formed on both sides of the insulating substrate 31 and through holes 34.
Since it is a double-sided wiring board with through-holes connected by a method, it has the following problems. (1) The wiring board is expensive.

(2)スルーホール形成はめっきにより行なうのでスル
ーホール形成時のめっき厚のバラツキが配線基板の総厚
のバラツキとなり、良好な厚さ寸法精度が得にくい。(
3)集積回路素子35の樹脂封止時に、樹脂がスルーホ
ール34より流出するので、流出防止のためスルーホー
ル34を封口する手段が必要である。
(2) Since through-holes are formed by plating, variations in the plating thickness when forming through-holes cause variations in the total thickness of the wiring board, making it difficult to obtain good thickness dimensional accuracy. (
3) When the integrated circuit element 35 is sealed with resin, the resin flows out from the through hole 34, so a means for sealing the through hole 34 is required to prevent the resin from flowing out.

一方、金属薄板を所望形状に加工したリードフレームを
用い、リードフレームの片方の一面を外部接続用端子と
し、他面に集積回路素子を搭載接続し、集積回路素子の
入出力電極とリードフレームの他方の面を金属線で電気
的に接続し、この接続部と集積回路素子とを封止樹脂で
覆った集積回路装置は、上記のような高精度な精密配線
基板を必要としないので、高寸法精度でかつ高能率に製
造できしかも安価な集積回路装置であるという長所があ
る。ところが、これにも集積回路装置の外形寸法や外部
接続用端子の寸法からの制約があシ、製造上多くの困難
な点がある。たとえば、集積回路素子の入出力電極とリ
ードフレームの接続部分との間に段差があるために、接
線用の金属線の長さおよびループの高さが大きく、小型
および薄型な集積回路装置が得にくく、またリードフレ
ーム上への集積回路素子の搭載接続に用いる接着剤のリ
ードフレームへの流れ出しによる金属線とリードフレー
ムとの接続不良等の問題がある。
On the other hand, a lead frame made of a thin metal plate processed into a desired shape is used, one side of the lead frame is used as an external connection terminal, and the other side is mounted with an integrated circuit element for connection, and the input/output electrodes of the integrated circuit element and the lead frame are An integrated circuit device in which the other side is electrically connected with a metal wire and this connection and the integrated circuit element are covered with a sealing resin does not require a high-precision precision wiring board as described above, so it is highly efficient. It has the advantage of being an inexpensive integrated circuit device that can be manufactured with high dimensional accuracy and high efficiency. However, this method is also subject to restrictions due to the external dimensions of the integrated circuit device and the dimensions of external connection terminals, and there are many manufacturing difficulties. For example, because there is a step between the input/output electrodes of the integrated circuit element and the connection part of the lead frame, the length of the tangential metal wire and the height of the loop are large, resulting in a small and thin integrated circuit device. Furthermore, there are problems such as poor connection between the metal wire and the lead frame due to the adhesive used for mounting and connecting the integrated circuit element on the lead frame flowing out onto the lead frame.

本発明は、上記問題点に鑑みてなされたもので、5 ・
 ・ 高寸法精度でかつ高能率に製造でき、しかも製造上容易
で安価な薄型な集積回路装置を提供するものである。
The present invention has been made in view of the above problems, and includes 5.
- It provides a thin integrated circuit device that can be manufactured with high dimensional accuracy and high efficiency, and is easy and inexpensive to manufacture.

課題を解決するだめの手段 上記課題を解決するために本発明の集積回路装置は、リ
ードフレームの一面の少なくとも一部を外部接続用端子
とし、他面に集積回路素子を搭載接続するとともに、外
部接続用端子の他面に凸部を設け、集積回路素子の入出
力電極と凸部とを電気的に接続し、この接続部と集積回
路素子とを封止樹脂で覆ったものである。
Means for Solving the Problems In order to solve the above problems, the integrated circuit device of the present invention has at least a part of one side of a lead frame used as a terminal for external connection, an integrated circuit element is mounted and connected on the other side, and an external connection terminal is provided on the other side. A convex portion is provided on the other surface of the connection terminal, the input/output electrode of the integrated circuit element is electrically connected to the convex portion, and the connecting portion and the integrated circuit element are covered with a sealing resin.

作用 本発明は、上記した構成によって、集積回路素子の入出
力電極とリードフレームとを電気的に接続する際に、リ
ードフレームの接続部分は凸部となっているので、集積
回路素子の入出力電極とリードフレームの接続部分との
段差は小さくなシ、接続用の金属線の長さおよびループ
の高さが小さくでき、小型で薄型な集積回路装置が得ら
れるとともに、集積回路素子の搭載接続時の接着剤のす
6へ一部 −ドフレームへの流れ出しによる金属線とリードフレー
ムとの接続不良が防止できるため、従来用いられていた
高価な配線基板を必要とせず、極めて安価で一般的なリ
ードフレームが使用できるので、高寸法精度でかつ高能
率に製造でき、しかも製造上容易で安価々集積回路装置
が得られることとなる。
Effect of the present invention With the above-described configuration, when the input/output electrodes of the integrated circuit element and the lead frame are electrically connected, the connection part of the lead frame is a convex part, so that the input/output electrode of the integrated circuit element is connected electrically. The difference in level between the electrode and the lead frame connection part is small, and the length of the metal wire for connection and the height of the loop can be reduced, making it possible to obtain a small and thin integrated circuit device, as well as to improve mounting and connection of integrated circuit elements. This prevents poor connection between the metal wire and the lead frame due to some of the adhesive flowing out into the lead frame, eliminating the need for the expensive wiring board used in the past, making it extremely inexpensive and common. Since a lead frame can be used, an integrated circuit device can be manufactured with high dimensional accuracy and high efficiency, and is easy to manufacture and inexpensive.

実施例 以下、本発明の一実施例の集積回路装置について、図面
を参照しながら説明する。
Embodiment Hereinafter, an integrated circuit device according to an embodiment of the present invention will be described with reference to the drawings.

第1図は本発明の実施例における集積回路装置の平面図
であり、説明のため封止樹脂は外形のみを図示している
。第2図は本発明の実施例における集積回路装置の縦断
面図であシ、第1図x −x’線での縦断面図である。
FIG. 1 is a plan view of an integrated circuit device according to an embodiment of the present invention, and for the sake of explanation, only the outer shape of the sealing resin is shown. FIG. 2 is a longitudinal sectional view of an integrated circuit device according to an embodiment of the present invention, and is a longitudinal sectional view taken along the line x-x' in FIG. 1.

第1図および第2図において、11はリードフレーム、
11aはリードフレームの他面に形成した凸部、12は
集積回路素子、13は接着剤、14は金属線、15は封
止樹脂である。
In FIGS. 1 and 2, 11 is a lead frame;
11a is a convex portion formed on the other surface of the lead frame, 12 is an integrated circuit element, 13 is an adhesive, 14 is a metal wire, and 15 is a sealing resin.

本実施例の集積回路装置の構成について、その製造方法
とともに以下に詳細に説明する。
The configuration of the integrated circuit device of this example will be described in detail below along with its manufacturing method.

まず、板厚0.40trrmの帯状の42アロイ薄板を
片面からフォトエツチング加工を行なって直径1.0−
の複数個の凸部11aを形成し、凸部11a以外の板厚
がおおよそ0.15配となるよう金属薄板を作成し、こ
れを打抜加工を行なって所望形状にしたリードフレーム
11を得た。次に、このリードフレーム11に金メツキ
を施したのち、塗布厚約30μmの絶縁性接着剤13を
介して厚さ0.25n++n、チップサイズ6mX7m
mの集積回路素子12をリードフレーム11の凸部11
a形成側にダイスボンディングして搭載接続した。この
時、接着剤13は凸部11aの壁面で止められ、凸部1
1a上への接着剤13の流れ出しは無かった。
First, a strip-shaped 42 alloy thin plate with a plate thickness of 0.40 trrm was photoetched from one side to a diameter of 1.0-mm.
The lead frame 11 is obtained by forming a plurality of convex portions 11a, making a thin metal plate so that the thickness of the plate other than the convex portions 11a is approximately 0.15 mm, and punching it into a desired shape. Ta. Next, this lead frame 11 is plated with gold, and then coated with an insulating adhesive 13 with a coating thickness of about 30 μm to a thickness of 0.25n++n and a chip size of 6m x 7m.
m integrated circuit elements 12 on the convex portion 11 of the lead frame 11
It was mounted and connected by die bonding to the a-forming side. At this time, the adhesive 13 is stopped on the wall surface of the protrusion 11a, and
There was no flow of adhesive 13 onto 1a.

続いて、金、アルミニウム、銅などの金属線14を用い
て、集積回路素子12の入出力電極12&と凸部11a
とをワイヤーボンディング法で電気的に接続して第1図
および第2図の封止樹脂15を除いた状態を得た。この
時、接続不良は無く、金属線14のループ高さは集積回
路素子12の入出力電極12&に対して0.12 Mで
あった。続いて、トランスファ成形金型にリードフレー
ム11の外部接続用端子となる一面11b(凸部11a
形成面の反対面)を当接し、エポキシ樹脂等の樹脂を注
入成形して、集積回路素子12、金属線14および、外
部接続用端子となる一面11bを除いたリードフレーム
11全面をモールド保護するだめの封止樹脂15を設け
、第2図に示す本実施例の完成状態を得た。完成した集
積回路装置の総厚は0.58 rrmで外形寸法10m
X 12mmであった。
Next, using metal wires 14 made of gold, aluminum, copper, etc., the input/output electrodes 12 & of the integrated circuit element 12 and the convex portions 11a are connected.
were electrically connected by wire bonding to obtain the state shown in FIGS. 1 and 2 with the sealing resin 15 removed. At this time, there was no connection failure, and the loop height of the metal wire 14 was 0.12 M with respect to the input/output electrodes 12& of the integrated circuit element 12. Next, one surface 11b (convex portion 11a) of the lead frame 11 that will become the external connection terminal is placed in the transfer molding die.
The surface opposite to the forming surface) is brought into contact with the lead frame 11, and a resin such as epoxy resin is injected to protect the integrated circuit element 12, the metal wire 14, and the entire surface of the lead frame 11 except for one surface 11b that will serve as an external connection terminal. A redundant sealing resin 15 was provided to obtain the completed state of this example shown in FIG. The total thickness of the completed integrated circuit device is 0.58 rrm and the external dimension is 10 m.
The width was 12mm.

以上説明したように、本実施例は、リードフレーム11
の集積回路素子12の入出力電極12&との接続部分を
凸部111Lとしたので、接続用金AMの長さおよびル
ープの高さが小さくできるとともに、接続部分への接着
剤の流れ出しがなく接続不良が防止でき、良好な薄型の
集積回路装置が得られた。第2図に示すように、本実施
例では、リードフレーム11の一面11bと封止樹脂1
5の下端面とは略同−面としている。これは、この集積
回路装置を使用したXCカードの携帯時および使用時の
外的力によってリードフレーム11の突出や脱落等の問
題を生じることのないようにするためである。なお、第
2図では、リードフレーム11の一面11bを全面にわ
たって封止樹脂から露出させているが、−面11bの外
部接続用端子となる部分のみを露出させてもよい。
As explained above, in this embodiment, the lead frame 11
Since the connection part with the input/output electrode 12 & of the integrated circuit element 12 is made into a convex part 111L, the length of the connection gold AM and the height of the loop can be reduced, and the connection is made without adhesive flowing out to the connection part. Defects could be prevented and a good thin integrated circuit device could be obtained. As shown in FIG. 2, in this embodiment, one surface 11b of the lead frame 11 and the sealing resin 1
The lower end surface of 5 is substantially the same plane. This is to prevent problems such as the lead frame 11 from protruding or falling off due to external forces when the XC card using this integrated circuit device is carried or used. In FIG. 2, the entire surface 11b of the lead frame 11 is exposed from the sealing resin, but only the portion of the negative surface 11b that will become the external connection terminal may be exposed.

なお、上記本実施例では、リードフレーム11に凸部1
11Lを設ける方法として、板厚のやや厚めの薄板を片
面からフォトエツチング加工して形成したが、機械加工
により形成してもよく、また、所定の厚さの薄板を用い
プレス加工等により塑性加工して凸部11aを設けても
よい。1だ、IJ−ドフレーム11とは別に金属片を作
成し、この金属片をはんだ付は等によりリードフレーム
11にろう付けして凸部を形成してもよい。
Note that in this embodiment, the lead frame 11 has a convex portion 1.
11L was formed by photo-etching a slightly thicker thin plate from one side, but it may also be formed by machining, or by using a thin plate of a predetermined thickness and plastic working by pressing etc. The convex portion 11a may also be provided. 1. A metal piece may be prepared separately from the IJ-deframe 11, and this metal piece may be brazed to the lead frame 11 by soldering or the like to form the convex portion.

発明の効果 以上のように本発明は、リードフレームの一面の少なく
とも一部を外部接続用端子とし、他面に集積回路素子を
搭載接続するとともに、この他面0 A−7 に凸部を設け、集積回路素子の入出力電極と凸部とを電
気的に接続し、少なくともこの接続部、および集積回路
素子12部分とを封止樹脂で覆うことにより、集積回路
素子の入出力電極とリードフレームとを電気的に接続す
る際に、リードフレームの接続部分は凸部となっている
ので、接続用の金属線の長さおよびループの高さが小さ
くでき、小型で薄型な集積回路装置が得られる。また集
積回路素子の搭載接続時の接着剤のリードフレームへの
流れ出しによる金属線とリードフレームとの接続不良が
防止できるため、従来用いられていた高価な配線基板を
必要とせず、極めて安価で一般的なリードフレームが使
用できるので、高寸法精度でかつ高能率に製造でき、し
かも製造上容易で安価な集積回路装置が得られ、工業的
価値は極めて犬である。
Effects of the Invention As described above, the present invention provides at least a portion of one surface of the lead frame as an external connection terminal, an integrated circuit element is mounted and connected on the other surface, and a convex portion is provided on the other surface 0A-7. , the input/output electrodes of the integrated circuit element and the lead frame are electrically connected to the input/output electrodes of the integrated circuit element and the convex part, and at least this connection part and the integrated circuit element 12 portion are covered with a sealing resin. Since the connecting part of the lead frame is a convex part, the length of the metal wire for connection and the height of the loop can be reduced when making electrical connections between the two, resulting in a small and thin integrated circuit device. It will be done. In addition, it is possible to prevent poor connections between metal wires and lead frames due to adhesive flowing into the lead frame when integrated circuit elements are mounted and connected, eliminating the need for the expensive wiring boards used in the past, making it extremely inexpensive and common. Since a standard lead frame can be used, an integrated circuit device can be manufactured with high dimensional accuracy and high efficiency, and is easy to manufacture and inexpensive, and has extremely high industrial value.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例における集積回路装置の平面
図、第2図は本発明の一実施例における集積回路装置の
縦断面図、第3図は従来の集積回路装置の縦断面図であ
る。 11・・・・・・リードフレーム、11a・・・・凸部
、11b・・ −面、12・・・・・・集積回路素子、
121L・・・・・・入出力電極、13 ・・・接着剤
、14・・・・・・金属線、15・・・・・封止樹脂。
FIG. 1 is a plan view of an integrated circuit device according to an embodiment of the present invention, FIG. 2 is a vertical cross-sectional view of an integrated circuit device according to an embodiment of the present invention, and FIG. 3 is a vertical cross-sectional view of a conventional integrated circuit device. It is. 11...Lead frame, 11a...Protrusion, 11b...-face, 12...Integrated circuit element,
121L...Input/output electrode, 13...Adhesive, 14...Metal wire, 15...Sealing resin.

Claims (2)

【特許請求の範囲】[Claims] (1)リードフレームの一面の少なくとも一部を外部接
続用端子とするとともに、このリードフレームの他面上
に集積回路素子を搭載し、前記リードフレームの他面に
凸部を設け、前記集積回路素子の入出力電極と前記凸部
とを電気的に接続し、少なくともこの接続部と前記集積
回路素子とを封止樹脂で覆った集積回路装置。
(1) At least a part of one surface of a lead frame is used as an external connection terminal, an integrated circuit element is mounted on the other surface of the lead frame, a convex portion is provided on the other surface of the lead frame, and the integrated circuit element is mounted on the other surface of the lead frame. An integrated circuit device in which an input/output electrode of an element is electrically connected to the convex part, and at least the connecting part and the integrated circuit element are covered with a sealing resin.
(2)封止樹脂は、リードフレーム他面全てを覆った特
許請求の範囲第1項記載の集積回路装置。
(2) The integrated circuit device according to claim 1, wherein the sealing resin covers all other surfaces of the lead frame.
JP63034260A 1988-02-17 1988-02-17 Integrated circuit device Pending JPH01209194A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63034260A JPH01209194A (en) 1988-02-17 1988-02-17 Integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63034260A JPH01209194A (en) 1988-02-17 1988-02-17 Integrated circuit device

Publications (1)

Publication Number Publication Date
JPH01209194A true JPH01209194A (en) 1989-08-22

Family

ID=12409205

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63034260A Pending JPH01209194A (en) 1988-02-17 1988-02-17 Integrated circuit device

Country Status (1)

Country Link
JP (1) JPH01209194A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04290463A (en) * 1990-12-03 1992-10-15 Motorola Inc Semiconductor package having detached type heat sink-bonding pad
EP1104910A1 (en) * 1999-11-02 2001-06-06 Infineon Technologies AG Chip card and process for producing the same
US6333212B1 (en) 1995-08-25 2001-12-25 Kabushiki Kaisha Toshiba Semiconductor device and manufacturing method thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04290463A (en) * 1990-12-03 1992-10-15 Motorola Inc Semiconductor package having detached type heat sink-bonding pad
US6333212B1 (en) 1995-08-25 2001-12-25 Kabushiki Kaisha Toshiba Semiconductor device and manufacturing method thereof
EP1104910A1 (en) * 1999-11-02 2001-06-06 Infineon Technologies AG Chip card and process for producing the same

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