JPH0120465B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION The present invention relates to a multiprocessor system composed of a plurality of processors, and particularly to a system that performs online fault processing when a processor fault occurs.

Conventional Structures and Their Problems In recent years, multiprocessor systems that perform calculation processing using a plurality of microprocessors have come into use in various devices in order to improve processing performance.

In such a system, when a failure occurs in, for example, one processor in the system, the system control processor communicates with the failure processor online in order to understand the failure status of the failure processor, and diagnoses the failure processor.・It is necessary to carry out test processing.

However, in conventional multiprocessor systems, each processor in multiple processors has only one type of logical processor number, and if a processor in the system fails, the calculation processing that was being executed by the failed processor is transferred to another processor. Since the logical processor number is switched in order to be executed by the faulty processor, it is no longer possible to communicate with the faulty processor, which has the disadvantage that the system control processor cannot diagnose or test the faulty processor. Was.

Purpose of the Invention In view of the above-mentioned drawbacks, the present invention provides a processor that, when a fault occurs in a processor that performs data processing, can perform diagnosis and testing with the faulty processor, even if an alternative processor performs the data processing that was being performed by the faulty processor. The present invention provides a multiprocessor system that enables communication of processing.

Structure of the Invention The present invention comprises n processors that execute data processing, and one processor that replaces these n processors.
and a system control processor that controls the n+1 processors via a data bus. 1. Provide a logical processor number table in which a second logical processor number is assigned, and also provide a physical processor number table in which physical processor numbers are assigned according to the first and second logical processor numbers, and When one of the processors fails,
A physical processor number corresponding to the first logical processor number in the physical processor number table is rewritten to a physical processor number of the spare processor, so that the system control processor processes data according to the first logical processor number. By selecting a physical processor number, a backup processor is made to execute data processing in the event of a failure, and by selecting a physical processor number corresponding to the second logical processor number, diagnosis and testing of a failed processor can be performed. By carrying out the above, the above purpose is achieved.

DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a multiprocessor system according to an embodiment of the present invention.

In FIG. 1, 1 ₁ to 1 _o are processors that execute data processing, 1 _o+1 is a substitute processor when a failure occurs among processors 1 ₁ to 1 _o , and 2
is a system control processor that controls processors 1 ₁ to 1 _o+1 via bus 3.

Next, the configuration of the system control processor 2 will be explained in more detail with reference to FIG.

In FIG. 2, reference numeral 10 denotes a destination logical processor number indicating circuit which instructs which processors 1 ₁ to 1 _o data and data processing programs are to be sent to. 12 is a table holding logical processor numbers and physical processor numbers corresponding to processors 1 ₁ to 1 _o ; the logical processor numbers are stored in table 12a, and the physical processor numbers are stored in table 12b.
is maintained. The logical and physical processor number during data processing corresponding to processor 1 ₁ to 1 _o is A ₁
~A _o and 1 ₁ ~1 _o . The logical and physical processor numbers during diagnosis and testing are B ₁ to Bo and 1 ₁ to _{1 o .} 11 is a search circuit that searches the table 12 for the physical processor number corresponding to the logical processor number specified by the destination logical processor number instruction circuit 10; for example, when the destination logical processor number instruction circuit 10 specifies _A1 during data processing; Then,
The physical processor number ₁₁ corresponding to _A1 is detected. On the other hand, if the destination logical processor number instruction circuit 10 instructs B ₁ during diagnosis/testing as necessary, the physical processor number ₁ corresponding to B ₁
Detect. 13 is a buffer that temporarily holds the physical processor number 1 _n (where m is an integer satisfying 1≦m≦n) searched by the search circuit 11; 14 also holds the physical processor number 1 _n held in the buffer 13; This is an output section that sends the own program number, data length, data, etc. to the processor _1n . 15 is processor 1 (however, 1≦
This is a rewrite circuit that rewrites the physical processor number 1 corresponding to the logical processor number A to 1 _o+1 when a failure occurs in the processor (an integer satisfying ≦n).

The operation of the above configuration will be explained below.

First, during data processing, each processor 1
₁ , _1o , the physical processor number 1 corresponding to the logical processor number A specified by the destination logical processor number instruction circuit 10
is searched by the table 12 via the search circuit 11. Searched physical processor number 1
is sent to the processor 1 by the output unit 14 via the buffer 13, and the processor 1 executes data processing.

However, if a data processing failure occurs in processor 1, for example, rewriting circuit 15 rewrites physical processor number 1 in table 12 corresponding to processor 1 to 1 _o+1 as shown in FIG. Processor 1 _o+1 is then made to process data that could not be processed due to the occurrence of a failure despite being processed by processor 1. In other words, since the physical processor number in the table 12 corresponding to the logical processor number A specified by the destination logical processor number instruction circuit 10 is 1 _o+1 , if reprocessing is performed due to a failure, Data processing is executed by processor 1 _o+1 .

On the other hand, it is necessary to diagnose and test the processor 1. When the destination logical processor number designation circuit 10 designates the logical processor number B for failure/testing, the search circuit 11 searches the table 12 for the physical processor number 1. The retrieved physical processor number 1 is sent to the output unit 14 via the buffer 13, and from the output unit 14 is sent to the processor 1 together with data for diagnosis and testing, and diagnosis and testing between the system control processors is started. .

As described above, according to this embodiment, the table 12 is provided in the system control processor 2, and the table 12 is
By giving the logical processor numbers of each processor 1 ₁ to 1 _o and the corresponding physical processor numbers during data processing and diagnosis/testing, processor 1 _o+1 can be set up as a backup for the failed processor 1. The system control processor 2 can perform data processing as an alternative processor, while the system control processor 2 can diagnose and test the processor 1.

In this embodiment, the system control processor 2 is configured to load programs, data, etc., but a separate program load processor may be used for loading these.

Effects of the Invention As described above, the present invention provides a table in which two types of logical processor numbers are assigned to each processor that executes data processing. Even if an alternative processor performs the data processing that was being performed by the faulty processor, communication can be performed with the faulty processor for diagnosis and test processing;
The effect is great.

[Brief explanation of drawings]

Fig. 1 is a block wiring diagram of a multiprocessor system according to an embodiment of the present invention, Fig. 2 is a block wiring diagram of main parts of the system control processor of the multiprocessor system, and Fig. 3 shows the rewriting state in the table. FIG. 1 ₁ to 1 _o+1 ... Processor, 2 ... System control processor, 3 ... Bus, 10 ... Destination logical processor number instruction circuit, 11 ... Search circuit, 1
2...table, 13...buffer, 14...output section.

Claims (1)

[Claims] 1 n processors that execute data processing;
The processor is equipped with one standby processor that replaces these n processors, and a system control processor that controls the n+1 processors via a data bus. A logical processor number table is provided in which first and second logical processor numbers are assigned according to processing and diagnostic test processing, and physical processor numbers are assigned according to the first and second logical processor numbers. A physical processor number table is provided, and when a failure occurs in one of the n processors, the physical processor number corresponding to the first logical processor number in the physical processor number table is set to the physical processor number of the spare processor. By rewriting the processor number and selecting a physical processor number corresponding to the first logical processor number when processing data, the system control processor allows the backup processor to execute data processing in the event of a failure, and By selecting the physical processor number according to the logical processor number of
A multiprocessor system that diagnoses and tests faulty processors.