JPS6113626B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a backup method for a compound computer system in which when one computer in the compound computer system fails, another computer continues running.

Conventionally, in compound computer systems, when running one program, a synchronization method has been adopted so that even if one computer fails, the program can continue to be executed on another computer. There are two types of synchronization: one is to synchronize the execution of each instruction (referred to as tight coupling), and the other is to check the execution progress of the program at important points in the program (loose coupling). In the former case, special hardware is required for synchronization, and when one computer is in trouble due to some kind of failure, other computers are also affected and become stuck waiting for synchronization. to wear. Also, extra time is required for synchronization for each instruction.

In the latter case, the program requires a procedure through a communication module between computers for synchronization, which is difficult in terms of programming. Further, if the synchronization points are set finely, it takes time for synchronization and the response time increases. In addition, if the main computer in the compound computer system breaks down,
The slave computer needs to go back to the previous synchronization point and start execution. This further delays program execution. Both of the above cases have unavoidable problems in execution time and complexity in terms of hardware and programming.

The present invention was made in order to eliminate the drawbacks of the conventional backup method of compound computer systems as described above, and by providing a backup register in the compound computer system and performing backup, it is possible to achieve complete continuity of compound computer systems. The purpose is to provide a backup method for computer systems.

The details of the present invention will be explained below with reference to an illustrated embodiment.

In Figure 1, 1 and 2 are computer arithmetic control units (hereinafter abbreviated as CPUs), each with main memory 1.
a, 2a and register sections 3, 4. or
The CPUs 1 and 2 have backup registers 5 and 6 having the same configuration as the register sections 3 and 4, respectively.
It is connected so that the contents of the backup register 5 can be read from the CPU 1. Similarly, CPU2
The contents of the backup register 6 can be read from. The contents of the register units 3 and 4 of the other CPUs 1 and 2 are transferred to the backup registers 5 and 6 each time an instruction is executed. 7 is
This is a common memory for CPUs 1 and 2. 8,9
is an alarm module, which is a circuit that detects a failure in each of CPU1 and CPU2. The types of failures include, for example, main memory failure (parity error), program failure, CPU power supply abnormality, etc. The outputs of alarm modules 8 and 9 are each output from the CPU on the other side.
1 and 2, so that each can detect failures in the other's CPUs 1 and 2.

FIG. 2 shows the structure of the register sections 3 and 4 of the CPUs 1 and 2 and the backup registers 5 and 6. The register sections 3 and 4 and the backup registers 5 and 6 are respectively composed of program running address registers 203, 204, 205, 206, status registers 213, 214, 215, 216, and calculation registers 223, 224, 225, 226. There is.

FIG. 3 is a diagram showing an example of the usage state of the common memory 7, where 30 is an area for storing the currently running program number, 31 is an area for storing the program run start address, and 32 is an area for storing the program run start address as the program is executed. This is an area for storing intermediate results of operations.

Next, the operation of the present invention will be explained using the drawings.

In FIG. 1, it is assumed that a certain program is running on the CPU 1. As a procedure before running, the number of the program is stored in the common memory 7, the running start address at which running is permitted is stored in the area 31, and the number of the program is stored in the area 30. After that, the program is executed on CPU1. During program execution, the contents of the registers shown in FIG. 2 are transferred from the register section 3 to the backup register 6 every time an instruction is executed. If the program is running, CPU1
If a failure occurs, the CPU 2 is notified of the failure via the alarm module 8, and the CPU 2 reads the running program number from the area 30 of the common memory 7 and prepares to execute the program (for example, if the program is (If the program is in the auxiliary memory that is not stored, the program is transferred to the main memory 2a), the contents of the backup register 6 are read, and the program run address register 20 is read.
Based on the running address in the CPU 1 stored in the CPU 6 and the running start address stored in the area 31 of the common memory 7, a new restart running address in the CPU 2 is determined. Also, depending on the status stored in the stator register 216 of the register section 6,
The status is set to be the same as that of the CPU 1, and the contents of the calculation register 226 are transferred to the calculation register 224 of the register section 4 of the CPU 2, and the execution of the program is restarted. This allows the program to restart completely from the instruction that was completely executed by CPU1. Further, since the calculation results generated during the execution of the program by the CPU 1 are stored in the area 32 of the common memory 7, the data during the calculation will not be lost.

The above explanation is for the case where the program is executed by the CPU 1, but the same applies to the reverse case.

The above explanation is about the CPU when running the program.
This relates to rerunning the program in response to a failure. On the other hand, if one of the CPUs fails while the operating system is running, a healthy CPU will try to rerun the program using the procedure described above, but while the operating system is running, only one of the CPUs will fail, as shown in Figure 3. For example, the program number in area 30 has a special symbol “0”.
By memorizing this, a healthy CPU will simply recognize this as a failure of another CPU and will not need to restart.

As explained above, the present invention adds a backup register to a compound computer system, so that when a failure is detected, a healthy CPU can read it and restart the program accurately from the next step where the failure occurred. It is possible to solve the conventional problem of execution time and the troublesome programming required for synchronization. As a result, dynamic execution load distribution control in a compound computer system can be easily realized, and the compound computer system can be operated effectively.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an example of a compound computer system, and Fig. 2 shows the register section 3 in Fig. 1,
4. A diagram showing the structure of the backup registers 5 and 6. FIG. 3 is a diagram showing an example of how the common memory 7 in FIG. 1 is used. 1, 2... Arithmetic control unit (CPU), 1a, 2a...
Main memory, 3, 4...Register section, 5, 6...Backup register, 7...Common memory, 8, 9...Alarm module, 203-206...Program running address register, 213-216...Stator register, 223-226... Arithmetic register, 30,3
1, 32...area.

Claims (1)

[Claims] 1. In a compound computer system comprising a plurality of arithmetic and control units, a backup register, and a common memory, when one arithmetic and control unit executes a program, the number and start address of the program are stored in the common memory, While a program is being executed, the contents of the register section of the arithmetic control unit are transferred to the backup register each time an instruction is executed, and if the arithmetic control unit fails, the other arithmetic control units transfer the contents of the backup register and the A backup method for a compound computer system characterized in that the program is restarted by reading the contents stored in a common memory to obtain the program restart address and the register contents and status before the failure.