JPH01200602A - Asymmetric type zno varistor and manufacture thereof - Google Patents

Abstract

PURPOSE:To enable the manufacturing of an asymmetric type ZnO varistor without passing a complicated process, by forming a ZnO layer on a substrate or a conductive substrate, forming thereon a metal oxide layer forming an electric potential barrier with the ZnO layer and one side electrode at a constant interval, and forming the other side electrode on the metal oxide layer. CONSTITUTION:On a substrate 11, a ZnO layer 13 is formed. Thereon, a metal oxide layer 14 constituting an electric barrier 15 with the ZnO layer 13, and one side electrode 12 are formed at constant intervals. The other side electrode 16 is formed on the metal oxide layer 14. That is, the electrode 12 is formed not on the substrate 11 but on the ZnO layer 13, and the upper part of the electrode is always exposed. The electrodes 12, 16 are arrange not vertically but in parallel. Therefore, it is not necessary for the ZnO layer 13 to be partially formed by etching or by using a mask. Further the electrode 12, 16 are formed by using the same process. Thereby the manufacturing is enabled without passing complicated process.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is directed to an asymmetrical Zn
The present invention relates to an O varistor and a manufacturing method thereof.

[Prior Art] Conventionally, an asymmetric ZnO varistor having a structure as shown in FIG. 5 is known. That is, Au, Al, etc. are vacuum-deposited on a glass or ceramic substrate 1 to form one electrode 2, a Zn0 layer 3 is formed on the other electrode 2 by sputtering, and a Zn0 layer 3 is formed on the Zn0 layer 3 by sputtering. ZnO is formed by forming the metal oxide layer 4.
A potential barrier 5 is formed on the Zn0 layer 3 at the interface between 1i13 and the metal oxide layer 4, and Au, A1, etc. are vacuum-deposited on the metal oxide layer 4 to form the other electrode 6. When a voltage is applied so that the electrode 6 is positive with respect to the electrode 2, the potential barrier 5 is biased in the positive direction, and when a voltage is applied in the reverse direction, the potential barrier 5 is biased in the reverse direction, and the current voltage changes depending on the positive and reverse directions. Different characteristics. The asymmetrical ZnO varistor shown in Fig. 5 is a single unit, but when mass producing asymmetrical ZnO varistors, an aggregate of asymmetrical ZnO varistors is formed on a large substrate, and the aggregate is cut vertically and horizontally. A single asymmetric ZnO varistor was obtained.

[Problem to be solved by the invention] In this asymmetric ZnOn buckle, one electrode 2
must be formed larger than the Zn0 layer 3 and its top surface peripheral portion must be exposed in order to connect external lead wires. Therefore, at the stage of forming the aggregate, one electrode 2
After forming the Zn0 layer 3 on the entire surface, a part of the Zn0 layer 3 is removed by etching, or one electrode 2 is masked and the Zn0 layer 3 is partially formed to form an exposed part. ing. Further, the electrodes 2.6 are arranged one above the other, and a Zn0 layer 3 and a metal oxide layer 4 are formed between them.
For this reason, it is formed in a separate process.

Therefore, an asymmetric ZnO varistor having such a structure has the problem that it cannot be manufactured without going through a complicated process.

This invention was made with the aim of solving the problems of the prior art.

[Means for Solving the Problems] Means for solving the above problems will be explained below using FIGS. 1 to 4, which correspond to embodiments. In this invention, as shown in FIG. 1, 200 layers 13 are formed on a substrate ll, and Z
On the n0 layer 13, a 200 layer 13, a metal oxide layer 14 forming a potential barrier 15, and one electrode 12 are formed at regular intervals, and the other electrode 16 is formed on the metal oxide layer 14. . Further, as shown in FIG. 2, a conductive substrate 21 is used as the substrate, and the conductive substrate 21 is used as a current path. Further, as shown in FIG. 3, after forming 200 layers 13 on the entire surface of the substrate (or conductive substrate) 111, a mask 31 is placed on the Zn0 layer 13, and 200 layers 13 are formed on the entire surface of the substrate (or conductive substrate) 111.
200 layers 13 and metal oxide layer 14 are formed and arranged at regular intervals to form a potential barrier 15.
4, electrodes 12, 16 are formed and arranged at regular intervals to form an assembly 40, and the assembly 40 is cut vertically and horizontally to manufacture an asymmetrical ZnO varistor. Also,
As shown in FIG. 4, a substrate (or conductive substrate) 111
After forming 200 layers 13 on top, 200 layers 13 are formed on Zn0 layer 13.
0 layer 13 and a metal oxide layer 14 forming a potential barrier 151
1 and partially remove the metal oxide layer 1 by etching.
41 and the potential barrier 151 to form the metal oxide layer 1.
4 and potential barriers 15 are formed and arranged at regular intervals, and electrodes 12, 16 are formed on the 200 layer 13 and the metal oxide layer 14.
are formed and arranged at regular intervals to form an assembly 40, and the assembly 40 is cut vertically and horizontally to manufacture an asymmetrical ZnO varistor.

[Function] In the structure configured in this way, one electrode 12
is formed not on the substrate 11 but on the Zn0 layer 13, and its upper part is always exposed.

In addition, the electrodes 12 and 16 are arranged vertically (and in parallel). Therefore, it is not necessary to partially form the 200 layer 13 by etching or using a mask.
．． 16 is formed in the same process. Therefore, it can be manufactured without going through complicated steps, and the manufacturing process is simplified.

[Example] FIG. 1 is a diagram showing an embodiment of the present invention.

In FIG. 1, 11 is a glass or ceramic substrate, 13 is a ZnO layer mainly composed of ZnO, and 14 is a Bi2
A metal oxide layer mainly composed of O, 15 is a potential barrier, 1
2.16 is an electrode made of Au, A1, etc. 200 layers 13
is formed on the entire surface of the substrate 11, and a metal oxide layer 14 and one electrode 12 are formed on the Zn0 layer 13 at regular intervals. Further, the other electrode 16 is formed of the metal oxide layer 14.
formed on top. Metal oxide layer 14 and one electrode 1
The distance between the ZnO layer 3 and the ZnO layer 13 is determined in consideration of the sheet resistance value of the 210 layer 13 so that the resistance is sufficiently small because the resistance value of the ZnO layer 3 is in series with the current path. It is set to mm. Depending on the polarity of the voltage applied to the electrodes 12.16, one electrode 12 to 210
A current I flows through the layer 13, the potential barrier 15, the metal oxide layer 14 to the other electrode 16, or in the opposite direction.

In the case of FIG. 1, the 210 layer 13 is formed to have a low resistance and the 210 layer 13 is
In this case, the current I is passed in the longitudinal direction of the 0 layer 13, but 21
When the 0 layer 13 is formed to have a high resistance, a conductive substrate 21 may be used as the substrate as shown in FIG. 2, and the conductive substrate 21 may be used as a path for the current I. As the conductive substrate 21, for example, a stainless steel plate is used. Furthermore, although not shown, a conductive film may be formed on an insulating substrate or a conductive substrate instead of the conductive substrate 21, and the conductive film may be used as a current path. Although the number of forming steps increases, the selectivity of materials increases.

In any case, one electrode 12 is arranged in parallel with the other electrode 16, and its upper part is always exposed. Therefore, it is easy to manufacture.

The method for manufacturing the asymmetric ZnO varistor shown in FIG. 1 or 2 will be explained based on FIG.
ZnON 13 is formed by sputtering on the entire surface of the conductive substrate (or an insulating substrate or conductive substrate on which a conductive film is formed) 111 (see (A)). Next, a mask 31 is placed on the Zn0 layer 13 (see (B)),
210 layer 13 and metal oxide layer 1 forming potential barrier 15
4 are formed and arranged at regular intervals by sputtering (see (C)). Next, for example, a mask 32 is placed on the 210 layer 13 and the metal oxide JW 14 (see (D)).
, electrodes 12, 16 are formed and arranged at regular intervals by vacuum evaporation to form an assembly 40 (see (E)). Next, the assembly 40 is cut vertically and horizontally to produce an asymmetric ZnO varistor (see (F)).

Alternatively, a method as shown in FIG. 4 may be used. That is, first, a 210 layer 13 is formed by sputtering on the entire surface of a substrate (or a conductive substrate, or an insulating substrate or a conductive substrate on which a conductive film is formed) 111 ((A)
reference). Next, a metal oxide layer 141 is formed on the entire surface of the ZnO layer 13 to form the 210 layer 13 and a potential barrier 151.

(See (B)). Next, the metal oxide layer 141 and the potential barrier 151 are partially removed by etching, and the metal oxide layer 14 and the potential barrier 15 are formed and arranged at regular intervals (see (C)).

Next, for example, a mask 32 is placed on the 210 layer 13 and the metal oxide layer 14 (see (D)), and electrodes 12 and 16 are formed and arranged at regular intervals by vacuum evaporation to form an assembly 40 ( (See (E)). Next, the assembly 40 is cut vertically and horizontally to produce an asymmetrical ZnO varistor.

(See (F)).

In any case, it is not necessary to partially form the 210 layer 13 by etching or masking, and the electrode ff112.1
6 is formed in the same process. Therefore, the manufacturing process is simplified.

Note that in FIGS. 3 and 4, the mask 32 is used to form the electrode 12.16, but the electrode is formed on the entire surface of the 210 layer 13 and the metal oxide layer 14, and the electrode 12.16 is etched. may be formed. In this case too, electrode 2.1
6 is formed in the same process.

[Effects of the Invention] As explained above, the present invention includes forming a ZnO layer on a substrate or a conductive substrate, and forming a metal oxide layer on the ZnO layer at regular intervals to form a potential barrier with the ZnO layer. and one electrode are formed at regular intervals, and the other electrode is formed on the metal oxide layer, and a method for manufacturing the same. Therefore, both electrodes are
They are arranged parallel to each other and their upper parts are always exposed.

Therefore, according to the invention, the symmetrical shape Z is easy to manufacture.
The effect is that it is possible to provide an nO varistor and a manufacturing method thereof with a simplified manufacturing process.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing an embodiment of the invention according to claim 1;
FIG. 2 is a sectional view showing an embodiment of the invention according to claim 2;
FIG. 3 is a process diagram showing an embodiment of the invention according to claim 13 or claim 5, FIG. 4 is a process diagram showing an embodiment of the invention according to claim 4 or claim 5, and FIG. FIG. 2 is a sectional view showing a conventional technique.

Claims (5)

[Claims] 1. A ZnO layer is formed on the substrate, and the ZnO layer is formed on the ZnO layer.
An asymmetrical ZnO varistor in which a metal oxide layer forming a potential barrier with an O layer and one electrode are formed at a constant interval, and the other electrode is formed on the metal oxide layer. 2. The asymmetric ZnO varistor according to claim 1, wherein a conductive substrate is used as the substrate, and the conductive substrate is used as a current path. 3. After forming a ZnO layer on a substrate, a metal oxide layer that forms a potential barrier with the ZnO layer is formed and arranged at regular intervals using a mask on the ZnO layer, and the ZnO layer and the metal oxide layer are separated. A method for manufacturing an asymmetric ZnO varistor, which comprises forming and arranging both electrodes at regular intervals on the top to form an aggregate, and manufacturing the aggregate by cutting the aggregate vertically and horizontally. 4. After forming a ZnO layer on the substrate, forming a metal oxide layer on the ZnO layer to form a potential barrier with the ZnO layer,
The metal oxide layer and the potential barrier are partially removed by etching to form and arrange the metal oxide layer and the potential barrier at regular intervals, and both of the metal oxide layer and the potential barrier are formed on the ZnO layer and the metal oxide layer. A method for manufacturing an asymmetric ZnO varistor, which comprises forming and arranging electrodes at regular intervals to form an aggregate, and manufacturing the aggregate by cutting the aggregate vertically and horizontally. 5. Asymmetrical Zn according to claim 3 or 4, wherein a conductive substrate is used as the substrate, and the conductive substrate is used as a current path.
Manufacturing method of O varistor