JPH01196175A - Charge coupled device - Google Patents

Abstract

PURPOSE:To reduce a reset noise by arranging a gate between a floating diffusion part and a reset gate in order to reduce a parasitic capacitance value of the both. CONSTITUTION:An n-type impurity layer 12 used to form a buried channel and n-type diffusion layers 10, 14 used to form output parts of a CCD are formed on the main surface of a P-type semiconductor substrate 11; a group of transfer electrodes 16-20 are arranged on the main surface of the P-type semiconductor substrate 11 via an insulating film 15; an output gate 21 is formed. In addition, a gate 24 and a reset gate 22 which decide a reset potential are arranged between the floating diffusion part 14 as a charge detection part and the output drain 10 used to decide the reset potential of the floating diffusion part. Because the gate 24 is arranged, a parasitic capacitance value of the floating diffusion part and the reset gate is reduced; a reset noise nRG can be reduced to be out of consideration as compared with a signal voltage.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a charge coupled device (COD), which is a charge coupled device, and relates to an analog shift register used in image sensors, delay lines, filters, etc. .

[Summary of the invention]

The present invention provides COD that sequentially transfers analog signals.
By doing as described in the first section, the reset noise of the signal output is reduced.

[Conventional technology]

CCDs, which are charge-coupled devices, are used in a wide range of fields such as image sensors, delay lines, and filters. The CCD charge detection method most commonly used in these application fields is FDA (Floating Diff, usi
on A11plifier) method, and is a buried channel type COD. To simplify the explanation, the CCD drive method is a four-phase drive force type, and the transferred charge is explained as electrons, but there are differences in the drive methods (for example, two-phase and three-phase drive force types).
It goes without saying that the present invention is effective even when the transferred charges are holes.

FIG. 4 shows a structural diagram of a conventional COD. On the main plane of a P-type semiconductor substrate 11, an n-type impurity layer 12 forming a buried channel and an n-type diffusion layer 10 forming an output part of the COD.
．． Transfer electrode groups 16 to 20 are arranged on the main surface of the P-type semiconductor substrate 11 with an insulating film 15 interposed therebetween, and an output gate 21 and a reset gate 22 are formed.

FIG. 5 is a timing chart for explaining the operation. φ1 to φ4 are four-phase transfer lock waveforms, which are applied to the transfer electrodes 16 to 20. φRG is a reset pulse applied to a reset electrode 22 constituting the output section of the CCD, and VOUT is an output waveform obtained by converting a signal charge into a voltage at the floating diffusion 23.

FIG. 6 shows a potential diagram for explaining the operation of COD. Time t1 shown in the timing chart of FIG.
The potential distribution of ~t is shown in FIG.

At time tl, Low is applied to φ1 and φ2, and High is applied to φ and φ4, so
The potential directly under the electrode to which φ3 and φ4 are applied is greater than the potential directly under the electrode to which φ and φ2 are applied, and the electron 31, which is a signal charge, is directly under the electrode to which φ3 and φ4 are applied. Accumulated. Also, the signal charge 32 is accumulated in the floating diffusion, and the output voltage is ■. It is output as UT.

At time t2, it is the same as the above explanation, and φ1 and φ
A signal charge 31 is accumulated in the electrode to which signal charge 4 is applied. That is, the signal charge 31 is moved from directly under the electrodes φ3 and φ to directly under the electrodes φ4 and φ1.

Next, at time t, the signal charge 31 is accumulated only directly under the electrode φ1. The signal charge 32 of the previous bit is φR
When O goes high, the potential directly under the reset electrode becomes ■. Since it exceeds the potential of D (reset bias potential), the potential of the floating diffusion is ■. At the same time as being set to the potential of D, the signal charge 32
is reset. φRG is Low at time t4
, the potential directly under the reset electrode decreases, and the floating diffusion becomes ■ at the same potential as ■oD. It is separated from the D terminal and becomes floating.

Next, at time t5, when φ1 becomes a Low state, the signal charge 31 is read out to the floating tiffusion through the output gate. If the amount of signal charge 31 is q and the capacitance of the floating diffusion is CFD, then ■. IJT is expressed as follows.

That is, in the FDA method, a signal charge q is read into a floating capacitor, and a change in potential of the capacitor is output. Usually, this voUT is amplified by a source follower AMP made up of MOS transistors and output.

[Problem to be solved by the invention]

However, the prior art has drawbacks as described below.

As shown in FIG. 4, since there is a parasitic capacitance 26 in the reset gate 22 and the floating diffusion 23, noise charges are induced in the floating diffusion by the pulse of φRG.

The noise potential 11R (+ is expressed by the following equation).

However, cRp is a parasitic capacitance of 26, and CFD is floating.
Diffusion Capacitance The noise charge induced in this way is read out as an output signal, as shown by OUT signal (2) in FIG. 5, and is amplified by the source follower AMP in the next stage.

As described above, it has the disadvantage that the noise induced by the reset pulse φ3o is added to the output signal. Therefore, an object of the present invention is to reduce the noise induced by the reset pulse φRG.

[Means to solve the problem]

The charge-coupled device of the present invention includes a semiconductor substrate of a first conductivity type,
a charge detection section including a large number of transfer electrodes provided on one main surface of the semiconductor substrate via an insulating film, and a region of a conductivity type opposite to that of the semiconductor substrate, which is at least adjacent to and directly below the final stage of the transfer electrodes; A charge-coupled device comprising: a reset electrode provided for resetting the signal charge of the charge detection section; and a reset section including at least an opposite conductivity type region adjacent directly below the reset electrode. The device is characterized in that at least one electrode is provided between the section and the reset electrode.

[For production]

By implementing the present invention, leakage noise of reset pulses can be reduced.

〔Example〕

An embodiment of the charge-coupled device of the present invention is shown in FIG.

The difference from the conventional charge-coupled device shown in FIG. In contrast to the reset gate 22, the structure of the present invention has a gate 24 that determines the reset potential and a reset gate 22.

FIG. 2 shows a timing chart of the charge coupled device of the present invention, and FIG. 3 shows a potential diagram for explaining the operation of the charge coupled device of the present invention. The signal charge 32 is accumulated in the floating diffusion in the state of tl, and the output ■. It is read as IJT. In the state of t, the φR(l signal becomes High h level, the potential directly under the reset gate becomes larger than the potential directly under the gate 24 that determines the reset potential, and the signal charge 32 moves to the output drain. Do.t4
In the state, φR'. becomes Low level, the potential directly under the reset gate 22 becomes smaller than the potential directly under the gate 24 that determines the reset potential, and the reset operation ends. In state t, the next bit of signal charge is read out to the floating diffusion, and the signal charges are transferred one after another and read out to the output.

The reset potential becomes almost the same as the potential directly below the gate 24, so when the gate 24)\DC voltage VRt3 is applied, the potential immediately below the gate 24 becomes ■. . A potential proportional to is generated. This potential determines the reset potential. Needless to say, by arranging the gate 24, the floating diffusion and the parasitic capacitance of the reset gate are reduced. Therefore, the leakage noise of the reset pulse is as shown in equation (2) above, so the output waveform (■) in Fig. 2 is obtained. As shown by , and , the reset noise nR,3 is reduced to such an extent that it does not become a problem compared to the signal voltage.

In this way, the present invention combines a reset gate and a floating gate.
By providing a gate between the diffusers,
By reducing the parasitic capacitance CRQ that causes reset noise, it has become possible to reduce reset noise.

〔Effect of the invention〕

According to the present invention, by arranging a gate between the floating diffusion and the reset gate, it is possible to reduce the parasitic capacitance of the floating diffusion and the reset gate, thereby achieving the effect of reducing reset noise.

By reducing the reset noise, it is possible to increase the dynamic range of the COD output signal.

[Brief explanation of the drawing]

FIG. 1 is a structural diagram of a charge coupled device according to the present invention, FIG. 2 is a timing chart explaining the present invention in detail, FIG. 3 is a potential diagram, and FIG. 4 is a conventional charge coupled device. FIG. 5 and FIG. 6 are a timing chart and a potential diagram, respectively, for explaining the operation. 11...P-type semiconductor substrate 12...N-type impurity layer 10.14...N-type diffusion layer 15...Insulating films 16-20...Transfer electrode 21... Output electrode 22...Reset electrode 23...Charge detection section 24...Electrode 25...Output drain voltage 31.32
...Signal charge and above Applicant Seiko Epson Co., Ltd. agent Patent attorney Mogami (1 other person) = 11
- -φIφ2φ3υφl 1$JM to the direction φJM +l I ll 1'l l 1 1

Claims (1)

[Claims] a semiconductor substrate of a first conductivity type, a large number of transfer electrodes provided on one main surface of the semiconductor substrate via an insulating film, and the semiconductor substrate at least adjacent to the area immediately below the final stage of the transfer electrodes; a charge detection section including an opposite conductivity type region; a reset electrode provided for resetting the signal charge of the charge detection section; and a reset section including an opposite conductivity type region at least adjacent to the reset electrode; In a charge-coupled device consisting of
A charge-coupled device characterized by being provided with at least one electrode.